1#ifndef _ASM_IA64_PGTABLE_H
2#define _ASM_IA64_PGTABLE_H
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16#include <asm/mman.h>
17#include <asm/page.h>
18#include <asm/processor.h>
19#include <asm/types.h>
20
21#define IA64_MAX_PHYS_BITS 50
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27
28#define _PAGE_P_BIT 0
29#define _PAGE_A_BIT 5
30#define _PAGE_D_BIT 6
31
32#define _PAGE_P (1 << _PAGE_P_BIT)
33#define _PAGE_MA_WB (0x0 << 2)
34#define _PAGE_MA_UC (0x4 << 2)
35#define _PAGE_MA_UCE (0x5 << 2)
36#define _PAGE_MA_WC (0x6 << 2)
37#define _PAGE_MA_NAT (0x7 << 2)
38#define _PAGE_MA_MASK (0x7 << 2)
39#define _PAGE_PL_0 (0 << 7)
40#define _PAGE_PL_1 (1 << 7)
41#define _PAGE_PL_2 (2 << 7)
42#define _PAGE_PL_3 (3 << 7)
43#define _PAGE_PL_MASK (3 << 7)
44#define _PAGE_AR_R (0 << 9)
45#define _PAGE_AR_RX (1 << 9)
46#define _PAGE_AR_RW (2 << 9)
47#define _PAGE_AR_RWX (3 << 9)
48#define _PAGE_AR_R_RW (4 << 9)
49#define _PAGE_AR_RX_RWX (5 << 9)
50#define _PAGE_AR_RWX_RW (6 << 9)
51#define _PAGE_AR_X_RX (7 << 9)
52#define _PAGE_AR_MASK (7 << 9)
53#define _PAGE_AR_SHIFT 9
54#define _PAGE_A (1 << _PAGE_A_BIT)
55#define _PAGE_D (1 << _PAGE_D_BIT)
56#define _PAGE_PPN_MASK (((__IA64_UL(1) << IA64_MAX_PHYS_BITS) - 1) & ~0xfffUL)
57#define _PAGE_ED (__IA64_UL(1) << 52)
58#define _PAGE_PROTNONE (__IA64_UL(1) << 63)
59
60#define _PFN_MASK _PAGE_PPN_MASK
61
62#define _PAGE_CHG_MASK (_PAGE_P | _PAGE_PROTNONE | _PAGE_PL_MASK | _PAGE_AR_MASK | _PAGE_ED)
63
64#define _PAGE_SIZE_4K 12
65#define _PAGE_SIZE_8K 13
66#define _PAGE_SIZE_16K 14
67#define _PAGE_SIZE_64K 16
68#define _PAGE_SIZE_256K 18
69#define _PAGE_SIZE_1M 20
70#define _PAGE_SIZE_4M 22
71#define _PAGE_SIZE_16M 24
72#define _PAGE_SIZE_64M 26
73#define _PAGE_SIZE_256M 28
74#define _PAGE_SIZE_1G 30
75#define _PAGE_SIZE_4G 32
76
77#define __ACCESS_BITS _PAGE_ED | _PAGE_A | _PAGE_P | _PAGE_MA_WB
78#define __DIRTY_BITS_NO_ED _PAGE_A | _PAGE_P | _PAGE_D | _PAGE_MA_WB
79#define __DIRTY_BITS _PAGE_ED | __DIRTY_BITS_NO_ED
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83
84#define PTRS_PER_PTD_SHIFT (PAGE_SHIFT-3)
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88
89#define PTRS_PER_PTE (__IA64_UL(1) << (PTRS_PER_PTD_SHIFT))
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96
97#define PMD_SHIFT (PAGE_SHIFT + (PTRS_PER_PTD_SHIFT))
98#define PMD_SIZE (1UL << PMD_SHIFT)
99#define PMD_MASK (~(PMD_SIZE-1))
100#define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT))
101
102#if CONFIG_PGTABLE_LEVELS == 4
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109#define PUD_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT))
110#define PUD_SIZE (1UL << PUD_SHIFT)
111#define PUD_MASK (~(PUD_SIZE-1))
112#define PTRS_PER_PUD (1UL << (PTRS_PER_PTD_SHIFT))
113#endif
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119
120#if CONFIG_PGTABLE_LEVELS == 4
121#define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT))
122#else
123#define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT))
124#endif
125#define PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT)
126#define PGDIR_MASK (~(PGDIR_SIZE-1))
127#define PTRS_PER_PGD_SHIFT PTRS_PER_PTD_SHIFT
128#define PTRS_PER_PGD (1UL << PTRS_PER_PGD_SHIFT)
129#define USER_PTRS_PER_PGD (5*PTRS_PER_PGD/8)
130#define FIRST_USER_ADDRESS 0UL
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136
137#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_A)
138#define PAGE_SHARED __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RW)
139#define PAGE_READONLY __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_R)
140#define PAGE_COPY __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_R)
141#define PAGE_COPY_EXEC __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX)
142#define PAGE_GATE __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_X_RX)
143#define PAGE_KERNEL __pgprot(__DIRTY_BITS | _PAGE_PL_0 | _PAGE_AR_RWX)
144#define PAGE_KERNELRX __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_RX)
145#define PAGE_KERNEL_UC __pgprot(__DIRTY_BITS | _PAGE_PL_0 | _PAGE_AR_RWX | \
146 _PAGE_MA_UC)
147
148# ifndef __ASSEMBLY__
149
150#include <linux/sched.h>
151#include <linux/bitops.h>
152#include <asm/cacheflush.h>
153#include <asm/mmu_context.h>
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164#define __P000 PAGE_NONE
165#define __P001 PAGE_READONLY
166#define __P010 PAGE_READONLY
167#define __P011 PAGE_READONLY
168#define __P100 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_X_RX)
169#define __P101 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX)
170#define __P110 PAGE_COPY_EXEC
171#define __P111 PAGE_COPY_EXEC
172
173#define __S000 PAGE_NONE
174#define __S001 PAGE_READONLY
175#define __S010 PAGE_SHARED
176#define __S011 PAGE_SHARED
177#define __S100 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_X_RX)
178#define __S101 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX)
179#define __S110 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX)
180#define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX)
181
182#define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
183#if CONFIG_PGTABLE_LEVELS == 4
184#define pud_ERROR(e) printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
185#endif
186#define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
187#define pte_ERROR(e) printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
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195
196static inline long
197ia64_phys_addr_valid (unsigned long addr)
198{
199 return (addr & (local_cpu_data->unimpl_pa_mask)) == 0;
200}
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215#define kern_addr_valid(addr) (1)
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224#define VMALLOC_START (RGN_BASE(RGN_GATE) + 0x200000000UL)
225#ifdef CONFIG_VIRTUAL_MEM_MAP
226# define VMALLOC_END_INIT (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9)))
227extern unsigned long VMALLOC_END;
228#else
229#if defined(CONFIG_SPARSEMEM) && defined(CONFIG_SPARSEMEM_VMEMMAP)
230
231# define VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 10)))
232# define vmemmap ((struct page *)VMALLOC_END)
233#else
234# define VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9)))
235#endif
236#endif
237
238
239#define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE))
240#define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE))
241
242#define RGN_MAP_SHIFT (PGDIR_SHIFT + PTRS_PER_PGD_SHIFT - 3)
243#define RGN_MAP_LIMIT ((1UL << RGN_MAP_SHIFT) - PAGE_SIZE)
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248
249#define pfn_pte(pfn, pgprot) \
250({ pte_t __pte; pte_val(__pte) = ((pfn) << PAGE_SHIFT) | pgprot_val(pgprot); __pte; })
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252
253#define pte_pfn(_pte) ((pte_val(_pte) & _PFN_MASK) >> PAGE_SHIFT)
254
255#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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257
258#define mk_pte_phys(physpage, pgprot) \
259({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; })
260
261#define pte_modify(_pte, newprot) \
262 (__pte((pte_val(_pte) & ~_PAGE_CHG_MASK) | (pgprot_val(newprot) & _PAGE_CHG_MASK)))
263
264#define pte_none(pte) (!pte_val(pte))
265#define pte_present(pte) (pte_val(pte) & (_PAGE_P | _PAGE_PROTNONE))
266#define pte_clear(mm,addr,pte) (pte_val(*(pte)) = 0UL)
267
268#define pte_page(pte) virt_to_page(((pte_val(pte) & _PFN_MASK) + PAGE_OFFSET))
269
270#define pmd_none(pmd) (!pmd_val(pmd))
271#define pmd_bad(pmd) (!ia64_phys_addr_valid(pmd_val(pmd)))
272#define pmd_present(pmd) (pmd_val(pmd) != 0UL)
273#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL)
274#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & _PFN_MASK))
275#define pmd_page(pmd) virt_to_page((pmd_val(pmd) + PAGE_OFFSET))
276
277#define pud_none(pud) (!pud_val(pud))
278#define pud_bad(pud) (!ia64_phys_addr_valid(pud_val(pud)))
279#define pud_present(pud) (pud_val(pud) != 0UL)
280#define pud_clear(pudp) (pud_val(*(pudp)) = 0UL)
281#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK))
282#define pud_page(pud) virt_to_page((pud_val(pud) + PAGE_OFFSET))
283
284#if CONFIG_PGTABLE_LEVELS == 4
285#define pgd_none(pgd) (!pgd_val(pgd))
286#define pgd_bad(pgd) (!ia64_phys_addr_valid(pgd_val(pgd)))
287#define pgd_present(pgd) (pgd_val(pgd) != 0UL)
288#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0UL)
289#define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_val(pgd) & _PFN_MASK))
290#define pgd_page(pgd) virt_to_page((pgd_val(pgd) + PAGE_OFFSET))
291#endif
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295
296#define pte_write(pte) ((unsigned) (((pte_val(pte) & _PAGE_AR_MASK) >> _PAGE_AR_SHIFT) - 2) <= 4)
297#define pte_exec(pte) ((pte_val(pte) & _PAGE_AR_RX) != 0)
298#define pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0)
299#define pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0)
300#define pte_special(pte) 0
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306#define pte_wrprotect(pte) (__pte(pte_val(pte) & ~_PAGE_AR_RW))
307#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_AR_RW))
308#define pte_mkold(pte) (__pte(pte_val(pte) & ~_PAGE_A))
309#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A))
310#define pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D))
311#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D))
312#define pte_mkhuge(pte) (__pte(pte_val(pte)))
313#define pte_mkspecial(pte) (pte)
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324#define pte_present_exec_user(pte)\
325 ((pte_val(pte) & (_PAGE_P | _PAGE_PL_MASK | _PAGE_AR_RX)) == \
326 (_PAGE_P | _PAGE_PL_3 | _PAGE_AR_RX))
327
328extern void __ia64_sync_icache_dcache(pte_t pteval);
329static inline void set_pte(pte_t *ptep, pte_t pteval)
330{
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334
335 if (pte_present_exec_user(pteval) &&
336 (!pte_present(*ptep) ||
337 pte_pfn(*ptep) != pte_pfn(pteval)))
338
339 __ia64_sync_icache_dcache(pteval);
340 *ptep = pteval;
341}
342
343#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
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351#define pgprot_cacheable(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WB)
352#define pgprot_noncached(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_UC)
353#define pgprot_writecombine(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WC)
354
355struct file;
356extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
357 unsigned long size, pgprot_t vma_prot);
358#define __HAVE_PHYS_MEM_ACCESS_PROT
359
360static inline unsigned long
361pgd_index (unsigned long address)
362{
363 unsigned long region = address >> 61;
364 unsigned long l1index = (address >> PGDIR_SHIFT) & ((PTRS_PER_PGD >> 3) - 1);
365
366 return (region << (PAGE_SHIFT - 6)) | l1index;
367}
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370
371static inline pgd_t*
372pgd_offset (const struct mm_struct *mm, unsigned long address)
373{
374 return mm->pgd + pgd_index(address);
375}
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378
379#define pgd_offset_k(addr) \
380 (init_mm.pgd + (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)))
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384
385#define pgd_offset_gate(mm, addr) pgd_offset_k(addr)
386
387#if CONFIG_PGTABLE_LEVELS == 4
388
389#define pud_offset(dir,addr) \
390 ((pud_t *) pgd_page_vaddr(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)))
391#endif
392
393
394#define pmd_offset(dir,addr) \
395 ((pmd_t *) pud_page_vaddr(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
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401#define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
402#define pte_offset_kernel(dir,addr) ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr))
403#define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr)
404#define pte_unmap(pte) do { } while (0)
405
406
407
408static inline int
409ptep_test_and_clear_young (struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
410{
411#ifdef CONFIG_SMP
412 if (!pte_young(*ptep))
413 return 0;
414 return test_and_clear_bit(_PAGE_A_BIT, ptep);
415#else
416 pte_t pte = *ptep;
417 if (!pte_young(pte))
418 return 0;
419 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
420 return 1;
421#endif
422}
423
424static inline pte_t
425ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
426{
427#ifdef CONFIG_SMP
428 return __pte(xchg((long *) ptep, 0));
429#else
430 pte_t pte = *ptep;
431 pte_clear(mm, addr, ptep);
432 return pte;
433#endif
434}
435
436static inline void
437ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
438{
439#ifdef CONFIG_SMP
440 unsigned long new, old;
441
442 do {
443 old = pte_val(*ptep);
444 new = pte_val(pte_wrprotect(__pte (old)));
445 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
446#else
447 pte_t old_pte = *ptep;
448 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
449#endif
450}
451
452static inline int
453pte_same (pte_t a, pte_t b)
454{
455 return pte_val(a) == pte_val(b);
456}
457
458#define update_mmu_cache(vma, address, ptep) do { } while (0)
459
460extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
461extern void paging_init (void);
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474
475#define __swp_type(entry) (((entry).val >> 1) & 0x7f)
476#define __swp_offset(entry) (((entry).val << 1) >> 9)
477#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((long) (offset) << 8) })
478#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
479#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
480
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484
485extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
486extern struct page *zero_page_memmap_ptr;
487#define ZERO_PAGE(vaddr) (zero_page_memmap_ptr)
488
489
490#define HAVE_ARCH_UNMAPPED_AREA
491
492#ifdef CONFIG_HUGETLB_PAGE
493#define HUGETLB_PGDIR_SHIFT (HPAGE_SHIFT + 2*(PAGE_SHIFT-3))
494#define HUGETLB_PGDIR_SIZE (__IA64_UL(1) << HUGETLB_PGDIR_SHIFT)
495#define HUGETLB_PGDIR_MASK (~(HUGETLB_PGDIR_SIZE-1))
496#endif
497
498
499#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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522#ifdef CONFIG_SMP
523# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \
524({ \
525 int __changed = !pte_same(*(__ptep), __entry); \
526 if (__changed && __safely_writable) { \
527 set_pte(__ptep, __entry); \
528 flush_tlb_page(__vma, __addr); \
529 } \
530 __changed; \
531})
532#else
533# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \
534({ \
535 int __changed = !pte_same(*(__ptep), __entry); \
536 if (__changed) { \
537 set_pte_at((__vma)->vm_mm, (__addr), __ptep, __entry); \
538 flush_tlb_page(__vma, __addr); \
539 } \
540 __changed; \
541})
542#endif
543
544# ifdef CONFIG_VIRTUAL_MEM_MAP
545
546# define __HAVE_ARCH_MEMMAP_INIT
547 extern void memmap_init (unsigned long size, int nid, unsigned long zone,
548 unsigned long start_pfn);
549# endif
550# endif
551
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555
556
557#if defined(CONFIG_IA64_GRANULE_64MB)
558# define IA64_GRANULE_SHIFT _PAGE_SIZE_64M
559#elif defined(CONFIG_IA64_GRANULE_16MB)
560# define IA64_GRANULE_SHIFT _PAGE_SIZE_16M
561#endif
562#define IA64_GRANULE_SIZE (1 << IA64_GRANULE_SHIFT)
563
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565
566#define KERNEL_TR_PAGE_SHIFT _PAGE_SIZE_64M
567#define KERNEL_TR_PAGE_SIZE (1 << KERNEL_TR_PAGE_SHIFT)
568
569
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571
572#define pgtable_cache_init() do { } while (0)
573
574
575#define FIXADDR_USER_START GATE_ADDR
576#ifdef HAVE_BUGGY_SEGREL
577# define FIXADDR_USER_END (GATE_ADDR + 2*PAGE_SIZE)
578#else
579# define FIXADDR_USER_END (GATE_ADDR + 2*PERCPU_PAGE_SIZE)
580#endif
581
582#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
583#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
584#define __HAVE_ARCH_PTEP_SET_WRPROTECT
585#define __HAVE_ARCH_PTE_SAME
586#define __HAVE_ARCH_PGD_OFFSET_GATE
587
588
589#if CONFIG_PGTABLE_LEVELS == 3
590#include <asm-generic/pgtable-nopud.h>
591#endif
592#include <asm-generic/pgtable.h>
593
594#endif
595