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17#include <linux/types.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/seq_file.h>
21#include <linux/tty.h>
22#include <linux/console.h>
23#include <linux/linkage.h>
24#include <linux/init.h>
25#include <linux/major.h>
26#include <linux/genhd.h>
27#include <linux/rtc.h>
28#include <linux/interrupt.h>
29#include <linux/module.h>
30
31#include <asm/bootinfo.h>
32#include <asm/bootinfo-vme.h>
33#include <asm/byteorder.h>
34#include <asm/pgtable.h>
35#include <asm/setup.h>
36#include <asm/irq.h>
37#include <asm/traps.h>
38#include <asm/machdep.h>
39#include <asm/mvme16xhw.h>
40
41extern t_bdid mvme_bdid;
42
43static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
44
45static void mvme16x_get_model(char *model);
46extern void mvme16x_sched_init(irq_handler_t handler);
47extern u32 mvme16x_gettimeoffset(void);
48extern int mvme16x_hwclk (int, struct rtc_time *);
49extern int mvme16x_set_clock_mmss (unsigned long);
50extern void mvme16x_reset (void);
51
52int bcd2int (unsigned char b);
53
54
55
56
57static irq_handler_t tick_handler;
58
59
60unsigned short mvme16x_config;
61EXPORT_SYMBOL(mvme16x_config);
62
63
64int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
65{
66 uint16_t tag = be16_to_cpu(bi->tag);
67 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
68 return 0;
69 else
70 return 1;
71}
72
73void mvme16x_reset(void)
74{
75 printk ("\r\n\nCalled mvme16x_reset\r\n"
76 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
77
78
79 *(volatile char *)0xfff40107 = 0x80;
80}
81
82static void mvme16x_get_model(char *model)
83{
84 p_bdid p = &mvme_bdid;
85 char suf[4];
86
87 suf[1] = p->brdsuffix[0];
88 suf[2] = p->brdsuffix[1];
89 suf[3] = '\0';
90 suf[0] = suf[1] ? '-' : '\0';
91
92 sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
93}
94
95
96static void mvme16x_get_hardware_list(struct seq_file *m)
97{
98 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
99
100 if (brdno == 0x0162 || brdno == 0x0172)
101 {
102 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
103
104 seq_printf (m, "VMEchip2 %spresent\n",
105 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
106 seq_printf (m, "SCSI interface %spresent\n",
107 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
108 seq_printf (m, "Ethernet i/f %spresent\n",
109 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
110 }
111}
112
113
114
115
116
117
118
119static void __init mvme16x_init_IRQ (void)
120{
121 m68k_setup_user_interrupt(VEC_USER, 192);
122}
123
124#define pcc2chip ((volatile u_char *)0xfff42000)
125#define PccSCCMICR 0x1d
126#define PccSCCTICR 0x1e
127#define PccSCCRICR 0x1f
128#define PccTPIACKR 0x25
129
130#ifdef CONFIG_EARLY_PRINTK
131
132
133#define CD2401_ADDR (0xfff45000)
134
135#define CyGFRCR (0x81)
136#define CyCCR (0x13)
137#define CyCLR_CHAN (0x40)
138#define CyINIT_CHAN (0x20)
139#define CyCHIP_RESET (0x10)
140#define CyENB_XMTR (0x08)
141#define CyDIS_XMTR (0x04)
142#define CyENB_RCVR (0x02)
143#define CyDIS_RCVR (0x01)
144#define CyCAR (0xee)
145#define CyIER (0x11)
146#define CyMdmCh (0x80)
147#define CyRxExc (0x20)
148#define CyRxData (0x08)
149#define CyTxMpty (0x02)
150#define CyTxRdy (0x01)
151#define CyLICR (0x26)
152#define CyRISR (0x89)
153#define CyTIMEOUT (0x80)
154#define CySPECHAR (0x70)
155#define CyOVERRUN (0x08)
156#define CyPARITY (0x04)
157#define CyFRAME (0x02)
158#define CyBREAK (0x01)
159#define CyREOIR (0x84)
160#define CyTEOIR (0x85)
161#define CyMEOIR (0x86)
162#define CyNOTRANS (0x08)
163#define CyRFOC (0x30)
164#define CyRDR (0xf8)
165#define CyTDR (0xf8)
166#define CyMISR (0x8b)
167#define CyRISR (0x89)
168#define CyTISR (0x8a)
169#define CyMSVR1 (0xde)
170#define CyMSVR2 (0xdf)
171#define CyDSR (0x80)
172#define CyDCD (0x40)
173#define CyCTS (0x20)
174#define CyDTR (0x02)
175#define CyRTS (0x01)
176#define CyRTPRL (0x25)
177#define CyRTPRH (0x24)
178#define CyCOR1 (0x10)
179#define CyPARITY_NONE (0x00)
180#define CyPARITY_E (0x40)
181#define CyPARITY_O (0xC0)
182#define Cy_5_BITS (0x04)
183#define Cy_6_BITS (0x05)
184#define Cy_7_BITS (0x06)
185#define Cy_8_BITS (0x07)
186#define CyCOR2 (0x17)
187#define CyETC (0x20)
188#define CyCtsAE (0x02)
189#define CyCOR3 (0x16)
190#define Cy_1_STOP (0x02)
191#define Cy_2_STOP (0x04)
192#define CyCOR4 (0x15)
193#define CyREC_FIFO (0x0F)
194#define CyCOR5 (0x14)
195#define CyCOR6 (0x18)
196#define CyCOR7 (0x07)
197#define CyRBPR (0xcb)
198#define CyRCOR (0xc8)
199#define CyTBPR (0xc3)
200#define CyTCOR (0xc0)
201#define CySCHR1 (0x1f)
202#define CySCHR2 (0x1e)
203#define CyTPR (0xda)
204#define CyPILR1 (0xe3)
205#define CyPILR2 (0xe0)
206#define CyPILR3 (0xe1)
207#define CyCMR (0x1b)
208#define CyASYNC (0x02)
209#define CyLICR (0x26)
210#define CyLIVR (0x09)
211#define CySCRL (0x23)
212#define CySCRH (0x22)
213#define CyTFTC (0x80)
214
215void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
216{
217 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
218 volatile u_char sink;
219 u_char ier;
220 int port;
221 u_char do_lf = 0;
222 int i = 0;
223
224
225
226 port = 0;
227 base_addr[CyCAR] = (u_char)port;
228 while (base_addr[CyCCR])
229 ;
230 base_addr[CyCCR] = CyENB_XMTR;
231
232 ier = base_addr[CyIER];
233 base_addr[CyIER] = CyTxMpty;
234
235 while (1) {
236 if (pcc2chip[PccSCCTICR] & 0x20)
237 {
238
239 sink = pcc2chip[PccTPIACKR];
240 if ((base_addr[CyLICR] >> 2) == port) {
241 if (i == count) {
242
243 base_addr[CyTEOIR] = CyNOTRANS;
244 break;
245 }
246 if (do_lf) {
247 base_addr[CyTDR] = '\n';
248 str++;
249 i++;
250 do_lf = 0;
251 }
252 else if (*str == '\n') {
253 base_addr[CyTDR] = '\r';
254 do_lf = 1;
255 }
256 else {
257 base_addr[CyTDR] = *str++;
258 i++;
259 }
260 base_addr[CyTEOIR] = 0;
261 }
262 else
263 base_addr[CyTEOIR] = CyNOTRANS;
264 }
265 }
266
267 base_addr[CyIER] = ier;
268}
269
270#endif
271
272void __init config_mvme16x(void)
273{
274 p_bdid p = &mvme_bdid;
275 char id[40];
276 uint16_t brdno = be16_to_cpu(p->brdno);
277
278 mach_max_dma_address = 0xffffffff;
279 mach_sched_init = mvme16x_sched_init;
280 mach_init_IRQ = mvme16x_init_IRQ;
281 arch_gettimeoffset = mvme16x_gettimeoffset;
282 mach_hwclk = mvme16x_hwclk;
283 mach_set_clock_mmss = mvme16x_set_clock_mmss;
284 mach_reset = mvme16x_reset;
285 mach_get_model = mvme16x_get_model;
286 mach_get_hardware_list = mvme16x_get_hardware_list;
287
288
289
290 if (strncmp("BDID", p->bdid, 4))
291 {
292 printk ("\n\nBug call .BRD_ID returned garbage - giving up\n\n");
293 while (1)
294 ;
295 }
296
297 if (vme_brdtype == 0)
298 vme_brdtype = brdno;
299
300 mvme16x_get_model(id);
301 printk ("\nBRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4,
302 p->rev&0xf, p->yr, p->mth, p->day);
303 if (brdno == 0x0162 || brdno == 0x172)
304 {
305 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
306
307 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
308
309 printk ("MVME%x Hardware status:\n", brdno);
310 printk (" CPU Type 68%s040\n",
311 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
312 printk (" CPU clock %dMHz\n",
313 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
314 printk (" VMEchip2 %spresent\n",
315 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
316 printk (" SCSI interface %spresent\n",
317 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
318 printk (" Ethernet interface %spresent\n",
319 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
320 }
321 else
322 {
323 mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
324 }
325}
326
327static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
328{
329 unsigned long *new = (unsigned long *)vectors;
330 unsigned long *old = (unsigned long *)0xffe00000;
331 volatile unsigned char uc, *ucp;
332 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
333
334 if (brdno == 0x0162 || brdno == 0x172)
335 {
336 ucp = (volatile unsigned char *)0xfff42043;
337 uc = *ucp | 8;
338 *ucp = uc;
339 }
340 else
341 {
342 *(volatile unsigned long *)0xfff40074 = 0x40000000;
343 }
344 *(new+4) = *(old+4);
345 *(new+9) = *(old+9);
346 *(new+47) = *(old+47);
347
348 if (brdno == 0x0162 || brdno == 0x172)
349 *(new+0x5e) = *(old+0x5e);
350 else
351 *(new+0x6e) = *(old+0x6e);
352 return IRQ_HANDLED;
353}
354
355static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
356{
357 *(volatile unsigned char *)0xfff4201b |= 8;
358 return tick_handler(irq, dev_id);
359}
360
361void mvme16x_sched_init (irq_handler_t timer_routine)
362{
363 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
364 int irq;
365
366 tick_handler = timer_routine;
367
368 *(volatile unsigned long *)0xfff42008 = 0;
369 *(volatile unsigned long *)0xfff42004 = 10000;
370 *(volatile unsigned char *)0xfff42017 |= 3;
371 *(volatile unsigned char *)0xfff4201b = 0x16;
372 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
373 "timer", mvme16x_timer_int))
374 panic ("Couldn't register timer int");
375
376 if (brdno == 0x0162 || brdno == 0x172)
377 irq = MVME162_IRQ_ABORT;
378 else
379 irq = MVME167_IRQ_ABORT;
380 if (request_irq(irq, mvme16x_abort_int, 0,
381 "abort", mvme16x_abort_int))
382 panic ("Couldn't register abort int");
383}
384
385
386
387u32 mvme16x_gettimeoffset(void)
388{
389 return (*(volatile u32 *)0xfff42008) * 1000;
390}
391
392int bcd2int (unsigned char b)
393{
394 return ((b>>4)*10 + (b&15));
395}
396
397int mvme16x_hwclk(int op, struct rtc_time *t)
398{
399#warning check me!
400 if (!op) {
401 rtc->ctrl = RTC_READ;
402 t->tm_year = bcd2int (rtc->bcd_year);
403 t->tm_mon = bcd2int (rtc->bcd_mth);
404 t->tm_mday = bcd2int (rtc->bcd_dom);
405 t->tm_hour = bcd2int (rtc->bcd_hr);
406 t->tm_min = bcd2int (rtc->bcd_min);
407 t->tm_sec = bcd2int (rtc->bcd_sec);
408 rtc->ctrl = 0;
409 }
410 return 0;
411}
412
413int mvme16x_set_clock_mmss (unsigned long nowtime)
414{
415 return 0;
416}
417
418
