LXR linux/drivers/gpu/drm/amd/powerplay/smumgr/cz

   1/*
   2 * Copyright 2015 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 */
  23#ifndef _CZ_SMUMGR_H_
  24#define _CZ_SMUMGR_H_
  25
  26
  27#define MAX_NUM_FIRMWARE                        8
  28#define MAX_NUM_SCRATCH                         11
  29#define CZ_SCRATCH_SIZE_NONGFX_CLOCKGATING      1024
  30#define CZ_SCRATCH_SIZE_NONGFX_GOLDENSETTING    2048
  31#define CZ_SCRATCH_SIZE_SDMA_METADATA           1024
  32#define CZ_SCRATCH_SIZE_IH                      ((2*256+1)*4)
  33
  34enum cz_scratch_entry {
  35        CZ_SCRATCH_ENTRY_UCODE_ID_SDMA0 = 0,
  36        CZ_SCRATCH_ENTRY_UCODE_ID_SDMA1,
  37        CZ_SCRATCH_ENTRY_UCODE_ID_CP_CE,
  38        CZ_SCRATCH_ENTRY_UCODE_ID_CP_PFP,
  39        CZ_SCRATCH_ENTRY_UCODE_ID_CP_ME,
  40        CZ_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT1,
  41        CZ_SCRATCH_ENTRY_UCODE_ID_CP_MEC_JT2,
  42        CZ_SCRATCH_ENTRY_UCODE_ID_GMCON_RENG,
  43        CZ_SCRATCH_ENTRY_UCODE_ID_RLC_G,
  44        CZ_SCRATCH_ENTRY_UCODE_ID_RLC_SCRATCH,
  45        CZ_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_ARAM,
  46        CZ_SCRATCH_ENTRY_UCODE_ID_RLC_SRM_DRAM,
  47        CZ_SCRATCH_ENTRY_UCODE_ID_DMCU_ERAM,
  48        CZ_SCRATCH_ENTRY_UCODE_ID_DMCU_IRAM,
  49        CZ_SCRATCH_ENTRY_UCODE_ID_POWER_PROFILING,
  50        CZ_SCRATCH_ENTRY_DATA_ID_SDMA_HALT,
  51        CZ_SCRATCH_ENTRY_DATA_ID_SYS_CLOCKGATING,
  52        CZ_SCRATCH_ENTRY_DATA_ID_SDMA_RING_REGS,
  53        CZ_SCRATCH_ENTRY_DATA_ID_NONGFX_REINIT,
  54        CZ_SCRATCH_ENTRY_DATA_ID_SDMA_START,
  55        CZ_SCRATCH_ENTRY_DATA_ID_IH_REGISTERS,
  56        CZ_SCRATCH_ENTRY_SMU8_FUSION_CLKTABLE
  57};
  58
  59struct cz_buffer_entry {
  60        uint32_t data_size;
  61        uint32_t mc_addr_low;
  62        uint32_t mc_addr_high;
  63        void *kaddr;
  64        enum cz_scratch_entry firmware_ID;
  65        unsigned long handle; /* as bo handle used when release bo */
  66};
  67
  68struct cz_register_index_data_pair {
  69        uint32_t offset;
  70        uint32_t value;
  71};
  72
  73struct cz_ih_meta_data {
  74        uint32_t command;
  75        struct cz_register_index_data_pair register_index_value_pair[1];
  76};
  77
  78struct cz_smumgr {
  79        uint8_t driver_buffer_length;
  80        uint8_t scratch_buffer_length;
  81        uint16_t toc_entry_used_count;
  82        uint16_t toc_entry_initialize_index;
  83        uint16_t toc_entry_power_profiling_index;
  84        uint16_t toc_entry_aram;
  85        uint16_t toc_entry_ih_register_restore_task_index;
  86        uint16_t toc_entry_clock_table;
  87        uint16_t ih_register_restore_task_size;
  88        uint16_t smu_buffer_used_bytes;
  89
  90        struct cz_buffer_entry toc_buffer;
  91        struct cz_buffer_entry smu_buffer;
  92        struct cz_buffer_entry firmware_buffer;
  93        struct cz_buffer_entry driver_buffer[MAX_NUM_FIRMWARE];
  94        struct cz_buffer_entry meta_data_buffer[MAX_NUM_FIRMWARE];
  95        struct cz_buffer_entry scratch_buffer[MAX_NUM_SCRATCH];
  96};
  97
  98struct pp_smumgr;
  99
 100extern int cz_smum_init(struct pp_smumgr *smumgr);
 101
 102#endif
 103