LXR linux/drivers/gpu/drm/amd/powerplay/smumgr/tonga

   1/*
   2 * Copyright 2015 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 */
  23
  24#ifndef _TONGA_SMUMGR_H_
  25#define _TONGA_SMUMGR_H_
  26
  27#include "smu72_discrete.h"
  28
  29#include "smu7_smumgr.h"
  30
  31struct tonga_mc_reg_entry {
  32        uint32_t mclk_max;
  33        uint32_t mc_data[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
  34};
  35
  36struct tonga_mc_reg_table {
  37        uint8_t   last;               /* number of registers*/
  38        uint8_t   num_entries;        /* number of entries in mc_reg_table_entry used*/
  39        uint16_t  validflag;          /* indicate the corresponding register is valid or not. 1: valid, 0: invalid. bit0->address[0], bit1->address[1], etc.*/
  40        struct tonga_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
  41        SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
  42};
  43
  44
  45struct tonga_smumgr {
  46
  47        struct smu7_smumgr                   smu7_data;
  48        struct SMU72_Discrete_DpmTable       smc_state_table;
  49        struct SMU72_Discrete_Ulv            ulv_setting;
  50        struct SMU72_Discrete_PmFuses  power_tune_table;
  51        const struct tonga_pt_defaults  *power_tune_defaults;
  52        SMU72_Discrete_MCRegisters      mc_regs;
  53        struct tonga_mc_reg_table mc_reg_table;
  54
  55        uint32_t        activity_target[SMU72_MAX_LEVELS_GRAPHICS];
  56
  57};
  58
  59#endif
  60