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28#ifndef __rs_h__
29#define __rs_h__
30
31#include <net/mac80211.h>
32
33#include "iwl-config.h"
34
35#include "fw-api.h"
36#include "iwl-trans.h"
37
38struct iwl_rs_rate_info {
39 u8 plcp;
40 u8 plcp_ht_siso;
41 u8 plcp_ht_mimo2;
42 u8 plcp_vht_siso;
43 u8 plcp_vht_mimo2;
44 u8 prev_rs;
45 u8 next_rs;
46};
47
48#define IWL_RATE_60M_PLCP 3
49
50enum {
51 IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
52 IWL_RATE_INVALID = IWL_RATE_COUNT,
53};
54
55#define LINK_QUAL_MAX_RETRY_NUM 16
56
57enum {
58 IWL_RATE_6M_INDEX_TABLE = 0,
59 IWL_RATE_9M_INDEX_TABLE,
60 IWL_RATE_12M_INDEX_TABLE,
61 IWL_RATE_18M_INDEX_TABLE,
62 IWL_RATE_24M_INDEX_TABLE,
63 IWL_RATE_36M_INDEX_TABLE,
64 IWL_RATE_48M_INDEX_TABLE,
65 IWL_RATE_54M_INDEX_TABLE,
66 IWL_RATE_1M_INDEX_TABLE,
67 IWL_RATE_2M_INDEX_TABLE,
68 IWL_RATE_5M_INDEX_TABLE,
69 IWL_RATE_11M_INDEX_TABLE,
70 IWL_RATE_INVM_INDEX_TABLE = IWL_RATE_INVM_INDEX - 1,
71};
72
73
74#define IWL_RATE_6M_MASK (1 << IWL_RATE_6M_INDEX)
75#define IWL_RATE_9M_MASK (1 << IWL_RATE_9M_INDEX)
76#define IWL_RATE_12M_MASK (1 << IWL_RATE_12M_INDEX)
77#define IWL_RATE_18M_MASK (1 << IWL_RATE_18M_INDEX)
78#define IWL_RATE_24M_MASK (1 << IWL_RATE_24M_INDEX)
79#define IWL_RATE_36M_MASK (1 << IWL_RATE_36M_INDEX)
80#define IWL_RATE_48M_MASK (1 << IWL_RATE_48M_INDEX)
81#define IWL_RATE_54M_MASK (1 << IWL_RATE_54M_INDEX)
82#define IWL_RATE_60M_MASK (1 << IWL_RATE_60M_INDEX)
83#define IWL_RATE_1M_MASK (1 << IWL_RATE_1M_INDEX)
84#define IWL_RATE_2M_MASK (1 << IWL_RATE_2M_INDEX)
85#define IWL_RATE_5M_MASK (1 << IWL_RATE_5M_INDEX)
86#define IWL_RATE_11M_MASK (1 << IWL_RATE_11M_INDEX)
87
88
89
90enum {
91 IWL_RATE_HT_SISO_MCS_0_PLCP = 0,
92 IWL_RATE_HT_SISO_MCS_1_PLCP = 1,
93 IWL_RATE_HT_SISO_MCS_2_PLCP = 2,
94 IWL_RATE_HT_SISO_MCS_3_PLCP = 3,
95 IWL_RATE_HT_SISO_MCS_4_PLCP = 4,
96 IWL_RATE_HT_SISO_MCS_5_PLCP = 5,
97 IWL_RATE_HT_SISO_MCS_6_PLCP = 6,
98 IWL_RATE_HT_SISO_MCS_7_PLCP = 7,
99 IWL_RATE_HT_MIMO2_MCS_0_PLCP = 0x8,
100 IWL_RATE_HT_MIMO2_MCS_1_PLCP = 0x9,
101 IWL_RATE_HT_MIMO2_MCS_2_PLCP = 0xA,
102 IWL_RATE_HT_MIMO2_MCS_3_PLCP = 0xB,
103 IWL_RATE_HT_MIMO2_MCS_4_PLCP = 0xC,
104 IWL_RATE_HT_MIMO2_MCS_5_PLCP = 0xD,
105 IWL_RATE_HT_MIMO2_MCS_6_PLCP = 0xE,
106 IWL_RATE_HT_MIMO2_MCS_7_PLCP = 0xF,
107 IWL_RATE_VHT_SISO_MCS_0_PLCP = 0,
108 IWL_RATE_VHT_SISO_MCS_1_PLCP = 1,
109 IWL_RATE_VHT_SISO_MCS_2_PLCP = 2,
110 IWL_RATE_VHT_SISO_MCS_3_PLCP = 3,
111 IWL_RATE_VHT_SISO_MCS_4_PLCP = 4,
112 IWL_RATE_VHT_SISO_MCS_5_PLCP = 5,
113 IWL_RATE_VHT_SISO_MCS_6_PLCP = 6,
114 IWL_RATE_VHT_SISO_MCS_7_PLCP = 7,
115 IWL_RATE_VHT_SISO_MCS_8_PLCP = 8,
116 IWL_RATE_VHT_SISO_MCS_9_PLCP = 9,
117 IWL_RATE_VHT_MIMO2_MCS_0_PLCP = 0x10,
118 IWL_RATE_VHT_MIMO2_MCS_1_PLCP = 0x11,
119 IWL_RATE_VHT_MIMO2_MCS_2_PLCP = 0x12,
120 IWL_RATE_VHT_MIMO2_MCS_3_PLCP = 0x13,
121 IWL_RATE_VHT_MIMO2_MCS_4_PLCP = 0x14,
122 IWL_RATE_VHT_MIMO2_MCS_5_PLCP = 0x15,
123 IWL_RATE_VHT_MIMO2_MCS_6_PLCP = 0x16,
124 IWL_RATE_VHT_MIMO2_MCS_7_PLCP = 0x17,
125 IWL_RATE_VHT_MIMO2_MCS_8_PLCP = 0x18,
126 IWL_RATE_VHT_MIMO2_MCS_9_PLCP = 0x19,
127 IWL_RATE_HT_SISO_MCS_INV_PLCP,
128 IWL_RATE_HT_MIMO2_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
129 IWL_RATE_VHT_SISO_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
130 IWL_RATE_VHT_MIMO2_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
131 IWL_RATE_HT_SISO_MCS_8_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
132 IWL_RATE_HT_SISO_MCS_9_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
133 IWL_RATE_HT_MIMO2_MCS_8_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
134 IWL_RATE_HT_MIMO2_MCS_9_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP,
135};
136
137#define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1)
138
139#define IWL_INVALID_VALUE -1
140
141#define TPC_MAX_REDUCTION 15
142#define TPC_NO_REDUCTION 0
143#define TPC_INVALID 0xff
144
145#define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
146#define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
147#define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
148
149#define LQ_SIZE 2
150
151
152#define IWL_AGG_TPT_THREHOLD 0
153#define IWL_AGG_ALL_TID 0xff
154
155enum iwl_table_type {
156 LQ_NONE,
157 LQ_LEGACY_G,
158 LQ_LEGACY_A,
159 LQ_HT_SISO,
160 LQ_HT_MIMO2,
161 LQ_VHT_SISO,
162 LQ_VHT_MIMO2,
163 LQ_MAX,
164};
165
166struct rs_rate {
167 int index;
168 enum iwl_table_type type;
169 u8 ant;
170 u32 bw;
171 bool sgi;
172 bool ldpc;
173 bool stbc;
174 bool bfer;
175};
176
177
178#define is_type_legacy(type) (((type) == LQ_LEGACY_G) || \
179 ((type) == LQ_LEGACY_A))
180#define is_type_ht_siso(type) ((type) == LQ_HT_SISO)
181#define is_type_ht_mimo2(type) ((type) == LQ_HT_MIMO2)
182#define is_type_vht_siso(type) ((type) == LQ_VHT_SISO)
183#define is_type_vht_mimo2(type) ((type) == LQ_VHT_MIMO2)
184#define is_type_siso(type) (is_type_ht_siso(type) || is_type_vht_siso(type))
185#define is_type_mimo2(type) (is_type_ht_mimo2(type) || is_type_vht_mimo2(type))
186#define is_type_mimo(type) (is_type_mimo2(type))
187#define is_type_ht(type) (is_type_ht_siso(type) || is_type_ht_mimo2(type))
188#define is_type_vht(type) (is_type_vht_siso(type) || is_type_vht_mimo2(type))
189#define is_type_a_band(type) ((type) == LQ_LEGACY_A)
190#define is_type_g_band(type) ((type) == LQ_LEGACY_G)
191
192#define is_legacy(rate) is_type_legacy((rate)->type)
193#define is_ht_siso(rate) is_type_ht_siso((rate)->type)
194#define is_ht_mimo2(rate) is_type_ht_mimo2((rate)->type)
195#define is_vht_siso(rate) is_type_vht_siso((rate)->type)
196#define is_vht_mimo2(rate) is_type_vht_mimo2((rate)->type)
197#define is_siso(rate) is_type_siso((rate)->type)
198#define is_mimo2(rate) is_type_mimo2((rate)->type)
199#define is_mimo(rate) is_type_mimo((rate)->type)
200#define is_ht(rate) is_type_ht((rate)->type)
201#define is_vht(rate) is_type_vht((rate)->type)
202#define is_a_band(rate) is_type_a_band((rate)->type)
203#define is_g_band(rate) is_type_g_band((rate)->type)
204
205#define is_ht20(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_20)
206#define is_ht40(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_40)
207#define is_ht80(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_80)
208#define is_ht160(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_160)
209
210#define IWL_MAX_MCS_DISPLAY_SIZE 12
211
212struct iwl_rate_mcs_info {
213 char mbps[IWL_MAX_MCS_DISPLAY_SIZE];
214 char mcs[IWL_MAX_MCS_DISPLAY_SIZE];
215};
216
217
218
219
220struct iwl_rate_scale_data {
221 u64 data;
222 s32 success_counter;
223 s32 success_ratio;
224 s32 counter;
225 s32 average_tpt;
226};
227
228
229
230
231enum rs_column {
232 RS_COLUMN_LEGACY_ANT_A = 0,
233 RS_COLUMN_LEGACY_ANT_B,
234 RS_COLUMN_SISO_ANT_A,
235 RS_COLUMN_SISO_ANT_B,
236 RS_COLUMN_SISO_ANT_A_SGI,
237 RS_COLUMN_SISO_ANT_B_SGI,
238 RS_COLUMN_MIMO2,
239 RS_COLUMN_MIMO2_SGI,
240
241 RS_COLUMN_LAST = RS_COLUMN_MIMO2_SGI,
242 RS_COLUMN_COUNT = RS_COLUMN_LAST + 1,
243 RS_COLUMN_INVALID,
244};
245
246enum rs_ss_force_opt {
247 RS_SS_FORCE_NONE = 0,
248 RS_SS_FORCE_STBC,
249 RS_SS_FORCE_BFER,
250 RS_SS_FORCE_SISO,
251};
252
253
254struct rs_rate_stats {
255 u64 success;
256 u64 total;
257};
258
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264
265struct iwl_scale_tbl_info {
266 struct rs_rate rate;
267 enum rs_column column;
268 const u16 *expected_tpt;
269 struct iwl_rate_scale_data win[IWL_RATE_COUNT];
270
271 struct iwl_rate_scale_data tpc_win[TPC_MAX_REDUCTION + 1];
272};
273
274enum {
275 RS_STATE_SEARCH_CYCLE_STARTED,
276 RS_STATE_SEARCH_CYCLE_ENDED,
277 RS_STATE_STAY_IN_COLUMN,
278};
279
280
281
282
283
284
285struct iwl_lq_sta {
286 u8 active_tbl;
287 u8 rs_state;
288 u8 search_better_tbl;
289 s32 last_tpt;
290
291
292 u32 table_count_limit;
293 u32 max_failure_limit;
294 u32 max_success_limit;
295 u32 table_count;
296 u32 total_failed;
297 u32 total_success;
298 u64 flush_timer;
299
300 u32 visited_columns;
301
302
303 u64 last_tx;
304 bool is_vht;
305 bool ldpc;
306 bool stbc_capable;
307 bool bfer_capable;
308
309 enum nl80211_band band;
310
311
312 unsigned long active_legacy_rate;
313 unsigned long active_siso_rate;
314 unsigned long active_mimo2_rate;
315
316
317 u8 max_legacy_rate_idx;
318 u8 max_siso_rate_idx;
319 u8 max_mimo2_rate_idx;
320
321
322
323
324 struct rs_rate optimal_rate;
325 unsigned long optimal_rate_mask;
326 const struct rs_init_rate_info *optimal_rates;
327 int optimal_nentries;
328
329 u8 missed_rate_counter;
330
331 struct iwl_lq_cmd lq;
332 struct iwl_scale_tbl_info lq_info[LQ_SIZE];
333 u8 tx_agg_tid_en;
334
335
336 u32 last_rate_n_flags;
337
338 u8 is_agg;
339
340
341 int tpc_reduce;
342
343
344 struct lq_sta_pers {
345#ifdef CONFIG_MAC80211_DEBUGFS
346 u32 dbg_fixed_rate;
347 u8 dbg_fixed_txp_reduction;
348
349
350 enum rs_ss_force_opt ss_force;
351#endif
352 u8 chains;
353 s8 chain_signal[IEEE80211_MAX_CHAINS];
354 s8 last_rssi;
355 struct rs_rate_stats tx_stats[RS_COLUMN_COUNT][IWL_RATE_COUNT];
356 struct iwl_mvm *drv;
357 } pers;
358};
359
360
361void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
362 enum nl80211_band band, bool init);
363
364
365void iwl_mvm_rs_tx_status(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
366 int tid, struct ieee80211_tx_info *info, bool ndp);
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377
378int iwl_mvm_rate_control_register(void);
379
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385
386void iwl_mvm_rate_control_unregister(void);
387
388struct iwl_mvm_sta;
389
390int iwl_mvm_tx_protection(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta,
391 bool enable);
392
393#endif
394