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9#include <linux/interrupt.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/i2c.h>
14#include <linux/module.h>
15
16#include <linux/iio/iio.h>
17#include <linux/iio/sysfs.h>
18#include <linux/iio/events.h>
19
20
21
22
23#define AD7150_STATUS 0
24#define AD7150_STATUS_OUT1 BIT(3)
25#define AD7150_STATUS_OUT2 BIT(5)
26#define AD7150_CH1_DATA_HIGH 1
27#define AD7150_CH2_DATA_HIGH 3
28#define AD7150_CH1_AVG_HIGH 5
29#define AD7150_CH2_AVG_HIGH 7
30#define AD7150_CH1_SENSITIVITY 9
31#define AD7150_CH1_THR_HOLD_H 9
32#define AD7150_CH1_TIMEOUT 10
33#define AD7150_CH1_SETUP 11
34#define AD7150_CH2_SENSITIVITY 12
35#define AD7150_CH2_THR_HOLD_H 12
36#define AD7150_CH2_TIMEOUT 13
37#define AD7150_CH2_SETUP 14
38#define AD7150_CFG 15
39#define AD7150_CFG_FIX BIT(7)
40#define AD7150_PD_TIMER 16
41#define AD7150_CH1_CAPDAC 17
42#define AD7150_CH2_CAPDAC 18
43#define AD7150_SN3 19
44#define AD7150_SN2 20
45#define AD7150_SN1 21
46#define AD7150_SN0 22
47#define AD7150_ID 23
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71struct ad7150_chip_info {
72 struct i2c_client *client;
73 u64 current_event;
74 u16 threshold[2][2];
75 u8 thresh_sensitivity[2][2];
76 u8 mag_sensitivity[2][2];
77 u8 thresh_timeout[2][2];
78 u8 mag_timeout[2][2];
79 int old_state;
80 char *conversion_mode;
81 struct mutex state_lock;
82};
83
84
85
86
87
88static const u8 ad7150_addresses[][6] = {
89 { AD7150_CH1_DATA_HIGH, AD7150_CH1_AVG_HIGH,
90 AD7150_CH1_SETUP, AD7150_CH1_THR_HOLD_H,
91 AD7150_CH1_SENSITIVITY, AD7150_CH1_TIMEOUT },
92 { AD7150_CH2_DATA_HIGH, AD7150_CH2_AVG_HIGH,
93 AD7150_CH2_SETUP, AD7150_CH2_THR_HOLD_H,
94 AD7150_CH2_SENSITIVITY, AD7150_CH2_TIMEOUT },
95};
96
97static int ad7150_read_raw(struct iio_dev *indio_dev,
98 struct iio_chan_spec const *chan,
99 int *val,
100 int *val2,
101 long mask)
102{
103 int ret;
104 struct ad7150_chip_info *chip = iio_priv(indio_dev);
105
106 switch (mask) {
107 case IIO_CHAN_INFO_RAW:
108 ret = i2c_smbus_read_word_data(chip->client,
109 ad7150_addresses[chan->channel][0]);
110 if (ret < 0)
111 return ret;
112 *val = swab16(ret);
113 return IIO_VAL_INT;
114 case IIO_CHAN_INFO_AVERAGE_RAW:
115 ret = i2c_smbus_read_word_data(chip->client,
116 ad7150_addresses[chan->channel][1]);
117 if (ret < 0)
118 return ret;
119 *val = swab16(ret);
120 return IIO_VAL_INT;
121 default:
122 return -EINVAL;
123 }
124}
125
126static int ad7150_read_event_config(struct iio_dev *indio_dev,
127 const struct iio_chan_spec *chan, enum iio_event_type type,
128 enum iio_event_direction dir)
129{
130 int ret;
131 u8 threshtype;
132 bool adaptive;
133 struct ad7150_chip_info *chip = iio_priv(indio_dev);
134
135 ret = i2c_smbus_read_byte_data(chip->client, AD7150_CFG);
136 if (ret < 0)
137 return ret;
138
139 threshtype = (ret >> 5) & 0x03;
140 adaptive = !!(ret & 0x80);
141
142 switch (type) {
143 case IIO_EV_TYPE_MAG_ADAPTIVE:
144 if (dir == IIO_EV_DIR_RISING)
145 return adaptive && (threshtype == 0x1);
146 return adaptive && (threshtype == 0x0);
147 case IIO_EV_TYPE_THRESH_ADAPTIVE:
148 if (dir == IIO_EV_DIR_RISING)
149 return adaptive && (threshtype == 0x3);
150 return adaptive && (threshtype == 0x2);
151 case IIO_EV_TYPE_THRESH:
152 if (dir == IIO_EV_DIR_RISING)
153 return !adaptive && (threshtype == 0x1);
154 return !adaptive && (threshtype == 0x0);
155 default:
156 break;
157 }
158 return -EINVAL;
159}
160
161
162static int ad7150_write_event_params(struct iio_dev *indio_dev,
163 unsigned int chan,
164 enum iio_event_type type,
165 enum iio_event_direction dir)
166{
167 int ret;
168 u16 value;
169 u8 sens, timeout;
170 struct ad7150_chip_info *chip = iio_priv(indio_dev);
171 int rising = (dir == IIO_EV_DIR_RISING);
172 u64 event_code;
173
174 event_code = IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE, chan, type, dir);
175
176 if (event_code != chip->current_event)
177 return 0;
178
179 switch (type) {
180
181 case IIO_EV_TYPE_THRESH:
182 value = chip->threshold[rising][chan];
183 return i2c_smbus_write_word_data(chip->client,
184 ad7150_addresses[chan][3],
185 swab16(value));
186 case IIO_EV_TYPE_MAG_ADAPTIVE:
187 sens = chip->mag_sensitivity[rising][chan];
188 timeout = chip->mag_timeout[rising][chan];
189 break;
190 case IIO_EV_TYPE_THRESH_ADAPTIVE:
191 sens = chip->thresh_sensitivity[rising][chan];
192 timeout = chip->thresh_timeout[rising][chan];
193 break;
194 default:
195 return -EINVAL;
196 }
197 ret = i2c_smbus_write_byte_data(chip->client,
198 ad7150_addresses[chan][4],
199 sens);
200 if (ret < 0)
201 return ret;
202
203 ret = i2c_smbus_write_byte_data(chip->client,
204 ad7150_addresses[chan][5],
205 timeout);
206 if (ret < 0)
207 return ret;
208
209 return 0;
210}
211
212static int ad7150_write_event_config(struct iio_dev *indio_dev,
213 const struct iio_chan_spec *chan,
214 enum iio_event_type type,
215 enum iio_event_direction dir, int state)
216{
217 u8 thresh_type, cfg, adaptive;
218 int ret;
219 struct ad7150_chip_info *chip = iio_priv(indio_dev);
220 int rising = (dir == IIO_EV_DIR_RISING);
221 u64 event_code;
222
223
224 if (!state)
225 return -EINVAL;
226
227 event_code = IIO_UNMOD_EVENT_CODE(chan->type, chan->channel, type, dir);
228 if (event_code == chip->current_event)
229 return 0;
230 mutex_lock(&chip->state_lock);
231 ret = i2c_smbus_read_byte_data(chip->client, AD7150_CFG);
232 if (ret < 0)
233 goto error_ret;
234
235 cfg = ret & ~((0x03 << 5) | (0x1 << 7));
236
237 switch (type) {
238 case IIO_EV_TYPE_MAG_ADAPTIVE:
239 adaptive = 1;
240 if (rising)
241 thresh_type = 0x1;
242 else
243 thresh_type = 0x0;
244 break;
245 case IIO_EV_TYPE_THRESH_ADAPTIVE:
246 adaptive = 1;
247 if (rising)
248 thresh_type = 0x3;
249 else
250 thresh_type = 0x2;
251 break;
252 case IIO_EV_TYPE_THRESH:
253 adaptive = 0;
254 if (rising)
255 thresh_type = 0x1;
256 else
257 thresh_type = 0x0;
258 break;
259 default:
260 ret = -EINVAL;
261 goto error_ret;
262 }
263
264 cfg |= (!adaptive << 7) | (thresh_type << 5);
265
266 ret = i2c_smbus_write_byte_data(chip->client, AD7150_CFG, cfg);
267 if (ret < 0)
268 goto error_ret;
269
270 chip->current_event = event_code;
271
272
273 ret = ad7150_write_event_params(indio_dev, chan->channel, type, dir);
274error_ret:
275 mutex_unlock(&chip->state_lock);
276
277 return 0;
278}
279
280static int ad7150_read_event_value(struct iio_dev *indio_dev,
281 const struct iio_chan_spec *chan,
282 enum iio_event_type type,
283 enum iio_event_direction dir,
284 enum iio_event_info info,
285 int *val, int *val2)
286{
287 struct ad7150_chip_info *chip = iio_priv(indio_dev);
288 int rising = (dir == IIO_EV_DIR_RISING);
289
290
291 switch (type) {
292 case IIO_EV_TYPE_MAG_ADAPTIVE:
293 *val = chip->mag_sensitivity[rising][chan->channel];
294 return IIO_VAL_INT;
295 case IIO_EV_TYPE_THRESH_ADAPTIVE:
296 *val = chip->thresh_sensitivity[rising][chan->channel];
297 return IIO_VAL_INT;
298 case IIO_EV_TYPE_THRESH:
299 *val = chip->threshold[rising][chan->channel];
300 return IIO_VAL_INT;
301 default:
302 return -EINVAL;
303 }
304}
305
306static int ad7150_write_event_value(struct iio_dev *indio_dev,
307 const struct iio_chan_spec *chan,
308 enum iio_event_type type,
309 enum iio_event_direction dir,
310 enum iio_event_info info,
311 int val, int val2)
312{
313 int ret;
314 struct ad7150_chip_info *chip = iio_priv(indio_dev);
315 int rising = (dir == IIO_EV_DIR_RISING);
316
317 mutex_lock(&chip->state_lock);
318 switch (type) {
319 case IIO_EV_TYPE_MAG_ADAPTIVE:
320 chip->mag_sensitivity[rising][chan->channel] = val;
321 break;
322 case IIO_EV_TYPE_THRESH_ADAPTIVE:
323 chip->thresh_sensitivity[rising][chan->channel] = val;
324 break;
325 case IIO_EV_TYPE_THRESH:
326 chip->threshold[rising][chan->channel] = val;
327 break;
328 default:
329 ret = -EINVAL;
330 goto error_ret;
331 }
332
333
334 ret = ad7150_write_event_params(indio_dev, chan->channel, type, dir);
335
336error_ret:
337 mutex_unlock(&chip->state_lock);
338 return ret;
339}
340
341static ssize_t ad7150_show_timeout(struct device *dev,
342 struct device_attribute *attr,
343 char *buf)
344{
345 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
346 struct ad7150_chip_info *chip = iio_priv(indio_dev);
347 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
348 u8 value;
349
350
351 int chan = IIO_EVENT_CODE_EXTRACT_CHAN(this_attr->address);
352 int rising = !!(IIO_EVENT_CODE_EXTRACT_DIR(this_attr->address)
353 == IIO_EV_DIR_RISING);
354
355 switch (IIO_EVENT_CODE_EXTRACT_TYPE(this_attr->address)) {
356 case IIO_EV_TYPE_MAG_ADAPTIVE:
357 value = chip->mag_timeout[rising][chan];
358 break;
359 case IIO_EV_TYPE_THRESH_ADAPTIVE:
360 value = chip->thresh_timeout[rising][chan];
361 break;
362 default:
363 return -EINVAL;
364 }
365
366 return sprintf(buf, "%d\n", value);
367}
368
369static ssize_t ad7150_store_timeout(struct device *dev,
370 struct device_attribute *attr,
371 const char *buf,
372 size_t len)
373{
374 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
375 struct ad7150_chip_info *chip = iio_priv(indio_dev);
376 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
377 int chan = IIO_EVENT_CODE_EXTRACT_CHAN(this_attr->address);
378 enum iio_event_direction dir;
379 enum iio_event_type type;
380 int rising;
381 u8 data;
382 int ret;
383
384 type = IIO_EVENT_CODE_EXTRACT_TYPE(this_attr->address);
385 dir = IIO_EVENT_CODE_EXTRACT_DIR(this_attr->address);
386 rising = (dir == IIO_EV_DIR_RISING);
387
388 ret = kstrtou8(buf, 10, &data);
389 if (ret < 0)
390 return ret;
391
392 mutex_lock(&chip->state_lock);
393 switch (type) {
394 case IIO_EV_TYPE_MAG_ADAPTIVE:
395 chip->mag_timeout[rising][chan] = data;
396 break;
397 case IIO_EV_TYPE_THRESH_ADAPTIVE:
398 chip->thresh_timeout[rising][chan] = data;
399 break;
400 default:
401 ret = -EINVAL;
402 goto error_ret;
403 }
404
405 ret = ad7150_write_event_params(indio_dev, chan, type, dir);
406error_ret:
407 mutex_unlock(&chip->state_lock);
408
409 if (ret < 0)
410 return ret;
411
412 return len;
413}
414
415#define AD7150_TIMEOUT(chan, type, dir, ev_type, ev_dir) \
416 IIO_DEVICE_ATTR(in_capacitance##chan##_##type##_##dir##_timeout, \
417 S_IRUGO | S_IWUSR, \
418 &ad7150_show_timeout, \
419 &ad7150_store_timeout, \
420 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE, \
421 chan, \
422 IIO_EV_TYPE_##ev_type, \
423 IIO_EV_DIR_##ev_dir))
424static AD7150_TIMEOUT(0, mag_adaptive, rising, MAG_ADAPTIVE, RISING);
425static AD7150_TIMEOUT(0, mag_adaptive, falling, MAG_ADAPTIVE, FALLING);
426static AD7150_TIMEOUT(1, mag_adaptive, rising, MAG_ADAPTIVE, RISING);
427static AD7150_TIMEOUT(1, mag_adaptive, falling, MAG_ADAPTIVE, FALLING);
428static AD7150_TIMEOUT(0, thresh_adaptive, rising, THRESH_ADAPTIVE, RISING);
429static AD7150_TIMEOUT(0, thresh_adaptive, falling, THRESH_ADAPTIVE, FALLING);
430static AD7150_TIMEOUT(1, thresh_adaptive, rising, THRESH_ADAPTIVE, RISING);
431static AD7150_TIMEOUT(1, thresh_adaptive, falling, THRESH_ADAPTIVE, FALLING);
432
433static const struct iio_event_spec ad7150_events[] = {
434 {
435 .type = IIO_EV_TYPE_THRESH,
436 .dir = IIO_EV_DIR_RISING,
437 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
438 BIT(IIO_EV_INFO_ENABLE),
439 }, {
440 .type = IIO_EV_TYPE_THRESH,
441 .dir = IIO_EV_DIR_FALLING,
442 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
443 BIT(IIO_EV_INFO_ENABLE),
444 }, {
445 .type = IIO_EV_TYPE_THRESH_ADAPTIVE,
446 .dir = IIO_EV_DIR_RISING,
447 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
448 BIT(IIO_EV_INFO_ENABLE),
449 }, {
450 .type = IIO_EV_TYPE_THRESH_ADAPTIVE,
451 .dir = IIO_EV_DIR_FALLING,
452 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
453 BIT(IIO_EV_INFO_ENABLE),
454 }, {
455 .type = IIO_EV_TYPE_MAG_ADAPTIVE,
456 .dir = IIO_EV_DIR_RISING,
457 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
458 BIT(IIO_EV_INFO_ENABLE),
459 }, {
460 .type = IIO_EV_TYPE_MAG_ADAPTIVE,
461 .dir = IIO_EV_DIR_FALLING,
462 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
463 BIT(IIO_EV_INFO_ENABLE),
464 },
465};
466
467static const struct iio_chan_spec ad7150_channels[] = {
468 {
469 .type = IIO_CAPACITANCE,
470 .indexed = 1,
471 .channel = 0,
472 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
473 BIT(IIO_CHAN_INFO_AVERAGE_RAW),
474 .event_spec = ad7150_events,
475 .num_event_specs = ARRAY_SIZE(ad7150_events),
476 }, {
477 .type = IIO_CAPACITANCE,
478 .indexed = 1,
479 .channel = 1,
480 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
481 BIT(IIO_CHAN_INFO_AVERAGE_RAW),
482 .event_spec = ad7150_events,
483 .num_event_specs = ARRAY_SIZE(ad7150_events),
484 },
485};
486
487
488
489
490
491static irqreturn_t ad7150_event_handler(int irq, void *private)
492{
493 struct iio_dev *indio_dev = private;
494 struct ad7150_chip_info *chip = iio_priv(indio_dev);
495 u8 int_status;
496 s64 timestamp = iio_get_time_ns(indio_dev);
497 int ret;
498
499 ret = i2c_smbus_read_byte_data(chip->client, AD7150_STATUS);
500 if (ret < 0)
501 return IRQ_HANDLED;
502
503 int_status = ret;
504
505 if ((int_status & AD7150_STATUS_OUT1) &&
506 !(chip->old_state & AD7150_STATUS_OUT1))
507 iio_push_event(indio_dev,
508 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
509 0,
510 IIO_EV_TYPE_THRESH,
511 IIO_EV_DIR_RISING),
512 timestamp);
513 else if ((!(int_status & AD7150_STATUS_OUT1)) &&
514 (chip->old_state & AD7150_STATUS_OUT1))
515 iio_push_event(indio_dev,
516 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
517 0,
518 IIO_EV_TYPE_THRESH,
519 IIO_EV_DIR_FALLING),
520 timestamp);
521
522 if ((int_status & AD7150_STATUS_OUT2) &&
523 !(chip->old_state & AD7150_STATUS_OUT2))
524 iio_push_event(indio_dev,
525 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
526 1,
527 IIO_EV_TYPE_THRESH,
528 IIO_EV_DIR_RISING),
529 timestamp);
530 else if ((!(int_status & AD7150_STATUS_OUT2)) &&
531 (chip->old_state & AD7150_STATUS_OUT2))
532 iio_push_event(indio_dev,
533 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
534 1,
535 IIO_EV_TYPE_THRESH,
536 IIO_EV_DIR_FALLING),
537 timestamp);
538
539 chip->old_state = int_status;
540
541 return IRQ_HANDLED;
542}
543
544
545static struct attribute *ad7150_event_attributes[] = {
546 &iio_dev_attr_in_capacitance0_mag_adaptive_rising_timeout
547 .dev_attr.attr,
548 &iio_dev_attr_in_capacitance0_mag_adaptive_falling_timeout
549 .dev_attr.attr,
550 &iio_dev_attr_in_capacitance1_mag_adaptive_rising_timeout
551 .dev_attr.attr,
552 &iio_dev_attr_in_capacitance1_mag_adaptive_falling_timeout
553 .dev_attr.attr,
554 &iio_dev_attr_in_capacitance0_thresh_adaptive_rising_timeout
555 .dev_attr.attr,
556 &iio_dev_attr_in_capacitance0_thresh_adaptive_falling_timeout
557 .dev_attr.attr,
558 &iio_dev_attr_in_capacitance1_thresh_adaptive_rising_timeout
559 .dev_attr.attr,
560 &iio_dev_attr_in_capacitance1_thresh_adaptive_falling_timeout
561 .dev_attr.attr,
562 NULL,
563};
564
565static struct attribute_group ad7150_event_attribute_group = {
566 .attrs = ad7150_event_attributes,
567 .name = "events",
568};
569
570static const struct iio_info ad7150_info = {
571 .event_attrs = &ad7150_event_attribute_group,
572 .driver_module = THIS_MODULE,
573 .read_raw = &ad7150_read_raw,
574 .read_event_config = &ad7150_read_event_config,
575 .write_event_config = &ad7150_write_event_config,
576 .read_event_value = &ad7150_read_event_value,
577 .write_event_value = &ad7150_write_event_value,
578};
579
580
581
582
583
584static int ad7150_probe(struct i2c_client *client,
585 const struct i2c_device_id *id)
586{
587 int ret;
588 struct ad7150_chip_info *chip;
589 struct iio_dev *indio_dev;
590
591 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
592 if (!indio_dev)
593 return -ENOMEM;
594 chip = iio_priv(indio_dev);
595 mutex_init(&chip->state_lock);
596
597 i2c_set_clientdata(client, indio_dev);
598
599 chip->client = client;
600
601 indio_dev->name = id->name;
602 indio_dev->channels = ad7150_channels;
603 indio_dev->num_channels = ARRAY_SIZE(ad7150_channels);
604
605 indio_dev->dev.parent = &client->dev;
606
607 indio_dev->info = &ad7150_info;
608
609 indio_dev->modes = INDIO_DIRECT_MODE;
610
611 if (client->irq) {
612 ret = devm_request_threaded_irq(&client->dev, client->irq,
613 NULL,
614 &ad7150_event_handler,
615 IRQF_TRIGGER_RISING |
616 IRQF_TRIGGER_FALLING |
617 IRQF_ONESHOT,
618 "ad7150_irq1",
619 indio_dev);
620 if (ret)
621 return ret;
622 }
623
624 if (client->dev.platform_data) {
625 ret = devm_request_threaded_irq(&client->dev, *(unsigned int *)
626 client->dev.platform_data,
627 NULL,
628 &ad7150_event_handler,
629 IRQF_TRIGGER_RISING |
630 IRQF_TRIGGER_FALLING |
631 IRQF_ONESHOT,
632 "ad7150_irq2",
633 indio_dev);
634 if (ret)
635 return ret;
636 }
637
638 ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
639 if (ret)
640 return ret;
641
642 dev_info(&client->dev, "%s capacitive sensor registered,irq: %d\n",
643 id->name, client->irq);
644
645 return 0;
646}
647
648static const struct i2c_device_id ad7150_id[] = {
649 { "ad7150", 0 },
650 { "ad7151", 0 },
651 { "ad7156", 0 },
652 {}
653};
654
655MODULE_DEVICE_TABLE(i2c, ad7150_id);
656
657static struct i2c_driver ad7150_driver = {
658 .driver = {
659 .name = "ad7150",
660 },
661 .probe = ad7150_probe,
662 .id_table = ad7150_id,
663};
664module_i2c_driver(ad7150_driver);
665
666MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
667MODULE_DESCRIPTION("Analog Devices AD7150/1/6 capacitive sensor driver");
668MODULE_LICENSE("GPL v2");
669
