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15#define _HCI_HAL_INIT_C_
16
17#include <osdep_service.h>
18#include <drv_types.h>
19#include <rtw_efuse.h>
20#include <fw.h>
21#include <rtl8188e_hal.h>
22#include <rtl8188e_led.h>
23#include <rtw_iol.h>
24#include <phy.h>
25
26#define HAL_BB_ENABLE 1
27
28static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
29{
30 struct hal_data_8188e *haldata = adapt->HalData;
31
32 switch (NumOutPipe) {
33 case 3:
34 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
35 haldata->OutEpNumber = 3;
36 break;
37 case 2:
38 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
39 haldata->OutEpNumber = 2;
40 break;
41 case 1:
42 haldata->OutEpQueueSel = TX_SELE_HQ;
43 haldata->OutEpNumber = 1;
44 break;
45 default:
46 break;
47 }
48 DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
49}
50
51static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
52{
53 bool result = false;
54
55 _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
56
57
58 if (adapt->HalData->OutEpNumber == 1) {
59 if (NumInPipe != 1)
60 return result;
61 }
62
63
64
65 result = Hal_MappingOutPipe(adapt, NumOutPipe);
66
67 return result;
68}
69
70void rtw_hal_chip_configure(struct adapter *adapt)
71{
72 struct hal_data_8188e *haldata = adapt->HalData;
73 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
74
75 if (pdvobjpriv->ishighspeed)
76 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;
77 else
78 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;
79
80 haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
81
82 haldata->UsbTxAggMode = 1;
83 haldata->UsbTxAggDescNum = 0x6;
84
85 haldata->UsbRxAggMode = USB_RX_AGG_DMA;
86 haldata->UsbRxAggBlockCount = 8;
87 haldata->UsbRxAggBlockTimeout = 0x6;
88 haldata->UsbRxAggPageCount = 48;
89 haldata->UsbRxAggPageTimeout = 0x4;
90
91 HalUsbSetQueuePipeMapping8188EUsb(adapt,
92 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
93}
94
95u32 rtw_hal_power_on(struct adapter *adapt)
96{
97 u16 value16;
98
99 if (adapt->HalData->bMacPwrCtrlOn)
100 return _SUCCESS;
101
102 if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
103 Rtl8188E_NIC_PWR_ON_FLOW)) {
104 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
105 return _FAIL;
106 }
107
108
109
110 usb_write16(adapt, REG_CR, 0x00);
111
112
113 value16 = usb_read16(adapt, REG_CR);
114 value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
115 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
116
117
118 usb_write16(adapt, REG_CR, value16);
119 adapt->HalData->bMacPwrCtrlOn = true;
120
121 return _SUCCESS;
122}
123
124
125static void _InitInterrupt(struct adapter *Adapter)
126{
127 u32 imr, imr_ex;
128 u8 usb_opt;
129
130
131 usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
132
133 imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
134 usb_write32(Adapter, REG_HIMR_88E, imr);
135 Adapter->HalData->IntrMask[0] = imr;
136
137 imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
138 usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
139 Adapter->HalData->IntrMask[1] = imr_ex;
140
141
142
143
144 usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
145
146 if (!adapter_to_dvobj(Adapter)->ishighspeed)
147 usb_opt = usb_opt & (~INT_BULK_SEL);
148 else
149 usb_opt = usb_opt | (INT_BULK_SEL);
150
151 usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
152}
153
154static void _InitQueueReservedPage(struct adapter *Adapter)
155{
156 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
157 u32 numHQ = 0;
158 u32 numLQ = 0;
159 u32 numNQ = 0;
160 u32 numPubQ;
161 u32 value32;
162 u8 value8;
163 bool bWiFiConfig = pregistrypriv->wifi_spec;
164
165 if (bWiFiConfig) {
166 if (Adapter->HalData->OutEpQueueSel & TX_SELE_HQ)
167 numHQ = 0x29;
168
169 if (Adapter->HalData->OutEpQueueSel & TX_SELE_LQ)
170 numLQ = 0x1C;
171
172
173 if (Adapter->HalData->OutEpQueueSel & TX_SELE_NQ)
174 numNQ = 0x1C;
175 value8 = (u8)_NPQ(numNQ);
176 usb_write8(Adapter, REG_RQPN_NPQ, value8);
177
178 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
179
180
181 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
182 usb_write32(Adapter, REG_RQPN, value32);
183 } else {
184 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);
185 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
186 usb_write32(Adapter, REG_RQPN, 0x808E000d);
187 }
188}
189
190static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
191{
192 usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
193 usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
194 usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
195 usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
196 usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
197}
198
199static void _InitPageBoundary(struct adapter *Adapter)
200{
201
202
203 u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
204
205 usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
206}
207
208static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
209 u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
210 u16 hiQ)
211{
212 u16 value16 = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
213
214 value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
215 _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
216 _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
217
218 usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
219}
220
221static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
222{
223 u16 value = 0;
224
225 switch (Adapter->HalData->OutEpQueueSel) {
226 case TX_SELE_HQ:
227 value = QUEUE_HIGH;
228 break;
229 case TX_SELE_LQ:
230 value = QUEUE_LOW;
231 break;
232 case TX_SELE_NQ:
233 value = QUEUE_NORMAL;
234 break;
235 default:
236 break;
237 }
238 _InitNormalChipRegPriority(Adapter, value, value, value, value,
239 value, value);
240}
241
242static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
243{
244 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
245 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
246 u16 valueHi = 0;
247 u16 valueLow = 0;
248
249 switch (Adapter->HalData->OutEpQueueSel) {
250 case (TX_SELE_HQ | TX_SELE_LQ):
251 valueHi = QUEUE_HIGH;
252 valueLow = QUEUE_LOW;
253 break;
254 case (TX_SELE_NQ | TX_SELE_LQ):
255 valueHi = QUEUE_NORMAL;
256 valueLow = QUEUE_LOW;
257 break;
258 case (TX_SELE_HQ | TX_SELE_NQ):
259 valueHi = QUEUE_HIGH;
260 valueLow = QUEUE_NORMAL;
261 break;
262 default:
263 break;
264 }
265
266 if (!pregistrypriv->wifi_spec) {
267 beQ = valueLow;
268 bkQ = valueLow;
269 viQ = valueHi;
270 voQ = valueHi;
271 mgtQ = valueHi;
272 hiQ = valueHi;
273 } else {
274 beQ = valueLow;
275 bkQ = valueHi;
276 viQ = valueHi;
277 voQ = valueLow;
278 mgtQ = valueHi;
279 hiQ = valueHi;
280 }
281 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
282}
283
284static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
285{
286 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
287 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
288
289 if (!pregistrypriv->wifi_spec) {
290 beQ = QUEUE_LOW;
291 bkQ = QUEUE_LOW;
292 viQ = QUEUE_NORMAL;
293 voQ = QUEUE_HIGH;
294 mgtQ = QUEUE_HIGH;
295 hiQ = QUEUE_HIGH;
296 } else {
297 beQ = QUEUE_LOW;
298 bkQ = QUEUE_NORMAL;
299 viQ = QUEUE_NORMAL;
300 voQ = QUEUE_HIGH;
301 mgtQ = QUEUE_HIGH;
302 hiQ = QUEUE_HIGH;
303 }
304 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
305}
306
307static void _InitQueuePriority(struct adapter *Adapter)
308{
309 switch (Adapter->HalData->OutEpNumber) {
310 case 1:
311 _InitNormalChipOneOutEpPriority(Adapter);
312 break;
313 case 2:
314 _InitNormalChipTwoOutEpPriority(Adapter);
315 break;
316 case 3:
317 _InitNormalChipThreeOutEpPriority(Adapter);
318 break;
319 default:
320 break;
321 }
322}
323
324static void _InitNetworkType(struct adapter *Adapter)
325{
326 u32 value32;
327
328 value32 = usb_read32(Adapter, REG_CR);
329
330 value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
331
332 usb_write32(Adapter, REG_CR, value32);
333}
334
335static void _InitTransferPageSize(struct adapter *Adapter)
336{
337
338
339 u8 value8;
340 value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
341 usb_write8(Adapter, REG_PBP, value8);
342}
343
344static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
345{
346 usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
347}
348
349static void _InitWMACSetting(struct adapter *Adapter)
350{
351 struct hal_data_8188e *haldata = Adapter->HalData;
352
353 haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
354 RCR_CBSSID_DATA | RCR_CBSSID_BCN |
355 RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
356 RCR_APP_MIC | RCR_APP_PHYSTS;
357
358
359 usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
360
361
362 usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
363 usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
364}
365
366static void _InitAdaptiveCtrl(struct adapter *Adapter)
367{
368 u16 value16;
369 u32 value32;
370
371
372 value32 = usb_read32(Adapter, REG_RRSR);
373 value32 &= ~RATE_BITMAP_ALL;
374 value32 |= RATE_RRSR_CCK_ONLY_1M;
375 usb_write32(Adapter, REG_RRSR, value32);
376
377
378
379
380 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
381 usb_write16(Adapter, REG_SPEC_SIFS, value16);
382
383
384 value16 = _LRL(0x30) | _SRL(0x30);
385 usb_write16(Adapter, REG_RL, value16);
386}
387
388static void _InitEDCA(struct adapter *Adapter)
389{
390
391 usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
392 usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
393
394
395 usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
396
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398 usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
399
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401 usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
402 usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
403 usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
404 usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
405}
406
407static void _InitRDGSetting(struct adapter *Adapter)
408{
409 usb_write8(Adapter, REG_RD_CTRL, 0xFF);
410 usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
411 usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
412}
413
414static void _InitRxSetting(struct adapter *Adapter)
415{
416 usb_write32(Adapter, REG_MACID, 0x87654321);
417 usb_write32(Adapter, 0x0700, 0x87654321);
418}
419
420static void _InitRetryFunction(struct adapter *Adapter)
421{
422 u8 value8;
423
424 value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
425 value8 |= EN_AMPDU_RTY_NEW;
426 usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
427
428
429 usb_write8(Adapter, REG_ACKTO, 0x40);
430}
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448static void usb_AggSettingTxUpdate(struct adapter *Adapter)
449{
450 struct hal_data_8188e *haldata = Adapter->HalData;
451 u32 value32;
452
453 if (Adapter->registrypriv.wifi_spec)
454 haldata->UsbTxAggMode = false;
455
456 if (haldata->UsbTxAggMode) {
457 value32 = usb_read32(Adapter, REG_TDECTRL);
458 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
459 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
460
461 usb_write32(Adapter, REG_TDECTRL, value32);
462 }
463}
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480
481static void
482usb_AggSettingRxUpdate(
483 struct adapter *Adapter
484 )
485{
486 struct hal_data_8188e *haldata = Adapter->HalData;
487 u8 valueDMA;
488 u8 valueUSB;
489
490 valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
491 valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
492
493 switch (haldata->UsbRxAggMode) {
494 case USB_RX_AGG_DMA:
495 valueDMA |= RXDMA_AGG_EN;
496 valueUSB &= ~USB_AGG_EN;
497 break;
498 case USB_RX_AGG_USB:
499 valueDMA &= ~RXDMA_AGG_EN;
500 valueUSB |= USB_AGG_EN;
501 break;
502 case USB_RX_AGG_MIX:
503 valueDMA |= RXDMA_AGG_EN;
504 valueUSB |= USB_AGG_EN;
505 break;
506 case USB_RX_AGG_DISABLE:
507 default:
508 valueDMA &= ~RXDMA_AGG_EN;
509 valueUSB &= ~USB_AGG_EN;
510 break;
511 }
512
513 usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
514 usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
515
516 switch (haldata->UsbRxAggMode) {
517 case USB_RX_AGG_DMA:
518 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
519 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
520 break;
521 case USB_RX_AGG_USB:
522 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
523 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
524 break;
525 case USB_RX_AGG_MIX:
526 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
527 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));
528 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
529 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
530 break;
531 case USB_RX_AGG_DISABLE:
532 default:
533
534 break;
535 }
536
537 switch (PBP_128) {
538 case PBP_128:
539 haldata->HwRxPageSize = 128;
540 break;
541 case PBP_64:
542 haldata->HwRxPageSize = 64;
543 break;
544 case PBP_256:
545 haldata->HwRxPageSize = 256;
546 break;
547 case PBP_512:
548 haldata->HwRxPageSize = 512;
549 break;
550 case PBP_1024:
551 haldata->HwRxPageSize = 1024;
552 break;
553 default:
554 break;
555 }
556}
557
558static void InitUsbAggregationSetting(struct adapter *Adapter)
559{
560
561 usb_AggSettingTxUpdate(Adapter);
562
563
564 usb_AggSettingRxUpdate(Adapter);
565
566
567 Adapter->HalData->UsbRxHighSpeedMode = false;
568}
569
570static void _InitBeaconParameters(struct adapter *Adapter)
571{
572 struct hal_data_8188e *haldata = Adapter->HalData;
573
574 usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
575
576
577 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);
578 usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);
579 usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
580
581
582
583 usb_write16(Adapter, REG_BCNTCFG, 0x660F);
584
585 haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
586 haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
587 haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
588 haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
589 haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
590}
591
592static void _BeaconFunctionEnable(struct adapter *Adapter,
593 bool Enable, bool Linked)
594{
595 usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
596
597 usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
598}
599
600
601static void _BBTurnOnBlock(struct adapter *Adapter)
602{
603 phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
604 phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
605}
606
607enum {
608 Antenna_Lfet = 1,
609 Antenna_Right = 2,
610};
611
612static void _InitAntenna_Selection(struct adapter *Adapter)
613{
614 struct hal_data_8188e *haldata = Adapter->HalData;
615
616 if (haldata->AntDivCfg == 0)
617 return;
618 DBG_88E("==> %s ....\n", __func__);
619
620 usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23));
621 phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
622
623 if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
624 haldata->CurAntenna = Antenna_A;
625 else
626 haldata->CurAntenna = Antenna_B;
627 DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
628}
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645
646enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
647{
648 u8 val8;
649 enum rt_rf_power_state rfpowerstate = rf_off;
650
651 if (adapt->pwrctrlpriv.bHWPowerdown) {
652 val8 = usb_read8(adapt, REG_HSISR);
653 DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8);
654 rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
655 } else {
656 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT(3)));
657 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
658 DBG_88E("GPIO_IN=%02x\n", val8);
659 rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
660 }
661 return rfpowerstate;
662}
663
664u32 rtl8188eu_hal_init(struct adapter *Adapter)
665{
666 u8 value8 = 0;
667 u16 value16;
668 u8 txpktbuf_bndy;
669 u32 status = _SUCCESS;
670 struct hal_data_8188e *haldata = Adapter->HalData;
671 struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
672 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
673 unsigned long init_start_time = jiffies;
674
675 #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
676
677 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
678
679 if (Adapter->pwrctrlpriv.bkeepfwalive) {
680 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
681 rtl88eu_phy_iq_calibrate(Adapter, true);
682 } else {
683 rtl88eu_phy_iq_calibrate(Adapter, false);
684 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
685 }
686
687 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
688 rtl88eu_phy_lc_calibrate(Adapter);
689
690 goto exit;
691 }
692
693 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
694 status = rtw_hal_power_on(Adapter);
695 if (status == _FAIL) {
696 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
697 goto exit;
698 }
699
700
701 haldata->CurrentChannel = 6;
702
703 if (pwrctrlpriv->reg_rfoff)
704 pwrctrlpriv->rf_pwrstate = rf_off;
705
706
707
708
709
710 if (!pregistrypriv->wifi_spec) {
711 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
712 } else {
713
714 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
715 }
716
717 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
718 _InitQueueReservedPage(Adapter);
719 _InitQueuePriority(Adapter);
720 _InitPageBoundary(Adapter);
721 _InitTransferPageSize(Adapter);
722
723 _InitTxBufferBoundary(Adapter, 0);
724
725 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
726 if (Adapter->registrypriv.mp_mode == 1) {
727 _InitRxSetting(Adapter);
728 Adapter->bFWReady = false;
729 } else {
730 status = rtl88eu_download_fw(Adapter);
731
732 if (status) {
733 DBG_88E("%s: Download Firmware failed!!\n", __func__);
734 Adapter->bFWReady = false;
735 return status;
736 }
737 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
738 Adapter->bFWReady = true;
739 }
740 rtl8188e_InitializeFirmwareVars(Adapter);
741
742 rtl88eu_phy_mac_config(Adapter);
743
744 rtl88eu_phy_bb_config(Adapter);
745
746 rtl88eu_phy_rf_config(Adapter);
747
748 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
749 status = rtl8188e_iol_efuse_patch(Adapter);
750 if (status == _FAIL) {
751 DBG_88E("%s rtl8188e_iol_efuse_patch failed\n", __func__);
752 goto exit;
753 }
754
755 _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
756
757 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
758 status = InitLLTTable(Adapter, txpktbuf_bndy);
759 if (status == _FAIL) {
760 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
761 goto exit;
762 }
763
764 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
765
766 _InitDriverInfoSize(Adapter, DRVINFO_SZ);
767
768 _InitInterrupt(Adapter);
769 hal_init_macaddr(Adapter);
770 _InitNetworkType(Adapter);
771 _InitWMACSetting(Adapter);
772 _InitAdaptiveCtrl(Adapter);
773 _InitEDCA(Adapter);
774 _InitRetryFunction(Adapter);
775 InitUsbAggregationSetting(Adapter);
776 _InitBeaconParameters(Adapter);
777
778
779
780 value16 = usb_read16(Adapter, REG_CR);
781 value16 |= (MACTXEN | MACRXEN);
782 usb_write8(Adapter, REG_CR, value16);
783
784 if (haldata->bRDGEnable)
785 _InitRDGSetting(Adapter);
786
787
788
789 value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
790 usb_write8(Adapter, REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
791
792 usb_write8(Adapter, REG_TX_RPT_CTRL+1, 2);
793
794 usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
795
796 usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
797
798 usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);
799 usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);
800
801
802 haldata->RfRegChnlVal[0] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
803 haldata->RfRegChnlVal[1] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
804
805HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
806 _BBTurnOnBlock(Adapter);
807
808HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
809 invalidate_cam_all(Adapter);
810
811HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
812
813 phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
814
815
816
817
818 _InitAntenna_Selection(Adapter);
819
820
821
822
823
824 usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
825
826
827
828 usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
829
830 if (pregistrypriv->wifi_spec)
831 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
832
833
834 usb_write8(Adapter, 0x652, 0x0);
835
836HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
837 rtl8188e_InitHalDm(Adapter);
838
839
840
841
842
843
844
845
846 pwrctrlpriv->rf_pwrstate = rf_on;
847
848
849 usb_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F);
850
851
852 usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);
853
854
855 usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
856
857
858 usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
859
860HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
861
862 if (pwrctrlpriv->rf_pwrstate == rf_on) {
863 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
864 rtl88eu_phy_iq_calibrate(Adapter, true);
865 } else {
866 rtl88eu_phy_iq_calibrate(Adapter, false);
867 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
868 }
869
870HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
871
872 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
873
874HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
875 rtl88eu_phy_lc_calibrate(Adapter);
876 }
877
878
879
880 usb_write8(Adapter, REG_USB_HRPWM, 0);
881
882
883 usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
884
885exit:
886HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
887
888 DBG_88E("%s in %dms\n", __func__,
889 jiffies_to_msecs(jiffies - init_start_time));
890
891 return status;
892}
893
894static void CardDisableRTL8188EU(struct adapter *Adapter)
895{
896 u8 val8;
897
898 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
899
900
901 val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
902 usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT(1)));
903
904
905 usb_write8(Adapter, REG_CR, 0x0);
906
907
908 rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
909 Rtl8188E_NIC_LPS_ENTER_FLOW);
910
911
912
913 val8 = usb_read8(Adapter, REG_MCUFWDL);
914 if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) {
915
916 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
917 val8 &= ~BIT(2);
918 usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
919 }
920
921
922 usb_write8(Adapter, REG_MCUFWDL, 0);
923
924
925
926 val8 = usb_read8(Adapter, REG_32K_CTRL);
927 usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0)));
928
929
930 rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
931 Rtl8188E_NIC_DISABLE_FLOW);
932
933
934 val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
935 usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT(3))));
936 val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
937 usb_write8(Adapter, REG_RSV_CTRL+1, val8 | BIT(3));
938
939
940 val8 = usb_read8(Adapter, GPIO_IN);
941 usb_write8(Adapter, GPIO_OUT, val8);
942 usb_write8(Adapter, GPIO_IO_SEL, 0xFF);
943
944 val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
945 usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
946 val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
947 usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);
948 usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);
949 Adapter->HalData->bMacPwrCtrlOn = false;
950 Adapter->bFWReady = false;
951}
952
953static void rtl8192cu_hw_power_down(struct adapter *adapt)
954{
955
956
957
958
959 usb_write8(adapt, REG_RSV_CTRL, 0x0);
960 usb_write16(adapt, REG_APS_FSMCO, 0x8812);
961}
962
963u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
964{
965 DBG_88E("==> %s\n", __func__);
966
967 usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
968 usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
969
970 DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
971 if (Adapter->pwrctrlpriv.bkeepfwalive) {
972 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
973 rtl8192cu_hw_power_down(Adapter);
974 } else {
975 if (Adapter->hw_init_completed) {
976 CardDisableRTL8188EU(Adapter);
977
978 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
979 rtl8192cu_hw_power_down(Adapter);
980 }
981 }
982 return _SUCCESS;
983}
984
985u32 rtw_hal_inirp_init(struct adapter *Adapter)
986{
987 u8 i;
988 struct recv_buf *precvbuf;
989 uint status;
990 struct recv_priv *precvpriv = &Adapter->recvpriv;
991
992 status = _SUCCESS;
993
994 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
995 ("===> usb_inirp_init\n"));
996
997 precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
998
999
1000 precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1001 for (i = 0; i < NR_RECVBUFF; i++) {
1002 if (usb_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
1003 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
1004 status = _FAIL;
1005 goto exit;
1006 }
1007
1008 precvbuf++;
1009 precvpriv->free_recv_buf_queue_cnt--;
1010 }
1011
1012exit:
1013
1014 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
1015
1016
1017 return status;
1018}
1019
1020
1021
1022
1023
1024
1025static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1026{
1027 struct hal_data_8188e *haldata = adapt->HalData;
1028
1029 if (!AutoLoadFail) {
1030
1031 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1032 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1033
1034
1035 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1036 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1037 } else {
1038 haldata->EEPROMVID = EEPROM_Default_VID;
1039 haldata->EEPROMPID = EEPROM_Default_PID;
1040
1041
1042 haldata->EEPROMCustomerID = EEPROM_Default_CustomerID;
1043 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1044 }
1045
1046 DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1047 DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1048}
1049
1050static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1051{
1052 u16 i;
1053 u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1054 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1055
1056 if (AutoLoadFail) {
1057 for (i = 0; i < 6; i++)
1058 eeprom->mac_addr[i] = sMacAddr[i];
1059 } else {
1060
1061 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1062 }
1063 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1064 ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
1065 eeprom->mac_addr));
1066}
1067
1068static void
1069readAdapterInfo_8188EU(
1070 struct adapter *adapt
1071 )
1072{
1073 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1074
1075
1076 Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1077 Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1078 Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1079
1080 Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1081 Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1082 Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1083 rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1084 Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1085 Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1086 Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1087 Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1088 Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1089}
1090
1091static void _ReadPROMContent(
1092 struct adapter *Adapter
1093 )
1094{
1095 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1096 u8 eeValue;
1097
1098
1099 eeValue = usb_read8(Adapter, REG_9346CR);
1100 eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1101 eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
1102
1103 DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1104 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1105
1106 Hal_InitPGData88E(Adapter);
1107 readAdapterInfo_8188EU(Adapter);
1108}
1109
1110static void _ReadRFType(struct adapter *Adapter)
1111{
1112 Adapter->HalData->rf_chip = RF_6052;
1113}
1114
1115void rtw_hal_read_chip_info(struct adapter *Adapter)
1116{
1117 unsigned long start = jiffies;
1118
1119 MSG_88E("====> %s\n", __func__);
1120
1121 _ReadRFType(Adapter);
1122 _ReadPROMContent(Adapter);
1123
1124 MSG_88E("<==== %s in %d ms\n", __func__,
1125 jiffies_to_msecs(jiffies - start));
1126}
1127
1128#define GPIO_DEBUG_PORT_NUM 0
1129static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1130{
1131}
1132
1133static void ResumeTxBeacon(struct adapter *adapt)
1134{
1135 struct hal_data_8188e *haldata = adapt->HalData;
1136
1137
1138
1139
1140 usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT(6));
1141 haldata->RegFwHwTxQCtrl |= BIT(6);
1142 usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1143 haldata->RegReg542 |= BIT(0);
1144 usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1145}
1146
1147static void StopTxBeacon(struct adapter *adapt)
1148{
1149 struct hal_data_8188e *haldata = adapt->HalData;
1150
1151
1152
1153
1154 usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
1155 haldata->RegFwHwTxQCtrl &= (~BIT(6));
1156 usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1157 haldata->RegReg542 &= ~(BIT(0));
1158 usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1159
1160
1161}
1162
1163static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1164{
1165 u8 val8;
1166 u8 mode = *((u8 *)val);
1167
1168
1169 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1170
1171
1172 val8 = usb_read8(Adapter, MSR)&0x0c;
1173 val8 |= mode;
1174 usb_write8(Adapter, MSR, val8);
1175
1176 DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1177
1178 if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1179 StopTxBeacon(Adapter);
1180
1181 usb_write8(Adapter, REG_BCN_CTRL, 0x19);
1182 } else if (mode == _HW_STATE_ADHOC_) {
1183 ResumeTxBeacon(Adapter);
1184 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1185 } else if (mode == _HW_STATE_AP_) {
1186 ResumeTxBeacon(Adapter);
1187
1188 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1189
1190
1191 usb_write32(Adapter, REG_RCR, 0x7000208e);
1192
1193 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1194
1195 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1196
1197
1198 usb_write8(Adapter, REG_BCNDMATIM, 0x02);
1199
1200 usb_write8(Adapter, REG_ATIMWND, 0x0a);
1201 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1202 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1203 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);
1204
1205
1206 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1207
1208
1209 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1210
1211
1212
1213 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1214
1215
1216 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1217 }
1218}
1219
1220static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1221{
1222 u8 idx = 0;
1223 u32 reg_macid;
1224
1225 reg_macid = REG_MACID;
1226
1227 for (idx = 0; idx < 6; idx++)
1228 usb_write8(Adapter, (reg_macid+idx), val[idx]);
1229}
1230
1231static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1232{
1233 u8 idx = 0;
1234 u32 reg_bssid;
1235
1236 reg_bssid = REG_BSSID;
1237
1238 for (idx = 0; idx < 6; idx++)
1239 usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1240}
1241
1242static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1243{
1244 u32 bcn_ctrl_reg;
1245
1246 bcn_ctrl_reg = REG_BCN_CTRL;
1247
1248 if (*((u8 *)val))
1249 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1250 else
1251 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1252}
1253
1254void rtw_hal_set_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1255{
1256 struct hal_data_8188e *haldata = Adapter->HalData;
1257 struct dm_priv *pdmpriv = &haldata->dmpriv;
1258 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1259
1260 switch (variable) {
1261 case HW_VAR_MEDIA_STATUS:
1262 {
1263 u8 val8;
1264
1265 val8 = usb_read8(Adapter, MSR)&0x0c;
1266 val8 |= *((u8 *)val);
1267 usb_write8(Adapter, MSR, val8);
1268 }
1269 break;
1270 case HW_VAR_MEDIA_STATUS1:
1271 {
1272 u8 val8;
1273
1274 val8 = usb_read8(Adapter, MSR) & 0x03;
1275 val8 |= *((u8 *)val) << 2;
1276 usb_write8(Adapter, MSR, val8);
1277 }
1278 break;
1279 case HW_VAR_SET_OPMODE:
1280 hw_var_set_opmode(Adapter, variable, val);
1281 break;
1282 case HW_VAR_MAC_ADDR:
1283 hw_var_set_macaddr(Adapter, variable, val);
1284 break;
1285 case HW_VAR_BSSID:
1286 hw_var_set_bssid(Adapter, variable, val);
1287 break;
1288 case HW_VAR_BASIC_RATE:
1289 {
1290 u16 BrateCfg = 0;
1291 u8 RateIndex = 0;
1292
1293
1294
1295
1296
1297 HalSetBrateCfg(Adapter, val, &BrateCfg);
1298 DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1299
1300
1301
1302
1303
1304
1305 BrateCfg = (BrateCfg | 0xd) & 0x15d;
1306 haldata->BasicRateSet = BrateCfg;
1307
1308 BrateCfg |= 0x01;
1309
1310 usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1311 usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1312 usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1313
1314
1315 while (BrateCfg > 0x1) {
1316 BrateCfg >>= 1;
1317 RateIndex++;
1318 }
1319
1320 usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1321 }
1322 break;
1323 case HW_VAR_TXPAUSE:
1324 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1325 break;
1326 case HW_VAR_BCN_FUNC:
1327 hw_var_set_bcn_func(Adapter, variable, val);
1328 break;
1329 case HW_VAR_CORRECT_TSF:
1330 {
1331 u64 tsf;
1332 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1333 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1334
1335 tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024;
1336
1337 if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1338 StopTxBeacon(Adapter);
1339
1340
1341 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1342
1343 usb_write32(Adapter, REG_TSFTR, tsf);
1344 usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1345
1346
1347 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3));
1348
1349 if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1350 ResumeTxBeacon(Adapter);
1351 }
1352 break;
1353 case HW_VAR_CHECK_BSSID:
1354 if (*((u8 *)val)) {
1355 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1356 } else {
1357 u32 val32;
1358
1359 val32 = usb_read32(Adapter, REG_RCR);
1360
1361 val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1362
1363 usb_write32(Adapter, REG_RCR, val32);
1364 }
1365 break;
1366 case HW_VAR_MLME_DISCONNECT:
1367
1368
1369 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1370
1371
1372 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
1373
1374
1375 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1376 break;
1377 case HW_VAR_MLME_SITESURVEY:
1378 if (*((u8 *)val)) {
1379
1380 u32 v = usb_read32(Adapter, REG_RCR);
1381 v &= ~(RCR_CBSSID_BCN);
1382 usb_write32(Adapter, REG_RCR, v);
1383
1384 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1385
1386
1387 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1388 } else {
1389 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1390 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1391
1392 if ((is_client_associated_to_ap(Adapter)) ||
1393 ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1394
1395 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1396
1397
1398 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1399 } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1400 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1401
1402 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1403 }
1404
1405 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1406 }
1407 break;
1408 case HW_VAR_MLME_JOIN:
1409 {
1410 u8 RetryLimit = 0x30;
1411 u8 type = *((u8 *)val);
1412 struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1413
1414 if (type == 0) {
1415
1416 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1417
1418 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1419
1420 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1421 RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1422 else
1423 RetryLimit = 0x7;
1424 } else if (type == 1) {
1425
1426 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1427 } else if (type == 2) {
1428
1429
1430 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1431
1432 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1433 RetryLimit = 0x7;
1434 }
1435 usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1436 }
1437 break;
1438 case HW_VAR_BEACON_INTERVAL:
1439 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1440 break;
1441 case HW_VAR_SLOT_TIME:
1442 {
1443 u8 u1bAIFS, aSifsTime;
1444 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1445 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1446
1447 usb_write8(Adapter, REG_SLOT, val[0]);
1448
1449 if (pmlmeinfo->WMM_enable == 0) {
1450 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1451 aSifsTime = 10;
1452 else
1453 aSifsTime = 16;
1454
1455 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1456
1457
1458 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1459 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1460 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1461 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1462 }
1463 }
1464 break;
1465 case HW_VAR_RESP_SIFS:
1466
1467 usb_write8(Adapter, REG_R2T_SIFS, val[0]);
1468 usb_write8(Adapter, REG_R2T_SIFS+1, val[1]);
1469
1470 usb_write8(Adapter, REG_T2T_SIFS, val[2]);
1471 usb_write8(Adapter, REG_T2T_SIFS+1, val[3]);
1472 break;
1473 case HW_VAR_ACK_PREAMBLE:
1474 {
1475 u8 regTmp;
1476 u8 bShortPreamble = *((bool *)val);
1477
1478 regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1479 if (bShortPreamble)
1480 regTmp |= 0x80;
1481
1482 usb_write8(Adapter, REG_RRSR+2, regTmp);
1483 }
1484 break;
1485 case HW_VAR_SEC_CFG:
1486 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1487 break;
1488 case HW_VAR_DM_FUNC_OP:
1489 if (val[0])
1490 podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1491 else
1492 podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1493 break;
1494 case HW_VAR_DM_FUNC_SET:
1495 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1496 pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1497 podmpriv->SupportAbility = pdmpriv->InitODMFlag;
1498 } else {
1499 podmpriv->SupportAbility |= *((u32 *)val);
1500 }
1501 break;
1502 case HW_VAR_DM_FUNC_CLR:
1503 podmpriv->SupportAbility &= *((u32 *)val);
1504 break;
1505 case HW_VAR_CAM_EMPTY_ENTRY:
1506 {
1507 u8 ucIndex = *((u8 *)val);
1508 u8 i;
1509 u32 ulCommand = 0;
1510 u32 ulContent = 0;
1511 u32 ulEncAlgo = CAM_AES;
1512
1513 for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1514
1515 if (i == 0)
1516 ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1517 else
1518 ulContent = 0;
1519
1520 ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1521 ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1522
1523 usb_write32(Adapter, WCAMI, ulContent);
1524 usb_write32(Adapter, RWCAM, ulCommand);
1525 }
1526 }
1527 break;
1528 case HW_VAR_CAM_INVALID_ALL:
1529 usb_write32(Adapter, RWCAM, BIT(31) | BIT(30));
1530 break;
1531 case HW_VAR_CAM_WRITE:
1532 {
1533 u32 cmd;
1534 u32 *cam_val = (u32 *)val;
1535 usb_write32(Adapter, WCAMI, cam_val[0]);
1536
1537 cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1538 usb_write32(Adapter, RWCAM, cmd);
1539 }
1540 break;
1541 case HW_VAR_AC_PARAM_VO:
1542 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1543 break;
1544 case HW_VAR_AC_PARAM_VI:
1545 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1546 break;
1547 case HW_VAR_AC_PARAM_BE:
1548 haldata->AcParam_BE = ((u32 *)(val))[0];
1549 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1550 break;
1551 case HW_VAR_AC_PARAM_BK:
1552 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1553 break;
1554 case HW_VAR_ACM_CTRL:
1555 {
1556 u8 acm_ctrl = *((u8 *)val);
1557 u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1558
1559 if (acm_ctrl > 1)
1560 AcmCtrl = AcmCtrl | 0x1;
1561
1562 if (acm_ctrl & BIT(3))
1563 AcmCtrl |= AcmHw_VoqEn;
1564 else
1565 AcmCtrl &= (~AcmHw_VoqEn);
1566
1567 if (acm_ctrl & BIT(2))
1568 AcmCtrl |= AcmHw_ViqEn;
1569 else
1570 AcmCtrl &= (~AcmHw_ViqEn);
1571
1572 if (acm_ctrl & BIT(1))
1573 AcmCtrl |= AcmHw_BeqEn;
1574 else
1575 AcmCtrl &= (~AcmHw_BeqEn);
1576
1577 DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1578 usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1579 }
1580 break;
1581 case HW_VAR_AMPDU_MIN_SPACE:
1582 {
1583 u8 MinSpacingToSet;
1584 u8 SecMinSpace;
1585
1586 MinSpacingToSet = *((u8 *)val);
1587 if (MinSpacingToSet <= 7) {
1588 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1589 case _NO_PRIVACY_:
1590 case _AES_:
1591 SecMinSpace = 0;
1592 break;
1593 case _WEP40_:
1594 case _WEP104_:
1595 case _TKIP_:
1596 case _TKIP_WTMIC_:
1597 SecMinSpace = 6;
1598 break;
1599 default:
1600 SecMinSpace = 7;
1601 break;
1602 }
1603 if (MinSpacingToSet < SecMinSpace)
1604 MinSpacingToSet = SecMinSpace;
1605 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1606 }
1607 }
1608 break;
1609 case HW_VAR_AMPDU_FACTOR:
1610 {
1611 u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1612 u8 FactorToSet;
1613 u8 *pRegToSet;
1614 u8 index = 0;
1615
1616 pRegToSet = RegToSet_Normal;
1617 FactorToSet = *((u8 *)val);
1618 if (FactorToSet <= 3) {
1619 FactorToSet = 1 << (FactorToSet + 2);
1620 if (FactorToSet > 0xf)
1621 FactorToSet = 0xf;
1622
1623 for (index = 0; index < 4; index++) {
1624 if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1625 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1626
1627 if ((pRegToSet[index] & 0x0f) > FactorToSet)
1628 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1629
1630 usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1631 }
1632 }
1633 }
1634 break;
1635 case HW_VAR_RXDMA_AGG_PG_TH:
1636 {
1637 u8 threshold = *((u8 *)val);
1638 if (threshold == 0)
1639 threshold = haldata->UsbRxAggPageCount;
1640 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1641 }
1642 break;
1643 case HW_VAR_SET_RPWM:
1644 break;
1645 case HW_VAR_H2C_FW_PWRMODE:
1646 {
1647 u8 psmode = (*(u8 *)val);
1648
1649
1650
1651 if (psmode != PS_MODE_ACTIVE)
1652 ODM_RF_Saving(podmpriv, true);
1653 rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1654 }
1655 break;
1656 case HW_VAR_H2C_FW_JOINBSSRPT:
1657 {
1658 u8 mstatus = (*(u8 *)val);
1659 rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1660 }
1661 break;
1662 case HW_VAR_INITIAL_GAIN:
1663 {
1664 struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1665 u32 rx_gain = ((u32 *)(val))[0];
1666
1667 if (rx_gain == 0xff) {
1668 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1669 } else {
1670 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1671 ODM_Write_DIG(podmpriv, rx_gain);
1672 }
1673 }
1674 break;
1675 case HW_VAR_TRIGGER_GPIO_0:
1676 rtl8192cu_trigger_gpio_0(Adapter);
1677 break;
1678 case HW_VAR_RPT_TIMER_SETTING:
1679 {
1680 u16 min_rpt_time = (*(u16 *)val);
1681 ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1682 }
1683 break;
1684 case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1685 {
1686 u8 Optimum_antenna = (*(u8 *)val);
1687 u8 Ant;
1688
1689 if (haldata->CurAntenna != Optimum_antenna) {
1690 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1691 rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1692
1693 haldata->CurAntenna = Optimum_antenna;
1694 }
1695 }
1696 break;
1697 case HW_VAR_EFUSE_BYTES:
1698 haldata->EfuseUsedBytes = *((u16 *)val);
1699 break;
1700 case HW_VAR_FIFO_CLEARN_UP:
1701 {
1702 struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1703 u8 trycnt = 100;
1704
1705
1706 usb_write8(Adapter, REG_TXPAUSE, 0xff);
1707
1708
1709 Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1710
1711 if (!pwrpriv->bkeepfwalive) {
1712
1713 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1714 do {
1715 if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1716 break;
1717 } while (trycnt--);
1718 if (trycnt == 0)
1719 DBG_88E("Stop RX DMA failed......\n");
1720
1721
1722 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1723 usb_write32(Adapter, REG_RQPN, 0x80000000);
1724 mdelay(10);
1725 }
1726 }
1727 break;
1728 case HW_VAR_CHECK_TXBUF:
1729 break;
1730 case HW_VAR_APFM_ON_MAC:
1731 haldata->bMacPwrCtrlOn = *val;
1732 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1733 break;
1734 case HW_VAR_TX_RPT_MAX_MACID:
1735 {
1736 u8 maxMacid = *val;
1737 DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1738 usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1739 }
1740 break;
1741 case HW_VAR_H2C_MEDIA_STATUS_RPT:
1742 rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val));
1743 break;
1744 case HW_VAR_BCN_VALID:
1745
1746 usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT(0));
1747 break;
1748 default:
1749 break;
1750 }
1751}
1752
1753void rtw_hal_get_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1754{
1755 switch (variable) {
1756 case HW_VAR_BASIC_RATE:
1757 *((u16 *)(val)) = Adapter->HalData->BasicRateSet;
1758 case HW_VAR_TXPAUSE:
1759 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1760 break;
1761 case HW_VAR_BCN_VALID:
1762
1763 val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1764 break;
1765 case HW_VAR_RF_TYPE:
1766 val[0] = RF_1T1R;
1767 break;
1768 case HW_VAR_FWLPS_RF_ON:
1769 {
1770
1771 if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1772
1773
1774 val[0] = true;
1775 } else {
1776 u32 valRCR;
1777 valRCR = usb_read32(Adapter, REG_RCR);
1778 valRCR &= 0x00070000;
1779 if (valRCR)
1780 val[0] = false;
1781 else
1782 val[0] = true;
1783 }
1784 }
1785 break;
1786 case HW_VAR_CURRENT_ANTENNA:
1787 val[0] = Adapter->HalData->CurAntenna;
1788 break;
1789 case HW_VAR_EFUSE_BYTES:
1790 *((u16 *)(val)) = Adapter->HalData->EfuseUsedBytes;
1791 break;
1792 case HW_VAR_APFM_ON_MAC:
1793 *val = Adapter->HalData->bMacPwrCtrlOn;
1794 break;
1795 case HW_VAR_CHK_HI_QUEUE_EMPTY:
1796 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1797 break;
1798 default:
1799 break;
1800 }
1801}
1802
1803
1804
1805
1806
1807u8 rtw_hal_get_def_var(
1808 struct adapter *Adapter,
1809 enum hal_def_variable eVariable,
1810 void *pValue
1811 )
1812{
1813 struct hal_data_8188e *haldata = Adapter->HalData;
1814 u8 bResult = _SUCCESS;
1815
1816 switch (eVariable) {
1817 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1818 {
1819 struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1820 struct sta_priv *pstapriv = &Adapter->stapriv;
1821 struct sta_info *psta;
1822 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1823 if (psta)
1824 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1825 }
1826 break;
1827 case HAL_DEF_IS_SUPPORT_ANT_DIV:
1828 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1829 break;
1830 case HAL_DEF_CURRENT_ANTENNA:
1831 *((u8 *)pValue) = haldata->CurAntenna;
1832 break;
1833 case HAL_DEF_DRVINFO_SZ:
1834 *((u32 *)pValue) = DRVINFO_SZ;
1835 break;
1836 case HAL_DEF_MAX_RECVBUF_SZ:
1837 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1838 break;
1839 case HAL_DEF_RX_PACKET_OFFSET:
1840 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1841 break;
1842 case HAL_DEF_DBG_DM_FUNC:
1843 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1844 break;
1845 case HAL_DEF_RA_DECISION_RATE:
1846 {
1847 u8 MacID = *((u8 *)pValue);
1848 *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, MacID);
1849 }
1850 break;
1851 case HAL_DEF_RA_SGI:
1852 {
1853 u8 MacID = *((u8 *)pValue);
1854 *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&haldata->odmpriv, MacID);
1855 }
1856 break;
1857 case HAL_DEF_PT_PWR_STATUS:
1858 {
1859 u8 MacID = *((u8 *)pValue);
1860 *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, MacID);
1861 }
1862 break;
1863 case HW_VAR_MAX_RX_AMPDU_FACTOR:
1864 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1865 break;
1866 case HW_DEF_RA_INFO_DUMP:
1867 {
1868 u8 entry_id = *((u8 *)pValue);
1869 if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1870 DBG_88E("============ RA status check ===================\n");
1871 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1872 entry_id,
1873 haldata->odmpriv.RAInfo[entry_id].RateID,
1874 haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1875 haldata->odmpriv.RAInfo[entry_id].RateSGI,
1876 haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1877 haldata->odmpriv.RAInfo[entry_id].PTStage);
1878 }
1879 }
1880 break;
1881 case HW_DEF_ODM_DBG_FLAG:
1882 {
1883 struct odm_dm_struct *dm_ocm = &haldata->odmpriv;
1884 pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1885 }
1886 break;
1887 case HAL_DEF_DBG_DUMP_RXPKT:
1888 *((u8 *)pValue) = haldata->bDumpRxPkt;
1889 break;
1890 case HAL_DEF_DBG_DUMP_TXPKT:
1891 *((u8 *)pValue) = haldata->bDumpTxPkt;
1892 break;
1893 default:
1894 bResult = _FAIL;
1895 break;
1896 }
1897
1898 return bResult;
1899}
1900
1901void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1902{
1903 u8 init_rate = 0;
1904 u8 networkType, raid;
1905 u32 mask, rate_bitmap;
1906 u8 shortGIrate = false;
1907 int supportRateNum = 0;
1908 struct sta_info *psta;
1909 struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv;
1910 struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
1911 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1912 struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
1913
1914 if (mac_id >= NUM_STA)
1915 return;
1916 psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1917 if (psta == NULL)
1918 return;
1919 switch (mac_id) {
1920 case 0:
1921 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1922 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
1923 raid = networktype_to_raid(networkType);
1924 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1925 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&pmlmeinfo->HT_caps) : 0;
1926 if (support_short_GI(adapt, &pmlmeinfo->HT_caps))
1927 shortGIrate = true;
1928 break;
1929 case 1:
1930 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1931 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1932 networkType = WIRELESS_11B;
1933 else
1934 networkType = WIRELESS_11G;
1935 raid = networktype_to_raid(networkType);
1936 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1937 break;
1938 default:
1939 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1940 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
1941 raid = networktype_to_raid(networkType);
1942 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1943
1944
1945 break;
1946 }
1947
1948 rate_bitmap = ODM_Get_Rate_Bitmap(odmpriv, mac_id, mask, rssi_level);
1949 DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
1950 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
1951
1952 mask &= rate_bitmap;
1953
1954 init_rate = get_highest_rate_idx(mask)&0x3f;
1955
1956 ODM_RA_UpdateRateInfo_8188E(odmpriv, mac_id, raid, mask, shortGIrate);
1957
1958
1959 psta->raid = raid;
1960 psta->init_rate = init_rate;
1961}
1962
1963void rtw_hal_bcn_related_reg_setting(struct adapter *adapt)
1964{
1965 u32 value32;
1966 struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
1967 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1968 u32 bcn_ctrl_reg = REG_BCN_CTRL;
1969
1970
1971
1972 usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
1973 usb_write8(adapt, REG_ATIMWND, 0x02);
1974
1975 _InitBeaconParameters(adapt);
1976
1977 usb_write8(adapt, REG_SLOT, 0x09);
1978
1979 value32 = usb_read32(adapt, REG_TCR);
1980 value32 &= ~TSFRST;
1981 usb_write32(adapt, REG_TCR, value32);
1982
1983 value32 |= TSFRST;
1984 usb_write32(adapt, REG_TCR, value32);
1985
1986
1987 usb_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50);
1988 usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
1989
1990 _BeaconFunctionEnable(adapt, true, true);
1991
1992 ResumeTxBeacon(adapt);
1993
1994 usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1));
1995}
1996
1997void rtw_hal_def_value_init(struct adapter *adapt)
1998{
1999 struct hal_data_8188e *haldata = adapt->HalData;
2000 struct pwrctrl_priv *pwrctrlpriv;
2001 u8 i;
2002
2003 pwrctrlpriv = &adapt->pwrctrlpriv;
2004
2005
2006 if (!pwrctrlpriv->bkeepfwalive)
2007 haldata->LastHMEBoxNum = 0;
2008
2009
2010 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
2011 haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;
2012 haldata->pwrGroupCnt = 0;
2013 haldata->PGMaxGroup = 13;
2014 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
2015 for (i = 0; i < HP_THERMAL_NUM; i++)
2016 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2017}
2018