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56
57#define KLUDGE_FOR_4GB_BOUNDARY 1
58#define DEBUG_MICROCODE 1
59#define DBG 1
60#define SLIC_INTERRUPT_PROCESS_LIMIT 1
61#define SLIC_OFFLOAD_IP_CHECKSUM 1
62#define STATS_TIMER_INTERVAL 2
63#define PING_TIMER_INTERVAL 1
64#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
65
66#include <linux/kernel.h>
67#include <linux/string.h>
68#include <linux/errno.h>
69#include <linux/ioport.h>
70#include <linux/slab.h>
71#include <linux/interrupt.h>
72#include <linux/timer.h>
73#include <linux/pci.h>
74#include <linux/spinlock.h>
75#include <linux/init.h>
76#include <linux/bitops.h>
77#include <linux/io.h>
78#include <linux/netdevice.h>
79#include <linux/crc32.h>
80#include <linux/etherdevice.h>
81#include <linux/skbuff.h>
82#include <linux/delay.h>
83#include <linux/seq_file.h>
84#include <linux/kthread.h>
85#include <linux/module.h>
86
87#include <linux/firmware.h>
88#include <linux/types.h>
89#include <linux/dma-mapping.h>
90#include <linux/mii.h>
91#include <linux/if_vlan.h>
92#include <asm/unaligned.h>
93
94#include <linux/ethtool.h>
95#include <linux/uaccess.h>
96#include "slichw.h"
97#include "slic.h"
98
99static uint slic_first_init = 1;
100static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
101
102static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
103
104static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
105#define DEFAULT_INTAGG_DELAY 100
106static unsigned int rcv_count;
107
108#define DRV_NAME "slicoss"
109#define DRV_VERSION "2.0.1"
110#define DRV_AUTHOR "Alacritech, Inc. Engineering"
111#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
112 "Non-Accelerated Driver"
113#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
114 "All rights reserved."
115#define PFX DRV_NAME " "
116
117MODULE_AUTHOR(DRV_AUTHOR);
118MODULE_DESCRIPTION(DRV_DESCRIPTION);
119MODULE_LICENSE("Dual BSD/GPL");
120
121static const struct pci_device_id slic_pci_tbl[] = {
122 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
123 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
124 { 0 }
125};
126
127static const struct ethtool_ops slic_ethtool_ops;
128
129MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
130
131static void slic_mcast_set_bit(struct adapter *adapter, char *address)
132{
133 unsigned char crcpoly;
134
135
136
137
138
139
140 crcpoly = ether_crc(ETH_ALEN, address) >> 23;
141
142
143
144
145
146 crcpoly &= 0x3F;
147
148
149 adapter->mcastmask |= (u64)1 << crcpoly;
150}
151
152static void slic_mcast_set_mask(struct adapter *adapter)
153{
154 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
155
156
157
158
159
160
161 slic_write32(adapter, SLIC_REG_MCASTLOW, 0xFFFFFFFF);
162 slic_write32(adapter, SLIC_REG_MCASTHIGH, 0xFFFFFFFF);
163 } else {
164
165
166
167
168 slic_write32(adapter, SLIC_REG_MCASTLOW,
169 (u32)(adapter->mcastmask & 0xFFFFFFFF));
170 slic_write32(adapter, SLIC_REG_MCASTHIGH,
171 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF));
172 }
173}
174
175static void slic_timer_ping(ulong dev)
176{
177 struct adapter *adapter;
178 struct sliccard *card;
179
180 adapter = netdev_priv((struct net_device *)dev);
181 card = adapter->card;
182
183 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
184 add_timer(&adapter->pingtimer);
185}
186
187
188
189
190
191
192
193static void slic_link_config(struct adapter *adapter,
194 u32 linkspeed, u32 linkduplex)
195{
196 u32 speed;
197 u32 duplex;
198 u32 phy_config;
199 u32 phy_advreg;
200 u32 phy_gctlreg;
201
202 if (adapter->state != ADAPT_UP)
203 return;
204
205 if (linkspeed > LINK_1000MB)
206 linkspeed = LINK_AUTOSPEED;
207 if (linkduplex > LINK_AUTOD)
208 linkduplex = LINK_AUTOD;
209
210 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
211 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
212
213
214
215
216
217
218 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
219
220 phy_advreg |= PAR_ASYMPAUSE_FIBER;
221 slic_write32(adapter, SLIC_REG_WPHY, phy_advreg);
222
223 if (linkspeed == LINK_AUTOSPEED) {
224
225 phy_config =
226 (MIICR_REG_PCR |
227 (PCR_RESET | PCR_AUTONEG |
228 PCR_AUTONEG_RST));
229 slic_write32(adapter, SLIC_REG_WPHY,
230 phy_config);
231 } else {
232
233
234
235
236 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
237 slic_write32(adapter, SLIC_REG_WPHY,
238 phy_config);
239 slic_flush_write(adapter);
240
241
242
243
244 mdelay(10);
245
246
247
248
249
250 phy_config =
251 (MIICR_REG_PCR |
252 (PCR_RESET | PCR_SPEED_1000 |
253 PCR_DUPLEX_FULL));
254 slic_write32(adapter, SLIC_REG_WPHY,
255 phy_config);
256 }
257 } else {
258
259
260
261
262
263
264
265 if (linkspeed == LINK_AUTOSPEED) {
266
267 phy_advreg =
268 (MIICR_REG_4 |
269 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
270 | PAR_ADV10HD));
271 } else {
272
273
274
275
276 phy_advreg = MIICR_REG_4;
277 }
278
279 phy_advreg |= PAR_ASYMPAUSE;
280
281 phy_advreg |= PAR_802_3;
282 slic_write32(adapter, SLIC_REG_WPHY, phy_advreg);
283
284 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
285 slic_write32(adapter, SLIC_REG_WPHY, phy_gctlreg);
286
287 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
288
289
290
291
292 phy_config =
293 (MIICR_REG_16 | (MRV_REG16_XOVERON));
294 slic_write32(adapter, SLIC_REG_WPHY,
295 phy_config);
296
297
298 phy_config =
299 (MIICR_REG_PCR |
300 (PCR_RESET | PCR_AUTONEG |
301 PCR_AUTONEG_RST));
302 slic_write32(adapter, SLIC_REG_WPHY,
303 phy_config);
304 } else {
305
306 phy_config =
307 (MIICR_REG_PCR |
308 (PCR_AUTONEG | PCR_AUTONEG_RST));
309 slic_write32(adapter, SLIC_REG_WPHY,
310 phy_config);
311 }
312 }
313 } else {
314
315 if (linkspeed == LINK_10MB)
316 speed = 0;
317 else
318 speed = PCR_SPEED_100;
319 if (linkduplex == LINK_HALFD)
320 duplex = 0;
321 else
322 duplex = PCR_DUPLEX_FULL;
323
324 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
325
326
327
328
329 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
330 slic_write32(adapter, SLIC_REG_WPHY, phy_config);
331 }
332
333
334 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
335 slic_write32(adapter, SLIC_REG_WPHY, phy_config);
336 slic_flush_write(adapter);
337
338 mdelay(10);
339
340 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
341
342
343
344
345
346 phy_config =
347 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
348 slic_write32(adapter, SLIC_REG_WPHY, phy_config);
349 } else {
350
351 phy_config = (MIICR_REG_PCR | (speed | duplex));
352 slic_write32(adapter, SLIC_REG_WPHY, phy_config);
353 }
354 }
355}
356
357static int slic_card_download_gbrcv(struct adapter *adapter)
358{
359 const struct firmware *fw;
360 const char *file = "";
361 int ret;
362 u32 codeaddr;
363 u32 instruction;
364 int index = 0;
365 u32 rcvucodelen = 0;
366
367 switch (adapter->devid) {
368 case SLIC_2GB_DEVICE_ID:
369 file = "slicoss/oasisrcvucode.sys";
370 break;
371 case SLIC_1GB_DEVICE_ID:
372 file = "slicoss/gbrcvucode.sys";
373 break;
374 default:
375 return -ENOENT;
376 }
377
378 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
379 if (ret) {
380 dev_err(&adapter->pcidev->dev,
381 "Failed to load firmware %s\n", file);
382 return ret;
383 }
384
385 rcvucodelen = *(u32 *)(fw->data + index);
386 index += 4;
387 switch (adapter->devid) {
388 case SLIC_2GB_DEVICE_ID:
389 if (rcvucodelen != OasisRcvUCodeLen) {
390 release_firmware(fw);
391 return -EINVAL;
392 }
393 break;
394 case SLIC_1GB_DEVICE_ID:
395 if (rcvucodelen != GBRcvUCodeLen) {
396 release_firmware(fw);
397 return -EINVAL;
398 }
399 break;
400 }
401
402 slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_BEGIN);
403
404 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
405
406 slic_write32(adapter, SLIC_REG_RCV_WCS, codeaddr);
407
408 instruction = *(u32 *)(fw->data + index);
409 index += 4;
410
411 slic_write32(adapter, SLIC_REG_RCV_WCS, instruction);
412
413 instruction = *(u8 *)(fw->data + index);
414 index++;
415
416 slic_write32(adapter, SLIC_REG_RCV_WCS, instruction);
417 }
418
419
420 release_firmware(fw);
421 slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_FINISH);
422 slic_flush_write(adapter);
423
424 return 0;
425}
426
427MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
428MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
429
430static int slic_card_download(struct adapter *adapter)
431{
432 const struct firmware *fw;
433 const char *file = "";
434 int ret;
435 u32 section;
436 int thissectionsize;
437 int codeaddr;
438 u32 instruction;
439 u32 baseaddress;
440 u32 i;
441 u32 numsects = 0;
442 u32 sectsize[3];
443 u32 sectstart[3];
444 int ucode_start, index = 0;
445
446 switch (adapter->devid) {
447 case SLIC_2GB_DEVICE_ID:
448 file = "slicoss/oasisdownload.sys";
449 break;
450 case SLIC_1GB_DEVICE_ID:
451 file = "slicoss/gbdownload.sys";
452 break;
453 default:
454 return -ENOENT;
455 }
456 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
457 if (ret) {
458 dev_err(&adapter->pcidev->dev,
459 "Failed to load firmware %s\n", file);
460 return ret;
461 }
462 numsects = *(u32 *)(fw->data + index);
463 index += 4;
464 for (i = 0; i < numsects; i++) {
465 sectsize[i] = *(u32 *)(fw->data + index);
466 index += 4;
467 }
468 for (i = 0; i < numsects; i++) {
469 sectstart[i] = *(u32 *)(fw->data + index);
470 index += 4;
471 }
472 ucode_start = index;
473 instruction = *(u32 *)(fw->data + index);
474 index += 4;
475 for (section = 0; section < numsects; section++) {
476 baseaddress = sectstart[section];
477 thissectionsize = sectsize[section] >> 3;
478
479 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
480
481 slic_write32(adapter, SLIC_REG_WCS,
482 baseaddress + codeaddr);
483
484 slic_write32(adapter, SLIC_REG_WCS,
485 instruction);
486 instruction = *(u32 *)(fw->data + index);
487 index += 4;
488
489
490 slic_write32(adapter, SLIC_REG_WCS,
491 instruction);
492 instruction = *(u32 *)(fw->data + index);
493 index += 4;
494 }
495 }
496 index = ucode_start;
497 for (section = 0; section < numsects; section++) {
498 instruction = *(u32 *)(fw->data + index);
499 baseaddress = sectstart[section];
500 if (baseaddress < 0x8000)
501 continue;
502 thissectionsize = sectsize[section] >> 3;
503
504 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
505
506 slic_write32(adapter, SLIC_REG_WCS,
507 SLIC_WCS_COMPARE | (baseaddress +
508 codeaddr));
509
510 slic_write32(adapter, SLIC_REG_WCS, instruction);
511 instruction = *(u32 *)(fw->data + index);
512 index += 4;
513
514 slic_write32(adapter, SLIC_REG_WCS, instruction);
515 instruction = *(u32 *)(fw->data + index);
516 index += 4;
517 }
518 }
519 release_firmware(fw);
520
521 mdelay(10);
522
523 slic_write32(adapter, SLIC_REG_WCS, SLIC_WCS_START);
524 slic_flush_write(adapter);
525
526
527
528
529 mdelay(20);
530
531 return 0;
532}
533
534MODULE_FIRMWARE("slicoss/oasisdownload.sys");
535MODULE_FIRMWARE("slicoss/gbdownload.sys");
536
537static void slic_adapter_set_hwaddr(struct adapter *adapter)
538{
539 struct sliccard *card = adapter->card;
540
541 if ((adapter->card) && (card->config_set)) {
542 memcpy(adapter->macaddr,
543 card->config.MacInfo[adapter->functionnumber].macaddrA,
544 sizeof(struct slic_config_mac));
545 if (is_zero_ether_addr(adapter->currmacaddr))
546 memcpy(adapter->currmacaddr, adapter->macaddr,
547 ETH_ALEN);
548 if (adapter->netdev)
549 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
550 ETH_ALEN);
551 }
552}
553
554static void slic_intagg_set(struct adapter *adapter, u32 value)
555{
556 slic_write32(adapter, SLIC_REG_INTAGG, value);
557 adapter->card->loadlevel_current = value;
558}
559
560static void slic_soft_reset(struct adapter *adapter)
561{
562 if (adapter->card->state == CARD_UP) {
563 slic_write32(adapter, SLIC_REG_QUIESCE, 0);
564 slic_flush_write(adapter);
565 mdelay(1);
566 }
567
568 slic_write32(adapter, SLIC_REG_RESET, SLIC_RESET_MAGIC);
569 slic_flush_write(adapter);
570
571 mdelay(1);
572}
573
574static void slic_mac_address_config(struct adapter *adapter)
575{
576 u32 value;
577 u32 value2;
578
579 value = ntohl(*(__be32 *)&adapter->currmacaddr[2]);
580 slic_write32(adapter, SLIC_REG_WRADDRAL, value);
581 slic_write32(adapter, SLIC_REG_WRADDRBL, value);
582
583 value2 = (u32)((adapter->currmacaddr[0] << 8 |
584 adapter->currmacaddr[1]) & 0xFFFF);
585
586 slic_write32(adapter, SLIC_REG_WRADDRAH, value2);
587 slic_write32(adapter, SLIC_REG_WRADDRBH, value2);
588
589
590
591
592
593
594 slic_mcast_set_mask(adapter);
595}
596
597static void slic_mac_config(struct adapter *adapter)
598{
599 u32 value;
600
601
602 if (adapter->linkspeed == LINK_1000MB) {
603 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
604 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
605 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
606 } else {
607 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
608 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
609 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
610 }
611
612
613 if (adapter->linkspeed == LINK_1000MB)
614 value |= GMCR_GBIT;
615
616
617 if ((adapter->linkduplex == LINK_FULLD)
618 || (adapter->macopts & MAC_LOOPBACK)) {
619 value |= GMCR_FULLD;
620 }
621
622
623 slic_write32(adapter, SLIC_REG_WMCFG, value);
624
625
626 slic_mac_address_config(adapter);
627}
628
629static void slic_config_set(struct adapter *adapter, bool linkchange)
630{
631 u32 value;
632 u32 RcrReset;
633
634 if (linkchange) {
635
636 slic_mac_config(adapter);
637 RcrReset = GRCR_RESET;
638 } else {
639 slic_mac_address_config(adapter);
640 RcrReset = 0;
641 }
642
643 if (adapter->linkduplex == LINK_FULLD) {
644
645 value = (GXCR_RESET |
646 GXCR_XMTEN |
647 GXCR_PAUSEEN);
648
649 slic_write32(adapter, SLIC_REG_WXCFG, value);
650
651
652 value = (RcrReset |
653 GRCR_CTLEN |
654 GRCR_ADDRAEN |
655 GRCR_RCVBAD |
656 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
657 } else {
658
659 value = (GXCR_RESET |
660 GXCR_XMTEN);
661
662 slic_write32(adapter, SLIC_REG_WXCFG, value);
663
664
665 value = (RcrReset |
666 GRCR_ADDRAEN |
667 GRCR_RCVBAD |
668 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
669 }
670
671 if (adapter->state != ADAPT_DOWN) {
672
673 value |= GRCR_RCVEN;
674 }
675
676 if (adapter->macopts & MAC_PROMISC)
677 value |= GRCR_RCVALL;
678
679 slic_write32(adapter, SLIC_REG_WRCFG, value);
680}
681
682
683
684
685static void slic_config_clear(struct adapter *adapter)
686{
687 u32 value;
688 u32 phy_config;
689
690
691 value = (GXCR_RESET |
692 GXCR_PAUSEEN);
693
694 slic_write32(adapter, SLIC_REG_WXCFG, value);
695
696 value = (GRCR_RESET |
697 GRCR_CTLEN |
698 GRCR_ADDRAEN |
699 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
700
701 slic_write32(adapter, SLIC_REG_WRCFG, value);
702
703
704 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
705 slic_write32(adapter, SLIC_REG_WPHY, phy_config);
706}
707
708static bool slic_mac_filter(struct adapter *adapter,
709 struct ether_header *ether_frame)
710{
711 struct net_device *netdev = adapter->netdev;
712 u32 opts = adapter->macopts;
713
714 if (opts & MAC_PROMISC)
715 return true;
716
717 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
718 if (opts & MAC_BCAST) {
719 adapter->rcv_broadcasts++;
720 return true;
721 }
722
723 return false;
724 }
725
726 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
727 if (opts & MAC_ALLMCAST) {
728 adapter->rcv_multicasts++;
729 netdev->stats.multicast++;
730 return true;
731 }
732 if (opts & MAC_MCAST) {
733 struct mcast_address *mcaddr = adapter->mcastaddrs;
734
735 while (mcaddr) {
736 if (ether_addr_equal(mcaddr->address,
737 ether_frame->ether_dhost)) {
738 adapter->rcv_multicasts++;
739 netdev->stats.multicast++;
740 return true;
741 }
742 mcaddr = mcaddr->next;
743 }
744
745 return false;
746 }
747
748 return false;
749 }
750 if (opts & MAC_DIRECTED) {
751 adapter->rcv_unicasts++;
752 return true;
753 }
754 return false;
755}
756
757static int slic_mac_set_address(struct net_device *dev, void *ptr)
758{
759 struct adapter *adapter = netdev_priv(dev);
760 struct sockaddr *addr = ptr;
761
762 if (netif_running(dev))
763 return -EBUSY;
764 if (!adapter)
765 return -EBUSY;
766
767 if (!is_valid_ether_addr(addr->sa_data))
768 return -EINVAL;
769
770 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
771 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
772
773 slic_config_set(adapter, true);
774 return 0;
775}
776
777static void slic_timer_load_check(ulong cardaddr)
778{
779 struct sliccard *card = (struct sliccard *)cardaddr;
780 struct adapter *adapter = card->master;
781 u32 load = card->events;
782 u32 level = 0;
783
784 if ((adapter) && (adapter->state == ADAPT_UP) &&
785 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
786 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
787 if (adapter->linkspeed == LINK_1000MB)
788 level = 100;
789 else {
790 if (load > SLIC_LOAD_5)
791 level = SLIC_INTAGG_5;
792 else if (load > SLIC_LOAD_4)
793 level = SLIC_INTAGG_4;
794 else if (load > SLIC_LOAD_3)
795 level = SLIC_INTAGG_3;
796 else if (load > SLIC_LOAD_2)
797 level = SLIC_INTAGG_2;
798 else if (load > SLIC_LOAD_1)
799 level = SLIC_INTAGG_1;
800 else
801 level = SLIC_INTAGG_0;
802 }
803 if (card->loadlevel_current != level) {
804 card->loadlevel_current = level;
805 slic_write32(adapter, SLIC_REG_INTAGG, level);
806 }
807 } else {
808 if (load > SLIC_LOAD_5)
809 level = SLIC_INTAGG_5;
810 else if (load > SLIC_LOAD_4)
811 level = SLIC_INTAGG_4;
812 else if (load > SLIC_LOAD_3)
813 level = SLIC_INTAGG_3;
814 else if (load > SLIC_LOAD_2)
815 level = SLIC_INTAGG_2;
816 else if (load > SLIC_LOAD_1)
817 level = SLIC_INTAGG_1;
818 else
819 level = SLIC_INTAGG_0;
820 if (card->loadlevel_current != level) {
821 card->loadlevel_current = level;
822 slic_write32(adapter, SLIC_REG_INTAGG, level);
823 }
824 }
825 }
826 card->events = 0;
827 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
828 add_timer(&card->loadtimer);
829}
830
831static int slic_upr_queue_request(struct adapter *adapter,
832 u32 upr_request,
833 u32 upr_data,
834 u32 upr_data_h,
835 u32 upr_buffer, u32 upr_buffer_h)
836{
837 struct slic_upr *upr;
838 struct slic_upr *uprqueue;
839
840 upr = kmalloc(sizeof(*upr), GFP_ATOMIC);
841 if (!upr)
842 return -ENOMEM;
843
844 upr->adapter = adapter->port;
845 upr->upr_request = upr_request;
846 upr->upr_data = upr_data;
847 upr->upr_buffer = upr_buffer;
848 upr->upr_data_h = upr_data_h;
849 upr->upr_buffer_h = upr_buffer_h;
850 upr->next = NULL;
851 if (adapter->upr_list) {
852 uprqueue = adapter->upr_list;
853
854 while (uprqueue->next)
855 uprqueue = uprqueue->next;
856 uprqueue->next = upr;
857 } else {
858 adapter->upr_list = upr;
859 }
860 return 0;
861}
862
863static void slic_upr_start(struct adapter *adapter)
864{
865 struct slic_upr *upr;
866
867 upr = adapter->upr_list;
868 if (!upr)
869 return;
870 if (adapter->upr_busy)
871 return;
872 adapter->upr_busy = 1;
873
874 switch (upr->upr_request) {
875 case SLIC_UPR_STATS:
876 if (upr->upr_data_h == 0) {
877 slic_write32(adapter, SLIC_REG_RSTAT, upr->upr_data);
878 } else {
879 slic_write64(adapter, SLIC_REG_RSTAT64, upr->upr_data,
880 upr->upr_data_h);
881 }
882 break;
883
884 case SLIC_UPR_RLSR:
885 slic_write64(adapter, SLIC_REG_LSTAT, upr->upr_data,
886 upr->upr_data_h);
887 break;
888
889 case SLIC_UPR_RCONFIG:
890 slic_write64(adapter, SLIC_REG_RCONFIG, upr->upr_data,
891 upr->upr_data_h);
892 break;
893 case SLIC_UPR_PING:
894 slic_write32(adapter, SLIC_REG_PING, 1);
895 break;
896 }
897 slic_flush_write(adapter);
898}
899
900static int slic_upr_request(struct adapter *adapter,
901 u32 upr_request,
902 u32 upr_data,
903 u32 upr_data_h,
904 u32 upr_buffer, u32 upr_buffer_h)
905{
906 unsigned long flags;
907 int rc;
908
909 spin_lock_irqsave(&adapter->upr_lock, flags);
910 rc = slic_upr_queue_request(adapter,
911 upr_request,
912 upr_data,
913 upr_data_h, upr_buffer, upr_buffer_h);
914 if (rc)
915 goto err_unlock_irq;
916
917 slic_upr_start(adapter);
918err_unlock_irq:
919 spin_unlock_irqrestore(&adapter->upr_lock, flags);
920 return rc;
921}
922
923static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
924{
925 struct slic_shmemory *sm = &adapter->shmem;
926 struct slic_shmem_data *sm_data = sm->shmem_data;
927 u32 lst = sm_data->lnkstatus;
928 uint linkup;
929 unsigned char linkspeed;
930 unsigned char linkduplex;
931
932 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
933 dma_addr_t phaddr = sm->lnkstatus_phaddr;
934
935 slic_upr_queue_request(adapter, SLIC_UPR_RLSR,
936 cpu_to_le32(lower_32_bits(phaddr)),
937 cpu_to_le32(upper_32_bits(phaddr)),
938 0, 0);
939 return;
940 }
941 if (adapter->state != ADAPT_UP)
942 return;
943
944 linkup = lst & GIG_LINKUP ? LINK_UP : LINK_DOWN;
945 if (lst & GIG_SPEED_1000)
946 linkspeed = LINK_1000MB;
947 else if (lst & GIG_SPEED_100)
948 linkspeed = LINK_100MB;
949 else
950 linkspeed = LINK_10MB;
951
952 if (lst & GIG_FULLDUPLEX)
953 linkduplex = LINK_FULLD;
954 else
955 linkduplex = LINK_HALFD;
956
957 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
958 return;
959
960
961 if ((adapter->linkstate == LINK_UP) &&
962 (linkup == LINK_UP) &&
963 (adapter->linkspeed == linkspeed) &&
964 (adapter->linkduplex == linkduplex))
965 return;
966
967
968
969
970 if (linkup == LINK_DOWN) {
971 adapter->linkstate = LINK_DOWN;
972 netif_carrier_off(adapter->netdev);
973 return;
974 }
975
976
977 adapter->linkspeed = linkspeed;
978 adapter->linkduplex = linkduplex;
979
980 if (adapter->linkstate != LINK_UP) {
981
982 slic_config_set(adapter, true);
983 adapter->linkstate = LINK_UP;
984 netif_carrier_on(adapter->netdev);
985 }
986}
987
988static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
989{
990 struct sliccard *card = adapter->card;
991 struct slic_upr *upr;
992 unsigned long flags;
993
994 spin_lock_irqsave(&adapter->upr_lock, flags);
995 upr = adapter->upr_list;
996 if (!upr) {
997 spin_unlock_irqrestore(&adapter->upr_lock, flags);
998 return;
999 }
1000 adapter->upr_list = upr->next;
1001 upr->next = NULL;
1002 adapter->upr_busy = 0;
1003 switch (upr->upr_request) {
1004 case SLIC_UPR_STATS: {
1005 struct slic_shmemory *sm = &adapter->shmem;
1006 struct slic_shmem_data *sm_data = sm->shmem_data;
1007 struct slic_stats *stats = &sm_data->stats;
1008 struct slic_stats *old = &adapter->inicstats_prev;
1009 struct slicnet_stats *stst = &adapter->slic_stats;
1010
1011 if (isr & ISR_UPCERR) {
1012 dev_err(&adapter->netdev->dev,
1013 "SLIC_UPR_STATS command failed isr[%x]\n", isr);
1014 break;
1015 }
1016
1017 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs, stats->xmit_tcp_segs,
1018 old->xmit_tcp_segs);
1019
1020 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes, stats->xmit_tcp_bytes,
1021 old->xmit_tcp_bytes);
1022
1023 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs, stats->rcv_tcp_segs,
1024 old->rcv_tcp_segs);
1025
1026 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes, stats->rcv_tcp_bytes,
1027 old->rcv_tcp_bytes);
1028
1029 UPDATE_STATS_GB(stst->iface.xmt_bytes, stats->xmit_bytes,
1030 old->xmit_bytes);
1031
1032 UPDATE_STATS_GB(stst->iface.xmt_ucast, stats->xmit_unicasts,
1033 old->xmit_unicasts);
1034
1035 UPDATE_STATS_GB(stst->iface.rcv_bytes, stats->rcv_bytes,
1036 old->rcv_bytes);
1037
1038 UPDATE_STATS_GB(stst->iface.rcv_ucast, stats->rcv_unicasts,
1039 old->rcv_unicasts);
1040
1041 UPDATE_STATS_GB(stst->iface.xmt_errors, stats->xmit_collisions,
1042 old->xmit_collisions);
1043
1044 UPDATE_STATS_GB(stst->iface.xmt_errors,
1045 stats->xmit_excess_collisions,
1046 old->xmit_excess_collisions);
1047
1048 UPDATE_STATS_GB(stst->iface.xmt_errors, stats->xmit_other_error,
1049 old->xmit_other_error);
1050
1051 UPDATE_STATS_GB(stst->iface.rcv_errors, stats->rcv_other_error,
1052 old->rcv_other_error);
1053
1054 UPDATE_STATS_GB(stst->iface.rcv_discards, stats->rcv_drops,
1055 old->rcv_drops);
1056
1057 if (stats->rcv_drops > old->rcv_drops)
1058 adapter->rcv_drops += (stats->rcv_drops -
1059 old->rcv_drops);
1060 memcpy_fromio(old, stats, sizeof(*stats));
1061 break;
1062 }
1063 case SLIC_UPR_RLSR:
1064 slic_link_upr_complete(adapter, isr);
1065 break;
1066 case SLIC_UPR_RCONFIG:
1067 break;
1068 case SLIC_UPR_PING:
1069 card->pingstatus |= (isr & ISR_PINGDSMASK);
1070 break;
1071 }
1072 kfree(upr);
1073 slic_upr_start(adapter);
1074 spin_unlock_irqrestore(&adapter->upr_lock, flags);
1075}
1076
1077static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
1078{
1079 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
1080 0, 0);
1081}
1082
1083
1084
1085
1086static u16 slic_eeprom_cksum(void *eeprom, unsigned int len)
1087{
1088 u16 *wp = eeprom;
1089 u32 checksum = 0;
1090
1091 while (len > 1) {
1092 checksum += *(wp++);
1093 len -= 2;
1094 }
1095
1096 if (len > 0)
1097 checksum += *(u8 *)wp;
1098
1099 while (checksum >> 16)
1100 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
1101
1102 return ~checksum;
1103}
1104
1105static void slic_rspqueue_free(struct adapter *adapter)
1106{
1107 int i;
1108 struct slic_rspqueue *rspq = &adapter->rspqueue;
1109
1110 for (i = 0; i < rspq->num_pages; i++) {
1111 if (rspq->vaddr[i]) {
1112 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1113 rspq->vaddr[i], rspq->paddr[i]);
1114 }
1115 rspq->vaddr[i] = NULL;
1116 rspq->paddr[i] = 0;
1117 }
1118 rspq->offset = 0;
1119 rspq->pageindex = 0;
1120 rspq->rspbuf = NULL;
1121}
1122
1123static int slic_rspqueue_init(struct adapter *adapter)
1124{
1125 int i;
1126 struct slic_rspqueue *rspq = &adapter->rspqueue;
1127 u32 paddrh = 0;
1128
1129 memset(rspq, 0, sizeof(struct slic_rspqueue));
1130
1131 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1132
1133 for (i = 0; i < rspq->num_pages; i++) {
1134 rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
1135 PAGE_SIZE,
1136 &rspq->paddr[i]);
1137 if (!rspq->vaddr[i]) {
1138 dev_err(&adapter->pcidev->dev,
1139 "pci_alloc_consistent failed\n");
1140 slic_rspqueue_free(adapter);
1141 return -ENOMEM;
1142 }
1143
1144 if (paddrh == 0) {
1145 slic_write32(adapter, SLIC_REG_RBAR,
1146 rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE);
1147 } else {
1148 slic_write64(adapter, SLIC_REG_RBAR64,
1149 rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE,
1150 paddrh);
1151 }
1152 }
1153 rspq->offset = 0;
1154 rspq->pageindex = 0;
1155 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1156 return 0;
1157}
1158
1159static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1160{
1161 struct slic_rspqueue *rspq = &adapter->rspqueue;
1162 struct slic_rspbuf *buf;
1163
1164 if (!(rspq->rspbuf->status))
1165 return NULL;
1166
1167 buf = rspq->rspbuf;
1168 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1169 rspq->rspbuf++;
1170 } else {
1171 slic_write64(adapter, SLIC_REG_RBAR64,
1172 rspq->paddr[rspq->pageindex] |
1173 SLIC_RSPQ_BUFSINPAGE, 0);
1174 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1175 rspq->offset = 0;
1176 rspq->rspbuf = (struct slic_rspbuf *)
1177 rspq->vaddr[rspq->pageindex];
1178 }
1179
1180 return buf;
1181}
1182
1183static void slic_cmdqmem_free(struct adapter *adapter)
1184{
1185 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1186 int i;
1187
1188 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1189 if (cmdqmem->pages[i]) {
1190 pci_free_consistent(adapter->pcidev,
1191 PAGE_SIZE,
1192 (void *)cmdqmem->pages[i],
1193 cmdqmem->dma_pages[i]);
1194 }
1195 }
1196 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1197}
1198
1199static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1200{
1201 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1202 u32 *pageaddr;
1203
1204 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1205 return NULL;
1206 pageaddr = pci_alloc_consistent(adapter->pcidev,
1207 PAGE_SIZE,
1208 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1209 if (!pageaddr)
1210 return NULL;
1211
1212 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1213 cmdqmem->pagecnt++;
1214 return pageaddr;
1215}
1216
1217static void slic_cmdq_free(struct adapter *adapter)
1218{
1219 struct slic_hostcmd *cmd;
1220
1221 cmd = adapter->cmdq_all.head;
1222 while (cmd) {
1223 if (cmd->busy) {
1224 struct sk_buff *tempskb;
1225
1226 tempskb = cmd->skb;
1227 if (tempskb) {
1228 cmd->skb = NULL;
1229 dev_kfree_skb_irq(tempskb);
1230 }
1231 }
1232 cmd = cmd->next_all;
1233 }
1234 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1235 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1236 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1237 slic_cmdqmem_free(adapter);
1238}
1239
1240static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1241{
1242 struct slic_hostcmd *cmd;
1243 struct slic_hostcmd *prev;
1244 struct slic_hostcmd *tail;
1245 struct slic_cmdqueue *cmdq;
1246 int cmdcnt;
1247 void *cmdaddr;
1248 ulong phys_addr;
1249 u32 phys_addrl;
1250 u32 phys_addrh;
1251 struct slic_handle *pslic_handle;
1252 unsigned long flags;
1253
1254 cmdaddr = page;
1255 cmd = cmdaddr;
1256 cmdcnt = 0;
1257
1258 phys_addr = virt_to_bus((void *)page);
1259 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1260 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1261
1262 prev = NULL;
1263 tail = cmd;
1264 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1265 (adapter->slic_handle_ix < 256)) {
1266
1267 spin_lock_irqsave(&adapter->handle_lock, flags);
1268 pslic_handle = adapter->pfree_slic_handles;
1269 adapter->pfree_slic_handles = pslic_handle->next;
1270 spin_unlock_irqrestore(&adapter->handle_lock, flags);
1271 pslic_handle->type = SLIC_HANDLE_CMD;
1272 pslic_handle->address = (void *)cmd;
1273 pslic_handle->offset = (ushort)adapter->slic_handle_ix++;
1274 pslic_handle->other_handle = NULL;
1275 pslic_handle->next = NULL;
1276
1277 cmd->pslic_handle = pslic_handle;
1278 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1279 cmd->busy = false;
1280 cmd->paddrl = phys_addrl;
1281 cmd->paddrh = phys_addrh;
1282 cmd->next_all = prev;
1283 cmd->next = prev;
1284 prev = cmd;
1285 phys_addrl += SLIC_HOSTCMD_SIZE;
1286 cmdaddr += SLIC_HOSTCMD_SIZE;
1287
1288 cmd = cmdaddr;
1289 cmdcnt++;
1290 }
1291
1292 cmdq = &adapter->cmdq_all;
1293 cmdq->count += cmdcnt;
1294 tail->next_all = cmdq->head;
1295 cmdq->head = prev;
1296 cmdq = &adapter->cmdq_free;
1297 spin_lock_irqsave(&cmdq->lock, flags);
1298 cmdq->count += cmdcnt;
1299 tail->next = cmdq->head;
1300 cmdq->head = prev;
1301 spin_unlock_irqrestore(&cmdq->lock, flags);
1302}
1303
1304static int slic_cmdq_init(struct adapter *adapter)
1305{
1306 int i;
1307 u32 *pageaddr;
1308
1309 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1310 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1311 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1312 spin_lock_init(&adapter->cmdq_all.lock);
1313 spin_lock_init(&adapter->cmdq_free.lock);
1314 spin_lock_init(&adapter->cmdq_done.lock);
1315 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1316 adapter->slic_handle_ix = 1;
1317 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1318 pageaddr = slic_cmdqmem_addpage(adapter);
1319 if (!pageaddr) {
1320 slic_cmdq_free(adapter);
1321 return -ENOMEM;
1322 }
1323 slic_cmdq_addcmdpage(adapter, pageaddr);
1324 }
1325 adapter->slic_handle_ix = 1;
1326
1327 return 0;
1328}
1329
1330static void slic_cmdq_reset(struct adapter *adapter)
1331{
1332 struct slic_hostcmd *hcmd;
1333 struct sk_buff *skb;
1334 u32 outstanding;
1335 unsigned long flags;
1336
1337 spin_lock_irqsave(&adapter->cmdq_free.lock, flags);
1338 spin_lock(&adapter->cmdq_done.lock);
1339 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1340 outstanding -= adapter->cmdq_free.count;
1341 hcmd = adapter->cmdq_all.head;
1342 while (hcmd) {
1343 if (hcmd->busy) {
1344 skb = hcmd->skb;
1345 hcmd->busy = 0;
1346 hcmd->skb = NULL;
1347 dev_kfree_skb_irq(skb);
1348 }
1349 hcmd = hcmd->next_all;
1350 }
1351 adapter->cmdq_free.count = 0;
1352 adapter->cmdq_free.head = NULL;
1353 adapter->cmdq_free.tail = NULL;
1354 adapter->cmdq_done.count = 0;
1355 adapter->cmdq_done.head = NULL;
1356 adapter->cmdq_done.tail = NULL;
1357 adapter->cmdq_free.head = adapter->cmdq_all.head;
1358 hcmd = adapter->cmdq_all.head;
1359 while (hcmd) {
1360 adapter->cmdq_free.count++;
1361 hcmd->next = hcmd->next_all;
1362 hcmd = hcmd->next_all;
1363 }
1364 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1365 dev_err(&adapter->netdev->dev,
1366 "free_count %d != all count %d\n",
1367 adapter->cmdq_free.count, adapter->cmdq_all.count);
1368 }
1369 spin_unlock(&adapter->cmdq_done.lock);
1370 spin_unlock_irqrestore(&adapter->cmdq_free.lock, flags);
1371}
1372
1373static void slic_cmdq_getdone(struct adapter *adapter)
1374{
1375 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1376 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1377 unsigned long flags;
1378
1379 spin_lock_irqsave(&done_cmdq->lock, flags);
1380
1381 free_cmdq->head = done_cmdq->head;
1382 free_cmdq->count = done_cmdq->count;
1383 done_cmdq->head = NULL;
1384 done_cmdq->tail = NULL;
1385 done_cmdq->count = 0;
1386 spin_unlock_irqrestore(&done_cmdq->lock, flags);
1387}
1388
1389static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1390{
1391 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1392 struct slic_hostcmd *cmd = NULL;
1393 unsigned long flags;
1394
1395lock_and_retry:
1396 spin_lock_irqsave(&cmdq->lock, flags);
1397retry:
1398 cmd = cmdq->head;
1399 if (cmd) {
1400 cmdq->head = cmd->next;
1401 cmdq->count--;
1402 spin_unlock_irqrestore(&cmdq->lock, flags);
1403 } else {
1404 slic_cmdq_getdone(adapter);
1405 cmd = cmdq->head;
1406 if (cmd) {
1407 goto retry;
1408 } else {
1409 u32 *pageaddr;
1410
1411 spin_unlock_irqrestore(&cmdq->lock, flags);
1412 pageaddr = slic_cmdqmem_addpage(adapter);
1413 if (pageaddr) {
1414 slic_cmdq_addcmdpage(adapter, pageaddr);
1415 goto lock_and_retry;
1416 }
1417 }
1418 }
1419 return cmd;
1420}
1421
1422static void slic_cmdq_putdone_irq(struct adapter *adapter,
1423 struct slic_hostcmd *cmd)
1424{
1425 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1426
1427 spin_lock(&cmdq->lock);
1428 cmd->busy = 0;
1429 cmd->next = cmdq->head;
1430 cmdq->head = cmd;
1431 cmdq->count++;
1432 if ((adapter->xmitq_full) && (cmdq->count > 10))
1433 netif_wake_queue(adapter->netdev);
1434 spin_unlock(&cmdq->lock);
1435}
1436
1437static int slic_rcvqueue_fill(struct adapter *adapter)
1438{
1439 void *paddr;
1440 u32 paddrl;
1441 u32 paddrh;
1442 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1443 int i = 0;
1444 struct device *dev = &adapter->netdev->dev;
1445
1446 while (i < SLIC_RCVQ_FILLENTRIES) {
1447 struct slic_rcvbuf *rcvbuf;
1448 struct sk_buff *skb;
1449#ifdef KLUDGE_FOR_4GB_BOUNDARY
1450retry_rcvqfill:
1451#endif
1452 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1453 if (skb) {
1454 paddr = (void *)(unsigned long)
1455 pci_map_single(adapter->pcidev,
1456 skb->data,
1457 SLIC_RCVQ_RCVBUFSIZE,
1458 PCI_DMA_FROMDEVICE);
1459 paddrl = SLIC_GET_ADDR_LOW(paddr);
1460 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1461
1462 skb->len = SLIC_RCVBUF_HEADSIZE;
1463 rcvbuf = (struct slic_rcvbuf *)skb->head;
1464 rcvbuf->status = 0;
1465 skb->next = NULL;
1466#ifdef KLUDGE_FOR_4GB_BOUNDARY
1467 if (paddrl == 0) {
1468 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1469 __func__);
1470 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1471 dev_err(dev, " skbdata[%p]\n",
1472 skb->data);
1473 dev_err(dev, " skblen[%x]\n", skb->len);
1474 dev_err(dev, " paddr[%p]\n", paddr);
1475 dev_err(dev, " paddrl[%x]\n", paddrl);
1476 dev_err(dev, " paddrh[%x]\n", paddrh);
1477 dev_err(dev, " rcvq->head[%p]\n",
1478 rcvq->head);
1479 dev_err(dev, " rcvq->tail[%p]\n",
1480 rcvq->tail);
1481 dev_err(dev, " rcvq->count[%x]\n",
1482 rcvq->count);
1483 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1484 goto retry_rcvqfill;
1485 }
1486#else
1487 if (paddrl == 0) {
1488 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1489 __func__);
1490 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1491 dev_err(dev, " skbdata[%p]\n",
1492 skb->data);
1493 dev_err(dev, " skblen[%x]\n", skb->len);
1494 dev_err(dev, " paddr[%p]\n", paddr);
1495 dev_err(dev, " paddrl[%x]\n", paddrl);
1496 dev_err(dev, " paddrh[%x]\n", paddrh);
1497 dev_err(dev, " rcvq->head[%p]\n",
1498 rcvq->head);
1499 dev_err(dev, " rcvq->tail[%p]\n",
1500 rcvq->tail);
1501 dev_err(dev, " rcvq->count[%x]\n",
1502 rcvq->count);
1503 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1504 }
1505#endif
1506 if (paddrh == 0) {
1507 slic_write32(adapter, SLIC_REG_HBAR,
1508 (u32)paddrl);
1509 } else {
1510 slic_write64(adapter, SLIC_REG_HBAR64, paddrl,
1511 paddrh);
1512 }
1513 if (rcvq->head)
1514 rcvq->tail->next = skb;
1515 else
1516 rcvq->head = skb;
1517 rcvq->tail = skb;
1518 rcvq->count++;
1519 i++;
1520 } else {
1521 dev_err(&adapter->netdev->dev,
1522 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1523 i);
1524 break;
1525 }
1526 }
1527 return i;
1528}
1529
1530static void slic_rcvqueue_free(struct adapter *adapter)
1531{
1532 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1533 struct sk_buff *skb;
1534
1535 while (rcvq->head) {
1536 skb = rcvq->head;
1537 rcvq->head = rcvq->head->next;
1538 dev_kfree_skb(skb);
1539 }
1540 rcvq->tail = NULL;
1541 rcvq->head = NULL;
1542 rcvq->count = 0;
1543}
1544
1545static int slic_rcvqueue_init(struct adapter *adapter)
1546{
1547 int i, count;
1548 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1549
1550 rcvq->tail = NULL;
1551 rcvq->head = NULL;
1552 rcvq->size = SLIC_RCVQ_ENTRIES;
1553 rcvq->errors = 0;
1554 rcvq->count = 0;
1555 i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES;
1556 count = 0;
1557 while (i) {
1558 count += slic_rcvqueue_fill(adapter);
1559 i--;
1560 }
1561 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1562 slic_rcvqueue_free(adapter);
1563 return -ENOMEM;
1564 }
1565 return 0;
1566}
1567
1568static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1569{
1570 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1571 struct sk_buff *skb;
1572 struct slic_rcvbuf *rcvbuf;
1573 int count;
1574
1575 if (rcvq->count) {
1576 skb = rcvq->head;
1577 rcvbuf = (struct slic_rcvbuf *)skb->head;
1578
1579 if (rcvbuf->status & IRHDDR_SVALID) {
1580 rcvq->head = rcvq->head->next;
1581 skb->next = NULL;
1582 rcvq->count--;
1583 } else {
1584 skb = NULL;
1585 }
1586 } else {
1587 dev_err(&adapter->netdev->dev,
1588 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1589 skb = NULL;
1590 }
1591 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1592 count = slic_rcvqueue_fill(adapter);
1593 if (!count)
1594 break;
1595 }
1596 if (skb)
1597 rcvq->errors = 0;
1598 return skb;
1599}
1600
1601static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1602{
1603 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1604 void *paddr;
1605 u32 paddrl;
1606 u32 paddrh;
1607 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1608 struct device *dev;
1609
1610 paddr = (void *)(unsigned long)
1611 pci_map_single(adapter->pcidev, skb->head,
1612 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1613 rcvbuf->status = 0;
1614 skb->next = NULL;
1615
1616 paddrl = SLIC_GET_ADDR_LOW(paddr);
1617 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1618
1619 if (paddrl == 0) {
1620 dev = &adapter->netdev->dev;
1621 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1622 __func__);
1623 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1624 dev_err(dev, " skbdata[%p]\n", skb->data);
1625 dev_err(dev, " skblen[%x]\n", skb->len);
1626 dev_err(dev, " paddr[%p]\n", paddr);
1627 dev_err(dev, " paddrl[%x]\n", paddrl);
1628 dev_err(dev, " paddrh[%x]\n", paddrh);
1629 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1630 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1631 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1632 }
1633 if (paddrh == 0)
1634 slic_write32(adapter, SLIC_REG_HBAR, (u32)paddrl);
1635 else
1636 slic_write64(adapter, SLIC_REG_HBAR64, paddrl, paddrh);
1637 if (rcvq->head)
1638 rcvq->tail->next = skb;
1639 else
1640 rcvq->head = skb;
1641 rcvq->tail = skb;
1642 rcvq->count++;
1643 return rcvq->count;
1644}
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656static int slic_link_event_handler(struct adapter *adapter)
1657{
1658 int status;
1659 struct slic_shmemory *sm = &adapter->shmem;
1660 dma_addr_t phaddr = sm->lnkstatus_phaddr;
1661
1662 if (adapter->state != ADAPT_UP) {
1663
1664 return -ENODEV;
1665 }
1666
1667 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1668 cpu_to_le32(lower_32_bits(phaddr)),
1669 cpu_to_le32(upper_32_bits(phaddr)), 0, 0);
1670 return status;
1671}
1672
1673static void slic_init_cleanup(struct adapter *adapter)
1674{
1675 if (adapter->intrregistered) {
1676 adapter->intrregistered = 0;
1677 free_irq(adapter->netdev->irq, adapter->netdev);
1678 }
1679
1680 if (adapter->shmem.shmem_data) {
1681 struct slic_shmemory *sm = &adapter->shmem;
1682 struct slic_shmem_data *sm_data = sm->shmem_data;
1683
1684 pci_free_consistent(adapter->pcidev, sizeof(*sm_data), sm_data,
1685 sm->isr_phaddr);
1686 }
1687
1688 if (adapter->pingtimerset) {
1689 adapter->pingtimerset = 0;
1690 del_timer(&adapter->pingtimer);
1691 }
1692
1693 slic_rspqueue_free(adapter);
1694 slic_cmdq_free(adapter);
1695 slic_rcvqueue_free(adapter);
1696}
1697
1698
1699
1700
1701
1702static int slic_mcast_add_list(struct adapter *adapter, char *address)
1703{
1704 struct mcast_address *mcaddr, *mlist;
1705
1706
1707 mlist = adapter->mcastaddrs;
1708 while (mlist) {
1709 if (ether_addr_equal(mlist->address, address))
1710 return 0;
1711 mlist = mlist->next;
1712 }
1713
1714
1715 mcaddr = kmalloc(sizeof(*mcaddr), GFP_ATOMIC);
1716 if (!mcaddr)
1717 return 1;
1718
1719 ether_addr_copy(mcaddr->address, address);
1720
1721 mcaddr->next = adapter->mcastaddrs;
1722 adapter->mcastaddrs = mcaddr;
1723
1724 return 0;
1725}
1726
1727static void slic_mcast_set_list(struct net_device *dev)
1728{
1729 struct adapter *adapter = netdev_priv(dev);
1730 int status = 0;
1731 char *addresses;
1732 struct netdev_hw_addr *ha;
1733
1734 netdev_for_each_mc_addr(ha, dev) {
1735 addresses = (char *)&ha->addr;
1736 status = slic_mcast_add_list(adapter, addresses);
1737 if (status != 0)
1738 break;
1739 slic_mcast_set_bit(adapter, addresses);
1740 }
1741
1742 if (adapter->devflags_prev != dev->flags) {
1743 adapter->macopts = MAC_DIRECTED;
1744 if (dev->flags) {
1745 if (dev->flags & IFF_BROADCAST)
1746 adapter->macopts |= MAC_BCAST;
1747 if (dev->flags & IFF_PROMISC)
1748 adapter->macopts |= MAC_PROMISC;
1749 if (dev->flags & IFF_ALLMULTI)
1750 adapter->macopts |= MAC_ALLMCAST;
1751 if (dev->flags & IFF_MULTICAST)
1752 adapter->macopts |= MAC_MCAST;
1753 }
1754 adapter->devflags_prev = dev->flags;
1755 slic_config_set(adapter, true);
1756 } else {
1757 if (status == 0)
1758 slic_mcast_set_mask(adapter);
1759 }
1760}
1761
1762#define XMIT_FAIL_LINK_STATE 1
1763#define XMIT_FAIL_ZERO_LENGTH 2
1764#define XMIT_FAIL_HOSTCMD_FAIL 3
1765
1766static void slic_xmit_build_request(struct adapter *adapter,
1767 struct slic_hostcmd *hcmd, struct sk_buff *skb)
1768{
1769 struct slic_host64_cmd *ihcmd;
1770 ulong phys_addr;
1771
1772 ihcmd = &hcmd->cmd64;
1773
1774 ihcmd->flags = adapter->port << IHFLG_IFSHFT;
1775 ihcmd->command = IHCMD_XMT_REQ;
1776 ihcmd->u.slic_buffers.totlen = skb->len;
1777 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
1778 PCI_DMA_TODEVICE);
1779 if (pci_dma_mapping_error(adapter->pcidev, phys_addr)) {
1780 kfree_skb(skb);
1781 dev_err(&adapter->pcidev->dev, "DMA mapping error\n");
1782 return;
1783 }
1784 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
1785 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
1786 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1787#if BITS_PER_LONG == 64
1788 hcmd->cmdsize = (u32)((((u64)&ihcmd->u.slic_buffers.bufs[1] -
1789 (u64)hcmd) + 31) >> 5);
1790#else
1791 hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
1792 (u32)hcmd) + 31) >> 5;
1793#endif
1794}
1795
1796static void slic_xmit_fail(struct adapter *adapter,
1797 struct sk_buff *skb,
1798 void *cmd, u32 skbtype, u32 status)
1799{
1800 if (adapter->xmitq_full)
1801 netif_stop_queue(adapter->netdev);
1802 if ((!cmd) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1803 switch (status) {
1804 case XMIT_FAIL_LINK_STATE:
1805 dev_err(&adapter->netdev->dev,
1806 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
1807 skb, skb->pkt_type,
1808 SLIC_LINKSTATE(adapter->linkstate),
1809 SLIC_ADAPTER_STATE(adapter->state),
1810 adapter->state,
1811 SLIC_CARD_STATE(adapter->card->state),
1812 adapter->card->state);
1813 break;
1814 case XMIT_FAIL_ZERO_LENGTH:
1815 dev_err(&adapter->netdev->dev,
1816 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
1817 skb, skb->pkt_type);
1818 break;
1819 case XMIT_FAIL_HOSTCMD_FAIL:
1820 dev_err(&adapter->netdev->dev,
1821 "xmit_start skb[%p] type[%x] No host commands available\n",
1822 skb, skb->pkt_type);
1823 break;
1824 }
1825 }
1826 dev_kfree_skb(skb);
1827 adapter->netdev->stats.tx_dropped++;
1828}
1829
1830static void slic_rcv_handle_error(struct adapter *adapter,
1831 struct slic_rcvbuf *rcvbuf)
1832{
1833 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1834 struct net_device *netdev = adapter->netdev;
1835
1836 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1837 if (hdr->frame_status14 & VRHSTAT_802OE)
1838 adapter->if_events.oflow802++;
1839 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1840 adapter->if_events.Tprtoflow++;
1841 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1842 adapter->if_events.uflow802++;
1843 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1844 adapter->if_events.rcvearly++;
1845 netdev->stats.rx_fifo_errors++;
1846 }
1847 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1848 adapter->if_events.Bufov++;
1849 netdev->stats.rx_over_errors++;
1850 }
1851 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1852 adapter->if_events.Carre++;
1853 netdev->stats.tx_carrier_errors++;
1854 }
1855 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1856 adapter->if_events.Longe++;
1857 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1858 adapter->if_events.Invp++;
1859 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1860 adapter->if_events.Crc++;
1861 netdev->stats.rx_crc_errors++;
1862 }
1863 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1864 adapter->if_events.Drbl++;
1865 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1866 adapter->if_events.Code++;
1867 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1868 adapter->if_events.TpCsum++;
1869 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1870 adapter->if_events.TpHlen++;
1871 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1872 adapter->if_events.IpCsum++;
1873 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1874 adapter->if_events.IpLen++;
1875 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1876 adapter->if_events.IpHlen++;
1877 } else {
1878 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1879 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1880
1881 if (xerr == VGBSTAT_XCSERR)
1882 adapter->if_events.TpCsum++;
1883 if (xerr == VGBSTAT_XUFLOW)
1884 adapter->if_events.Tprtoflow++;
1885 if (xerr == VGBSTAT_XHLEN)
1886 adapter->if_events.TpHlen++;
1887 }
1888 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1889 u32 nerr =
1890 (hdr->
1891 frame_statusGB >> VGBSTAT_NERRSHFT) &
1892 VGBSTAT_NERRMSK;
1893 if (nerr == VGBSTAT_NCSERR)
1894 adapter->if_events.IpCsum++;
1895 if (nerr == VGBSTAT_NUFLOW)
1896 adapter->if_events.IpLen++;
1897 if (nerr == VGBSTAT_NHLEN)
1898 adapter->if_events.IpHlen++;
1899 }
1900 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1901 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1902
1903 if (lerr == VGBSTAT_LDEARLY)
1904 adapter->if_events.rcvearly++;
1905 if (lerr == VGBSTAT_LBOFLO)
1906 adapter->if_events.Bufov++;
1907 if (lerr == VGBSTAT_LCODERR)
1908 adapter->if_events.Code++;
1909 if (lerr == VGBSTAT_LDBLNBL)
1910 adapter->if_events.Drbl++;
1911 if (lerr == VGBSTAT_LCRCERR)
1912 adapter->if_events.Crc++;
1913 if (lerr == VGBSTAT_LOFLO)
1914 adapter->if_events.oflow802++;
1915 if (lerr == VGBSTAT_LUFLO)
1916 adapter->if_events.uflow802++;
1917 }
1918 }
1919}
1920
1921#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1922#define M_FAST_PATH 0x0040
1923
1924static void slic_rcv_handler(struct adapter *adapter)
1925{
1926 struct net_device *netdev = adapter->netdev;
1927 struct sk_buff *skb;
1928 struct slic_rcvbuf *rcvbuf;
1929 u32 frames = 0;
1930
1931 while ((skb = slic_rcvqueue_getnext(adapter))) {
1932 u32 rx_bytes;
1933
1934 rcvbuf = (struct slic_rcvbuf *)skb->head;
1935 adapter->card->events++;
1936 if (rcvbuf->status & IRHDDR_ERR) {
1937 adapter->rx_errors++;
1938 slic_rcv_handle_error(adapter, rcvbuf);
1939 slic_rcvqueue_reinsert(adapter, skb);
1940 continue;
1941 }
1942
1943 if (!slic_mac_filter(adapter, (struct ether_header *)
1944 rcvbuf->data)) {
1945 slic_rcvqueue_reinsert(adapter, skb);
1946 continue;
1947 }
1948 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1949 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1950 skb_put(skb, rx_bytes);
1951 netdev->stats.rx_packets++;
1952 netdev->stats.rx_bytes += rx_bytes;
1953#if SLIC_OFFLOAD_IP_CHECKSUM
1954 skb->ip_summed = CHECKSUM_UNNECESSARY;
1955#endif
1956
1957 skb->dev = adapter->netdev;
1958 skb->protocol = eth_type_trans(skb, skb->dev);
1959 netif_rx(skb);
1960
1961 ++frames;
1962#if SLIC_INTERRUPT_PROCESS_LIMIT
1963 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1964 adapter->rcv_interrupt_yields++;
1965 break;
1966 }
1967#endif
1968 }
1969 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1970}
1971
1972static void slic_xmit_complete(struct adapter *adapter)
1973{
1974 struct slic_hostcmd *hcmd;
1975 struct slic_rspbuf *rspbuf;
1976 u32 frames = 0;
1977 struct slic_handle_word slic_handle_word;
1978
1979 do {
1980 rspbuf = slic_rspqueue_getnext(adapter);
1981 if (!rspbuf)
1982 break;
1983 adapter->xmit_completes++;
1984 adapter->card->events++;
1985
1986
1987
1988 slic_handle_word.handle_token = rspbuf->hosthandle;
1989 hcmd =
1990 adapter->slic_handles[slic_handle_word.handle_index].
1991 address;
1992
1993 if (hcmd->type == SLIC_CMD_DUMB) {
1994 if (hcmd->skb)
1995 dev_kfree_skb_irq(hcmd->skb);
1996 slic_cmdq_putdone_irq(adapter, hcmd);
1997 }
1998 rspbuf->status = 0;
1999 rspbuf->hosthandle = 0;
2000 frames++;
2001 } while (1);
2002 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2003}
2004
2005static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2006 struct net_device *dev)
2007{
2008 if (isr & ~ISR_IO) {
2009 if (isr & ISR_ERR) {
2010 adapter->error_interrupts++;
2011 if (isr & ISR_RMISS) {
2012 int count;
2013 int pre_count;
2014 int errors;
2015
2016 struct slic_rcvqueue *rcvq =
2017 &adapter->rcvqueue;
2018
2019 adapter->error_rmiss_interrupts++;
2020
2021 if (!rcvq->errors)
2022 rcv_count = rcvq->count;
2023 pre_count = rcvq->count;
2024 errors = rcvq->errors;
2025
2026 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2027 count = slic_rcvqueue_fill(adapter);
2028 if (!count)
2029 break;
2030 }
2031 } else if (isr & ISR_XDROP) {
2032 dev_err(&dev->dev,
2033 "isr & ISR_ERR [%x] ISR_XDROP\n",
2034 isr);
2035 } else {
2036 dev_err(&dev->dev,
2037 "isr & ISR_ERR [%x]\n",
2038 isr);
2039 }
2040 }
2041
2042 if (isr & ISR_LEVENT) {
2043 adapter->linkevent_interrupts++;
2044 if (slic_link_event_handler(adapter))
2045 adapter->linkevent_interrupts--;
2046 }
2047
2048 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2049 (isr & ISR_UPCBSY)) {
2050 adapter->upr_interrupts++;
2051 slic_upr_request_complete(adapter, isr);
2052 }
2053 }
2054
2055 if (isr & ISR_RCV) {
2056 adapter->rcv_interrupts++;
2057 slic_rcv_handler(adapter);
2058 }
2059
2060 if (isr & ISR_CMD) {
2061 adapter->xmit_interrupts++;
2062 slic_xmit_complete(adapter);
2063 }
2064}
2065
2066static irqreturn_t slic_interrupt(int irq, void *dev_id)
2067{
2068 struct net_device *dev = dev_id;
2069 struct adapter *adapter = netdev_priv(dev);
2070 struct slic_shmemory *sm = &adapter->shmem;
2071 struct slic_shmem_data *sm_data = sm->shmem_data;
2072 u32 isr;
2073
2074 if (sm_data->isr) {
2075 slic_write32(adapter, SLIC_REG_ICR, ICR_INT_MASK);
2076 slic_flush_write(adapter);
2077
2078 isr = sm_data->isr;
2079 sm_data->isr = 0;
2080 adapter->num_isrs++;
2081 switch (adapter->card->state) {
2082 case CARD_UP:
2083 slic_interrupt_card_up(isr, adapter, dev);
2084 break;
2085
2086 case CARD_DOWN:
2087 if ((isr & ISR_UPC) ||
2088 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2089 adapter->upr_interrupts++;
2090 slic_upr_request_complete(adapter, isr);
2091 }
2092 break;
2093 }
2094
2095 adapter->all_reg_writes += 2;
2096 adapter->isr_reg_writes++;
2097 slic_write32(adapter, SLIC_REG_ISR, 0);
2098 } else {
2099 adapter->false_interrupts++;
2100 }
2101 return IRQ_HANDLED;
2102}
2103
2104#define NORMAL_ETHFRAME 0
2105
2106static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2107{
2108 struct sliccard *card;
2109 struct adapter *adapter = netdev_priv(dev);
2110 struct slic_hostcmd *hcmd = NULL;
2111 u32 status = 0;
2112 void *offloadcmd = NULL;
2113
2114 card = adapter->card;
2115 if ((adapter->linkstate != LINK_UP) ||
2116 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2117 status = XMIT_FAIL_LINK_STATE;
2118 goto xmit_fail;
2119
2120 } else if (skb->len == 0) {
2121 status = XMIT_FAIL_ZERO_LENGTH;
2122 goto xmit_fail;
2123 }
2124
2125 hcmd = slic_cmdq_getfree(adapter);
2126 if (!hcmd) {
2127 adapter->xmitq_full = 1;
2128 status = XMIT_FAIL_HOSTCMD_FAIL;
2129 goto xmit_fail;
2130 }
2131 hcmd->skb = skb;
2132 hcmd->busy = 1;
2133 hcmd->type = SLIC_CMD_DUMB;
2134 slic_xmit_build_request(adapter, hcmd, skb);
2135 dev->stats.tx_packets++;
2136 dev->stats.tx_bytes += skb->len;
2137
2138#ifdef DEBUG_DUMP
2139 if (adapter->kill_card) {
2140 struct slic_host64_cmd ihcmd;
2141
2142 ihcmd = &hcmd->cmd64;
2143
2144 ihcmd->flags |= 0x40;
2145 adapter->kill_card = 0;
2146 }
2147#endif
2148 if (hcmd->paddrh == 0) {
2149 slic_write32(adapter, SLIC_REG_CBAR, (hcmd->paddrl |
2150 hcmd->cmdsize));
2151 } else {
2152 slic_write64(adapter, SLIC_REG_CBAR64,
2153 hcmd->paddrl | hcmd->cmdsize, hcmd->paddrh);
2154 }
2155xmit_done:
2156 return NETDEV_TX_OK;
2157xmit_fail:
2158 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2159 goto xmit_done;
2160}
2161
2162static void slic_adapter_freeresources(struct adapter *adapter)
2163{
2164 slic_init_cleanup(adapter);
2165 adapter->error_interrupts = 0;
2166 adapter->rcv_interrupts = 0;
2167 adapter->xmit_interrupts = 0;
2168 adapter->linkevent_interrupts = 0;
2169 adapter->upr_interrupts = 0;
2170 adapter->num_isrs = 0;
2171 adapter->xmit_completes = 0;
2172 adapter->rcv_broadcasts = 0;
2173 adapter->rcv_multicasts = 0;
2174 adapter->rcv_unicasts = 0;
2175}
2176
2177static int slic_adapter_allocresources(struct adapter *adapter,
2178 unsigned long *flags)
2179{
2180 if (!adapter->intrregistered) {
2181 int retval;
2182
2183 spin_unlock_irqrestore(&slic_global.driver_lock, *flags);
2184
2185 retval = request_irq(adapter->netdev->irq,
2186 &slic_interrupt,
2187 IRQF_SHARED,
2188 adapter->netdev->name, adapter->netdev);
2189
2190 spin_lock_irqsave(&slic_global.driver_lock, *flags);
2191
2192 if (retval) {
2193 dev_err(&adapter->netdev->dev,
2194 "request_irq (%s) FAILED [%x]\n",
2195 adapter->netdev->name, retval);
2196 return retval;
2197 }
2198 adapter->intrregistered = 1;
2199 }
2200 return 0;
2201}
2202
2203
2204
2205
2206
2207
2208
2209static int slic_if_init(struct adapter *adapter, unsigned long *flags)
2210{
2211 struct sliccard *card = adapter->card;
2212 struct net_device *dev = adapter->netdev;
2213 struct slic_shmemory *sm = &adapter->shmem;
2214 struct slic_shmem_data *sm_data = sm->shmem_data;
2215 int rc;
2216
2217
2218 if (adapter->state != ADAPT_DOWN) {
2219 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2220 __func__);
2221 rc = -EIO;
2222 goto err;
2223 }
2224
2225 adapter->devflags_prev = dev->flags;
2226 adapter->macopts = MAC_DIRECTED;
2227 if (dev->flags) {
2228 if (dev->flags & IFF_BROADCAST)
2229 adapter->macopts |= MAC_BCAST;
2230 if (dev->flags & IFF_PROMISC)
2231 adapter->macopts |= MAC_PROMISC;
2232 if (dev->flags & IFF_ALLMULTI)
2233 adapter->macopts |= MAC_ALLMCAST;
2234 if (dev->flags & IFF_MULTICAST)
2235 adapter->macopts |= MAC_MCAST;
2236 }
2237 rc = slic_adapter_allocresources(adapter, flags);
2238 if (rc) {
2239 dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
2240 rc);
2241 slic_adapter_freeresources(adapter);
2242 goto err;
2243 }
2244
2245 if (!adapter->queues_initialized) {
2246 rc = slic_rspqueue_init(adapter);
2247 if (rc)
2248 goto err;
2249 rc = slic_cmdq_init(adapter);
2250 if (rc)
2251 goto err;
2252 rc = slic_rcvqueue_init(adapter);
2253 if (rc)
2254 goto err;
2255 adapter->queues_initialized = 1;
2256 }
2257
2258 slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
2259 slic_flush_write(adapter);
2260 mdelay(1);
2261
2262 if (!adapter->isp_initialized) {
2263 unsigned long flags;
2264
2265 spin_lock_irqsave(&adapter->bit64reglock, flags);
2266 slic_write32(adapter, SLIC_REG_ADDR_UPPER,
2267 cpu_to_le32(upper_32_bits(sm->isr_phaddr)));
2268 slic_write32(adapter, SLIC_REG_ISP,
2269 cpu_to_le32(lower_32_bits(sm->isr_phaddr)));
2270 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2271
2272 adapter->isp_initialized = 1;
2273 }
2274
2275 adapter->state = ADAPT_UP;
2276 if (!card->loadtimerset) {
2277 setup_timer(&card->loadtimer, &slic_timer_load_check,
2278 (ulong)card);
2279 card->loadtimer.expires =
2280 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2281 add_timer(&card->loadtimer);
2282
2283 card->loadtimerset = 1;
2284 }
2285
2286 if (!adapter->pingtimerset) {
2287 setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
2288 adapter->pingtimer.expires =
2289 jiffies + (PING_TIMER_INTERVAL * HZ);
2290 add_timer(&adapter->pingtimer);
2291 adapter->pingtimerset = 1;
2292 adapter->card->pingstatus = ISR_PINGMASK;
2293 }
2294
2295
2296
2297
2298 sm_data->isr = 0;
2299 slic_write32(adapter, SLIC_REG_ISR, 0);
2300 slic_write32(adapter, SLIC_REG_ICR, ICR_INT_ON);
2301
2302 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2303 slic_flush_write(adapter);
2304
2305 rc = slic_link_event_handler(adapter);
2306 if (rc) {
2307
2308 slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
2309 slic_write32(adapter, SLIC_REG_ISR, 0);
2310 slic_flush_write(adapter);
2311
2312 if (adapter->pingtimerset) {
2313 del_timer(&adapter->pingtimer);
2314 adapter->pingtimerset = 0;
2315 }
2316 if (card->loadtimerset) {
2317 del_timer(&card->loadtimer);
2318 card->loadtimerset = 0;
2319 }
2320 adapter->state = ADAPT_DOWN;
2321 slic_adapter_freeresources(adapter);
2322 }
2323
2324err:
2325 return rc;
2326}
2327
2328static int slic_entry_open(struct net_device *dev)
2329{
2330 struct adapter *adapter = netdev_priv(dev);
2331 struct sliccard *card = adapter->card;
2332 unsigned long flags;
2333 int status;
2334
2335 netif_carrier_off(dev);
2336
2337 spin_lock_irqsave(&slic_global.driver_lock, flags);
2338 if (!adapter->activated) {
2339 card->adapters_activated++;
2340 slic_global.num_slic_ports_active++;
2341 adapter->activated = 1;
2342 }
2343 status = slic_if_init(adapter, &flags);
2344
2345 if (status != 0) {
2346 if (adapter->activated) {
2347 card->adapters_activated--;
2348 slic_global.num_slic_ports_active--;
2349 adapter->activated = 0;
2350 }
2351 goto spin_unlock;
2352 }
2353 if (!card->master)
2354 card->master = adapter;
2355
2356spin_unlock:
2357 spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2358
2359 netif_start_queue(adapter->netdev);
2360
2361 return status;
2362}
2363
2364static void slic_card_cleanup(struct sliccard *card)
2365{
2366 if (card->loadtimerset) {
2367 card->loadtimerset = 0;
2368 del_timer_sync(&card->loadtimer);
2369 }
2370
2371 kfree(card);
2372}
2373
2374static void slic_entry_remove(struct pci_dev *pcidev)
2375{
2376 struct net_device *dev = pci_get_drvdata(pcidev);
2377 struct adapter *adapter = netdev_priv(dev);
2378 struct sliccard *card;
2379 struct mcast_address *mcaddr, *mlist;
2380
2381 unregister_netdev(dev);
2382
2383 slic_adapter_freeresources(adapter);
2384 iounmap(adapter->regs);
2385
2386
2387 mlist = adapter->mcastaddrs;
2388 while (mlist) {
2389 mcaddr = mlist;
2390 mlist = mlist->next;
2391 kfree(mcaddr);
2392 }
2393 card = adapter->card;
2394 card->adapters_allocated--;
2395 adapter->allocated = 0;
2396 if (!card->adapters_allocated) {
2397 struct sliccard *curr_card = slic_global.slic_card;
2398
2399 if (curr_card == card) {
2400 slic_global.slic_card = card->next;
2401 } else {
2402 while (curr_card->next != card)
2403 curr_card = curr_card->next;
2404 curr_card->next = card->next;
2405 }
2406 slic_global.num_slic_cards--;
2407 slic_card_cleanup(card);
2408 }
2409 free_netdev(dev);
2410 pci_release_regions(pcidev);
2411 pci_disable_device(pcidev);
2412}
2413
2414static int slic_entry_halt(struct net_device *dev)
2415{
2416 struct adapter *adapter = netdev_priv(dev);
2417 struct sliccard *card = adapter->card;
2418 unsigned long flags;
2419
2420 spin_lock_irqsave(&slic_global.driver_lock, flags);
2421 netif_stop_queue(adapter->netdev);
2422 adapter->state = ADAPT_DOWN;
2423 adapter->linkstate = LINK_DOWN;
2424 adapter->upr_list = NULL;
2425 adapter->upr_busy = 0;
2426 adapter->devflags_prev = 0;
2427 slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
2428 adapter->all_reg_writes++;
2429 adapter->icr_reg_writes++;
2430 slic_config_clear(adapter);
2431 if (adapter->activated) {
2432 card->adapters_activated--;
2433 slic_global.num_slic_ports_active--;
2434 adapter->activated = 0;
2435 }
2436#ifdef AUTOMATIC_RESET
2437 slic_write32(adapter, SLIC_REG_RESET_IFACE, 0);
2438#endif
2439 slic_flush_write(adapter);
2440
2441
2442
2443
2444 slic_cmdq_reset(adapter);
2445
2446#ifdef AUTOMATIC_RESET
2447 if (!card->adapters_activated)
2448 slic_card_init(card, adapter);
2449#endif
2450
2451 spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2452
2453 netif_carrier_off(dev);
2454
2455 return 0;
2456}
2457
2458static struct net_device_stats *slic_get_stats(struct net_device *dev)
2459{
2460 struct adapter *adapter = netdev_priv(dev);
2461
2462 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
2463 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
2464 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
2465 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
2466 dev->stats.tx_heartbeat_errors = 0;
2467 dev->stats.tx_aborted_errors = 0;
2468 dev->stats.tx_window_errors = 0;
2469 dev->stats.tx_fifo_errors = 0;
2470 dev->stats.rx_frame_errors = 0;
2471 dev->stats.rx_length_errors = 0;
2472
2473 return &dev->stats;
2474}
2475
2476static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2477{
2478 struct adapter *adapter = netdev_priv(dev);
2479 struct ethtool_cmd edata;
2480 struct ethtool_cmd ecmd;
2481 u32 data[7];
2482 u32 intagg;
2483
2484 switch (cmd) {
2485 case SIOCSLICSETINTAGG:
2486 if (copy_from_user(data, rq->ifr_data, 28))
2487 return -EFAULT;
2488 intagg = data[0];
2489 dev_err(&dev->dev, "set interrupt aggregation to %d\n",
2490 intagg);
2491 slic_intagg_set(adapter, intagg);
2492 return 0;
2493
2494 case SIOCETHTOOL:
2495 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
2496 return -EFAULT;
2497
2498 if (ecmd.cmd == ETHTOOL_GSET) {
2499 memset(&edata, 0, sizeof(edata));
2500 edata.supported = (SUPPORTED_10baseT_Half |
2501 SUPPORTED_10baseT_Full |
2502 SUPPORTED_100baseT_Half |
2503 SUPPORTED_100baseT_Full |
2504 SUPPORTED_Autoneg | SUPPORTED_MII);
2505 edata.port = PORT_MII;
2506 edata.transceiver = XCVR_INTERNAL;
2507 edata.phy_address = 0;
2508 if (adapter->linkspeed == LINK_100MB)
2509 edata.speed = SPEED_100;
2510 else if (adapter->linkspeed == LINK_10MB)
2511 edata.speed = SPEED_10;
2512 else
2513 edata.speed = 0;
2514
2515 if (adapter->linkduplex == LINK_FULLD)
2516 edata.duplex = DUPLEX_FULL;
2517 else
2518 edata.duplex = DUPLEX_HALF;
2519
2520 edata.autoneg = AUTONEG_ENABLE;
2521 edata.maxtxpkt = 1;
2522 edata.maxrxpkt = 1;
2523 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
2524 return -EFAULT;
2525
2526 } else if (ecmd.cmd == ETHTOOL_SSET) {
2527 if (!capable(CAP_NET_ADMIN))
2528 return -EPERM;
2529
2530 if (adapter->linkspeed == LINK_100MB)
2531 edata.speed = SPEED_100;
2532 else if (adapter->linkspeed == LINK_10MB)
2533 edata.speed = SPEED_10;
2534 else
2535 edata.speed = 0;
2536
2537 if (adapter->linkduplex == LINK_FULLD)
2538 edata.duplex = DUPLEX_FULL;
2539 else
2540 edata.duplex = DUPLEX_HALF;
2541
2542 edata.autoneg = AUTONEG_ENABLE;
2543 edata.maxtxpkt = 1;
2544 edata.maxrxpkt = 1;
2545 if ((ecmd.speed != edata.speed) ||
2546 (ecmd.duplex != edata.duplex)) {
2547 u32 speed;
2548 u32 duplex;
2549
2550 if (ecmd.speed == SPEED_10)
2551 speed = 0;
2552 else
2553 speed = PCR_SPEED_100;
2554 if (ecmd.duplex == DUPLEX_FULL)
2555 duplex = PCR_DUPLEX_FULL;
2556 else
2557 duplex = 0;
2558 slic_link_config(adapter, speed, duplex);
2559 if (slic_link_event_handler(adapter))
2560 return -EFAULT;
2561 }
2562 }
2563 return 0;
2564 default:
2565 return -EOPNOTSUPP;
2566 }
2567}
2568
2569static void slic_config_pci(struct pci_dev *pcidev)
2570{
2571 u16 pci_command;
2572 u16 new_command;
2573
2574 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
2575
2576 new_command = pci_command | PCI_COMMAND_MASTER
2577 | PCI_COMMAND_MEMORY
2578 | PCI_COMMAND_INVALIDATE
2579 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
2580 if (pci_command != new_command)
2581 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
2582}
2583
2584static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2585{
2586 struct slic_shmemory *sm = &adapter->shmem;
2587 struct slic_shmem_data *sm_data = sm->shmem_data;
2588 struct slic_eeprom *peeprom;
2589 struct oslic_eeprom *pOeeprom;
2590 dma_addr_t phys_config;
2591 u32 phys_configh;
2592 u32 phys_configl;
2593 u32 i = 0;
2594 int status;
2595 uint macaddrs = card->card_size;
2596 ushort eecodesize;
2597 ushort dramsize;
2598 ushort ee_chksum;
2599 ushort calc_chksum;
2600 struct slic_config_mac *pmac;
2601 unsigned char fruformat;
2602 unsigned char oemfruformat;
2603 struct atk_fru *patkfru;
2604 union oemfru *poemfru;
2605 unsigned long flags;
2606
2607
2608 slic_soft_reset(adapter);
2609
2610
2611 status = slic_card_download(adapter);
2612 if (status)
2613 return status;
2614
2615 if (!card->config_set) {
2616 peeprom = pci_alloc_consistent(adapter->pcidev,
2617 sizeof(struct slic_eeprom),
2618 &phys_config);
2619
2620 if (!peeprom) {
2621 dev_err(&adapter->pcidev->dev,
2622 "Failed to allocate DMA memory for EEPROM.\n");
2623 return -ENOMEM;
2624 }
2625
2626 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2627 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2628
2629 memset(peeprom, 0, sizeof(struct slic_eeprom));
2630
2631 slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
2632 slic_flush_write(adapter);
2633 mdelay(1);
2634
2635 spin_lock_irqsave(&adapter->bit64reglock, flags);
2636 slic_write32(adapter, SLIC_REG_ADDR_UPPER,
2637 cpu_to_le32(upper_32_bits(sm->isr_phaddr)));
2638 slic_write32(adapter, SLIC_REG_ISP,
2639 cpu_to_le32(lower_32_bits(sm->isr_phaddr)));
2640 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2641
2642 status = slic_config_get(adapter, phys_configl, phys_configh);
2643 if (status) {
2644 dev_err(&adapter->pcidev->dev,
2645 "Failed to fetch config data from device.\n");
2646 goto card_init_err;
2647 }
2648
2649 for (;;) {
2650 if (sm_data->isr) {
2651 if (sm_data->isr & ISR_UPC) {
2652 sm_data->isr = 0;
2653 slic_write64(adapter, SLIC_REG_ISP, 0,
2654 0);
2655 slic_write32(adapter, SLIC_REG_ISR, 0);
2656 slic_flush_write(adapter);
2657
2658 slic_upr_request_complete(adapter, 0);
2659 break;
2660 }
2661
2662 sm_data->isr = 0;
2663 slic_write32(adapter, SLIC_REG_ISR, 0);
2664 slic_flush_write(adapter);
2665 } else {
2666 mdelay(1);
2667 i++;
2668 if (i > 5000) {
2669 dev_err(&adapter->pcidev->dev,
2670 "Fetch of config data timed out.\n");
2671 slic_write64(adapter, SLIC_REG_ISP,
2672 0, 0);
2673 slic_flush_write(adapter);
2674
2675 status = -EINVAL;
2676 goto card_init_err;
2677 }
2678 }
2679 }
2680
2681 switch (adapter->devid) {
2682
2683 case SLIC_2GB_DEVICE_ID:
2684
2685 pOeeprom = (struct oslic_eeprom *)peeprom;
2686 eecodesize = pOeeprom->EecodeSize;
2687 dramsize = pOeeprom->DramSize;
2688 pmac = pOeeprom->MacInfo;
2689 fruformat = pOeeprom->FruFormat;
2690 patkfru = &pOeeprom->AtkFru;
2691 oemfruformat = pOeeprom->OemFruFormat;
2692 poemfru = &pOeeprom->OemFru;
2693 macaddrs = 2;
2694
2695
2696
2697
2698
2699
2700 break;
2701 default:
2702
2703 eecodesize = peeprom->EecodeSize;
2704 dramsize = peeprom->DramSize;
2705 pmac = peeprom->u2.mac.MacInfo;
2706 fruformat = peeprom->FruFormat;
2707 patkfru = &peeprom->AtkFru;
2708 oemfruformat = peeprom->OemFruFormat;
2709 poemfru = &peeprom->OemFru;
2710 break;
2711 }
2712
2713 card->config.EepromValid = false;
2714
2715
2716 if ((eecodesize <= MAX_EECODE_SIZE) &&
2717 (eecodesize >= MIN_EECODE_SIZE)) {
2718 ee_chksum =
2719 *(u16 *)((char *)peeprom + (eecodesize - 2));
2720
2721
2722
2723 calc_chksum = slic_eeprom_cksum(peeprom,
2724 eecodesize - 2);
2725
2726
2727
2728
2729 if (ee_chksum == calc_chksum)
2730 card->config.EepromValid = true;
2731 }
2732
2733 card->config.DramSize = dramsize;
2734
2735
2736 for (i = 0; i < macaddrs; i++) {
2737 memcpy(&card->config.MacInfo[i],
2738 &pmac[i], sizeof(struct slic_config_mac));
2739 }
2740
2741
2742 card->config.FruFormat = fruformat;
2743 memcpy(&card->config.AtkFru, patkfru,
2744 sizeof(struct atk_fru));
2745
2746 pci_free_consistent(adapter->pcidev,
2747 sizeof(struct slic_eeprom),
2748 peeprom, phys_config);
2749
2750 if (!card->config.EepromValid) {
2751 slic_write64(adapter, SLIC_REG_ISP, 0, 0);
2752 slic_flush_write(adapter);
2753 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
2754 return -EINVAL;
2755 }
2756
2757 card->config_set = 1;
2758 }
2759
2760 status = slic_card_download_gbrcv(adapter);
2761 if (status)
2762 return status;
2763
2764 if (slic_global.dynamic_intagg)
2765 slic_intagg_set(adapter, 0);
2766 else
2767 slic_intagg_set(adapter, adapter->intagg_delay);
2768
2769
2770
2771
2772 card->pingstatus = ISR_PINGMASK;
2773
2774
2775
2776
2777 card->state = CARD_UP;
2778 card->reset_in_progress = 0;
2779
2780 return 0;
2781
2782card_init_err:
2783 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
2784 peeprom, phys_config);
2785 return status;
2786}
2787
2788static int slic_get_coalesce(struct net_device *dev,
2789 struct ethtool_coalesce *coalesce)
2790{
2791 struct adapter *adapter = netdev_priv(dev);
2792
2793 adapter->intagg_delay = coalesce->rx_coalesce_usecs;
2794 adapter->dynamic_intagg = coalesce->use_adaptive_rx_coalesce;
2795 return 0;
2796}
2797
2798static int slic_set_coalesce(struct net_device *dev,
2799 struct ethtool_coalesce *coalesce)
2800{
2801 struct adapter *adapter = netdev_priv(dev);
2802
2803 coalesce->rx_coalesce_usecs = adapter->intagg_delay;
2804 coalesce->use_adaptive_rx_coalesce = adapter->dynamic_intagg;
2805 return 0;
2806}
2807
2808static void slic_init_driver(void)
2809{
2810 if (slic_first_init) {
2811 slic_first_init = 0;
2812 spin_lock_init(&slic_global.driver_lock);
2813 }
2814}
2815
2816static int slic_init_adapter(struct net_device *netdev,
2817 struct pci_dev *pcidev,
2818 const struct pci_device_id *pci_tbl_entry,
2819 void __iomem *memaddr, int chip_idx)
2820{
2821 ushort index;
2822 struct slic_handle *pslic_handle;
2823 struct adapter *adapter = netdev_priv(netdev);
2824 struct slic_shmemory *sm = &adapter->shmem;
2825 struct slic_shmem_data *sm_data;
2826 dma_addr_t phaddr;
2827
2828
2829 adapter->vendid = pci_tbl_entry->vendor;
2830 adapter->devid = pci_tbl_entry->device;
2831 adapter->subsysid = pci_tbl_entry->subdevice;
2832 adapter->busnumber = pcidev->bus->number;
2833 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
2834 adapter->functionnumber = (pcidev->devfn & 0x7);
2835 adapter->regs = memaddr;
2836 adapter->irq = pcidev->irq;
2837 adapter->chipid = chip_idx;
2838 adapter->port = 0;
2839 adapter->cardindex = adapter->port;
2840 spin_lock_init(&adapter->upr_lock);
2841 spin_lock_init(&adapter->bit64reglock);
2842 spin_lock_init(&adapter->adapter_lock);
2843 spin_lock_init(&adapter->reset_lock);
2844 spin_lock_init(&adapter->handle_lock);
2845
2846 adapter->card_size = 1;
2847
2848
2849
2850
2851
2852
2853 for (index = 1, pslic_handle = &adapter->slic_handles[1];
2854 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
2855 pslic_handle->token.handle_index = index;
2856 pslic_handle->type = SLIC_HANDLE_FREE;
2857 pslic_handle->next = adapter->pfree_slic_handles;
2858 adapter->pfree_slic_handles = pslic_handle;
2859 }
2860 sm_data = pci_zalloc_consistent(adapter->pcidev, sizeof(*sm_data),
2861 &phaddr);
2862 if (!sm_data)
2863 return -ENOMEM;
2864
2865 sm->shmem_data = sm_data;
2866 sm->isr_phaddr = phaddr;
2867 sm->lnkstatus_phaddr = phaddr + offsetof(struct slic_shmem_data,
2868 lnkstatus);
2869 sm->stats_phaddr = phaddr + offsetof(struct slic_shmem_data, stats);
2870
2871 return 0;
2872}
2873
2874static const struct net_device_ops slic_netdev_ops = {
2875 .ndo_open = slic_entry_open,
2876 .ndo_stop = slic_entry_halt,
2877 .ndo_start_xmit = slic_xmit_start,
2878 .ndo_do_ioctl = slic_ioctl,
2879 .ndo_set_mac_address = slic_mac_set_address,
2880 .ndo_get_stats = slic_get_stats,
2881 .ndo_set_rx_mode = slic_mcast_set_list,
2882 .ndo_validate_addr = eth_validate_addr,
2883 .ndo_change_mtu = eth_change_mtu,
2884};
2885
2886static u32 slic_card_locate(struct adapter *adapter)
2887{
2888 struct sliccard *card = slic_global.slic_card;
2889 struct physcard *physcard = slic_global.phys_card;
2890 ushort card_hostid;
2891 uint i;
2892
2893 card_hostid = slic_read32(adapter, SLIC_REG_HOSTID);
2894
2895
2896 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2897 card = kzalloc(sizeof(*card), GFP_KERNEL);
2898 if (!card)
2899 return -ENOMEM;
2900
2901 card->next = slic_global.slic_card;
2902 slic_global.slic_card = card;
2903 card->busnumber = adapter->busnumber;
2904 card->slotnumber = adapter->slotnumber;
2905
2906
2907 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2908 if (slic_global.cardnuminuse[i] == 0) {
2909 slic_global.cardnuminuse[i] = 1;
2910 card->cardnum = i;
2911 break;
2912 }
2913 }
2914 slic_global.num_slic_cards++;
2915 } else {
2916
2917 while (card) {
2918 if (card->cardnum == card_hostid)
2919 break;
2920 card = card->next;
2921 }
2922 }
2923
2924 if (!card)
2925 return -ENXIO;
2926
2927 if (!card->adapter[adapter->port]) {
2928 card->adapter[adapter->port] = adapter;
2929 adapter->card = card;
2930 }
2931
2932 card->card_size = 1;
2933
2934 while (physcard) {
2935 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2936 if (physcard->adapter[i])
2937 break;
2938 }
2939 if (i == SLIC_MAX_PORTS)
2940 break;
2941
2942 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2943 break;
2944 physcard = physcard->next;
2945 }
2946 if (!physcard) {
2947
2948 physcard = kzalloc(sizeof(*physcard), GFP_ATOMIC);
2949 if (!physcard) {
2950 if (card_hostid == SLIC_HOSTID_DEFAULT)
2951 kfree(card);
2952 return -ENOMEM;
2953 }
2954
2955 physcard->next = slic_global.phys_card;
2956 slic_global.phys_card = physcard;
2957 physcard->adapters_allocd = 1;
2958 } else {
2959 physcard->adapters_allocd++;
2960 }
2961
2962 adapter->physport = physcard->adapters_allocd - 1;
2963
2964 physcard->adapter[adapter->physport] = adapter;
2965 adapter->physcard = physcard;
2966
2967 return 0;
2968}
2969
2970static int slic_entry_probe(struct pci_dev *pcidev,
2971 const struct pci_device_id *pci_tbl_entry)
2972{
2973 static int cards_found;
2974 static int did_version;
2975 int err = -ENODEV;
2976 struct net_device *netdev;
2977 struct adapter *adapter;
2978 void __iomem *memmapped_ioaddr = NULL;
2979 ulong mmio_start = 0;
2980 ulong mmio_len = 0;
2981 struct sliccard *card = NULL;
2982 int pci_using_dac = 0;
2983
2984 err = pci_enable_device(pcidev);
2985
2986 if (err)
2987 return err;
2988
2989 if (did_version++ == 0) {
2990 dev_info(&pcidev->dev, "%s\n", slic_banner);
2991 dev_info(&pcidev->dev, "%s\n", slic_proc_version);
2992 }
2993
2994 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
2995 pci_using_dac = 1;
2996 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
2997 if (err) {
2998 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
2999 goto err_out_disable_pci;
3000 }
3001 } else {
3002 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3003 if (err) {
3004 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3005 goto err_out_disable_pci;
3006 }
3007 pci_using_dac = 0;
3008 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3009 }
3010
3011 err = pci_request_regions(pcidev, DRV_NAME);
3012 if (err) {
3013 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3014 goto err_out_disable_pci;
3015 }
3016
3017 pci_set_master(pcidev);
3018
3019 netdev = alloc_etherdev(sizeof(struct adapter));
3020 if (!netdev) {
3021 err = -ENOMEM;
3022 goto err_out_exit_slic_probe;
3023 }
3024
3025 netdev->ethtool_ops = &slic_ethtool_ops;
3026 SET_NETDEV_DEV(netdev, &pcidev->dev);
3027
3028 pci_set_drvdata(pcidev, netdev);
3029 adapter = netdev_priv(netdev);
3030 adapter->netdev = netdev;
3031 adapter->pcidev = pcidev;
3032 slic_global.dynamic_intagg = adapter->dynamic_intagg;
3033 if (pci_using_dac)
3034 netdev->features |= NETIF_F_HIGHDMA;
3035
3036 mmio_start = pci_resource_start(pcidev, 0);
3037 mmio_len = pci_resource_len(pcidev, 0);
3038
3039 memmapped_ioaddr = ioremap_nocache(mmio_start, mmio_len);
3040 if (!memmapped_ioaddr) {
3041 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3042 mmio_len, mmio_start);
3043 err = -ENOMEM;
3044 goto err_out_free_netdev;
3045 }
3046
3047 slic_config_pci(pcidev);
3048
3049 slic_init_driver();
3050
3051 err = slic_init_adapter(netdev, pcidev, pci_tbl_entry, memmapped_ioaddr,
3052 cards_found);
3053 if (err) {
3054 dev_err(&pcidev->dev, "failed to init adapter: %i\n", err);
3055 goto err_out_unmap;
3056 }
3057
3058 err = slic_card_locate(adapter);
3059 if (err) {
3060 dev_err(&pcidev->dev, "cannot locate card\n");
3061 goto err_clean_init;
3062 }
3063
3064 card = adapter->card;
3065
3066 if (!adapter->allocated) {
3067 card->adapters_allocated++;
3068 adapter->allocated = 1;
3069 }
3070
3071 err = slic_card_init(card, adapter);
3072 if (err)
3073 goto err_clean_init;
3074
3075 slic_adapter_set_hwaddr(adapter);
3076
3077 netdev->base_addr = (unsigned long)memmapped_ioaddr;
3078 netdev->irq = adapter->irq;
3079 netdev->netdev_ops = &slic_netdev_ops;
3080
3081 netif_carrier_off(netdev);
3082
3083 strcpy(netdev->name, "eth%d");
3084 err = register_netdev(netdev);
3085 if (err) {
3086 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3087 goto err_clean_init;
3088 }
3089
3090 cards_found++;
3091
3092 return 0;
3093
3094err_clean_init:
3095 slic_init_cleanup(adapter);
3096err_out_unmap:
3097 iounmap(memmapped_ioaddr);
3098err_out_free_netdev:
3099 free_netdev(netdev);
3100err_out_exit_slic_probe:
3101 pci_release_regions(pcidev);
3102err_out_disable_pci:
3103 pci_disable_device(pcidev);
3104 return err;
3105}
3106
3107static struct pci_driver slic_driver = {
3108 .name = DRV_NAME,
3109 .id_table = slic_pci_tbl,
3110 .probe = slic_entry_probe,
3111 .remove = slic_entry_remove,
3112};
3113
3114static int __init slic_module_init(void)
3115{
3116 slic_init_driver();
3117
3118 return pci_register_driver(&slic_driver);
3119}
3120
3121static void __exit slic_module_cleanup(void)
3122{
3123 pci_unregister_driver(&slic_driver);
3124}
3125
3126static const struct ethtool_ops slic_ethtool_ops = {
3127 .get_coalesce = slic_get_coalesce,
3128 .set_coalesce = slic_set_coalesce
3129};
3130
3131module_init(slic_module_init);
3132module_exit(slic_module_cleanup);
3133
