1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17#ifndef __ASM_BITOPS_H
18#define __ASM_BITOPS_H
19
20#include <asm/cpu-regs.h>
21#include <asm/barrier.h>
22
23
24
25
26#define __set_bit(nr, addr) \
27({ \
28 volatile unsigned char *_a = (unsigned char *)(addr); \
29 const unsigned shift = (nr) & 7; \
30 _a += (nr) >> 3; \
31 \
32 asm volatile("bset %2,(%1) # set_bit reg" \
33 : "=m"(*_a) \
34 : "a"(_a), "d"(1 << shift), "m"(*_a) \
35 : "memory", "cc"); \
36})
37
38#define set_bit(nr, addr) __set_bit((nr), (addr))
39
40
41
42
43#define ___clear_bit(nr, addr) \
44({ \
45 volatile unsigned char *_a = (unsigned char *)(addr); \
46 const unsigned shift = (nr) & 7; \
47 _a += (nr) >> 3; \
48 \
49 asm volatile("bclr %2,(%1) # clear_bit reg" \
50 : "=m"(*_a) \
51 : "a"(_a), "d"(1 << shift), "m"(*_a) \
52 : "memory", "cc"); \
53})
54
55#define clear_bit(nr, addr) ___clear_bit((nr), (addr))
56
57
58static inline void __clear_bit(unsigned long nr, volatile void *addr)
59{
60 unsigned int *a = (unsigned int *) addr;
61 int mask;
62
63 a += nr >> 5;
64 mask = 1 << (nr & 0x1f);
65 *a &= ~mask;
66}
67
68
69
70
71static inline int test_bit(unsigned long nr, const volatile void *addr)
72{
73 return 1UL & (((const volatile unsigned int *) addr)[nr >> 5] >> (nr & 31));
74}
75
76
77
78
79static inline void __change_bit(unsigned long nr, volatile void *addr)
80{
81 int mask;
82 unsigned int *a = (unsigned int *) addr;
83
84 a += nr >> 5;
85 mask = 1 << (nr & 0x1f);
86 *a ^= mask;
87}
88
89extern void change_bit(unsigned long nr, volatile void *addr);
90
91
92
93
94#define __test_and_set_bit(nr,addr) \
95({ \
96 volatile unsigned char *_a = (unsigned char *)(addr); \
97 const unsigned shift = (nr) & 7; \
98 unsigned epsw; \
99 _a += (nr) >> 3; \
100 \
101 asm volatile("bset %3,(%2) # test_set_bit reg\n" \
102 "mov epsw,%1" \
103 : "=m"(*_a), "=d"(epsw) \
104 : "a"(_a), "d"(1 << shift), "m"(*_a) \
105 : "memory", "cc"); \
106 \
107 !(epsw & EPSW_FLAG_Z); \
108})
109
110#define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
111
112
113
114
115#define __test_and_clear_bit(nr, addr) \
116({ \
117 volatile unsigned char *_a = (unsigned char *)(addr); \
118 const unsigned shift = (nr) & 7; \
119 unsigned epsw; \
120 _a += (nr) >> 3; \
121 \
122 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
123 "mov epsw,%1" \
124 : "=m"(*_a), "=d"(epsw) \
125 : "a"(_a), "d"(1 << shift), "m"(*_a) \
126 : "memory", "cc"); \
127 \
128 !(epsw & EPSW_FLAG_Z); \
129})
130
131#define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
132
133
134
135
136static inline int __test_and_change_bit(unsigned long nr, volatile void *addr)
137{
138 int mask, retval;
139 unsigned int *a = (unsigned int *)addr;
140
141 a += nr >> 5;
142 mask = 1 << (nr & 0x1f);
143 retval = (mask & *a) != 0;
144 *a ^= mask;
145
146 return retval;
147}
148
149extern int test_and_change_bit(unsigned long nr, volatile void *addr);
150
151#include <asm-generic/bitops/lock.h>
152
153#ifdef __KERNEL__
154
155
156
157
158
159
160
161
162static inline __attribute__((const))
163unsigned long __ffs(unsigned long x)
164{
165 int bit;
166 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc");
167 return bit;
168}
169
170
171
172
173
174static inline __attribute__((const))
175int __ilog2_u32(u32 n)
176{
177 int bit;
178 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc");
179 return bit;
180}
181
182
183
184
185
186
187
188
189
190static inline __attribute__((const))
191int fls(int x)
192{
193 return (x != 0) ? __ilog2_u32(x) + 1 : 0;
194}
195
196
197
198
199
200
201
202static inline unsigned long __fls(unsigned long word)
203{
204 return __ilog2_u32(word);
205}
206
207
208
209
210
211
212
213
214static inline __attribute__((const))
215int ffs(int x)
216{
217
218
219
220 return fls(x & -x);
221}
222
223#include <asm-generic/bitops/ffz.h>
224#include <asm-generic/bitops/fls64.h>
225#include <asm-generic/bitops/find.h>
226#include <asm-generic/bitops/sched.h>
227#include <asm-generic/bitops/hweight.h>
228#include <asm-generic/bitops/ext2-atomic-setbit.h>
229#include <asm-generic/bitops/le.h>
230
231#endif
232#endif
233