LXR linux/arch/tile/include/gxio/uart.h

   1/*
   2 * Copyright 2013 Tilera Corporation. All Rights Reserved.
   3 *
   4 *   This program is free software; you can redistribute it and/or
   5 *   modify it under the terms of the GNU General Public License
   6 *   as published by the Free Software Foundation, version 2.
   7 *
   8 *   This program is distributed in the hope that it will be useful, but
   9 *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11 *   NON INFRINGEMENT.  See the GNU General Public License for
  12 *   more details.
  13 */
  14
  15#ifndef _GXIO_UART_H_
  16#define _GXIO_UART_H_
  17
  18#include "common.h"
  19
  20#include <hv/drv_uart_intf.h>
  21#include <hv/iorpc.h>
  22
  23/*
  24 *
  25 * An API for manipulating UART interface.
  26 */
  27
  28/*
  29 *
  30 * The Rshim allows access to the processor's UART interface.
  31 */
  32
  33/* A context object used to manage UART resources. */
  34typedef struct {
  35
  36        /* File descriptor for calling up to the hypervisor. */
  37        int fd;
  38
  39        /* The VA at which our MMIO registers are mapped. */
  40        char *mmio_base;
  41
  42} gxio_uart_context_t;
  43
  44/* Request UART interrupts.
  45 *
  46 *  Request that interrupts be delivered to a tile when the UART's
  47 *  Receive FIFO is written, or the Write FIFO is read.
  48 *
  49 * @param context Pointer to a properly initialized gxio_uart_context_t.
  50 * @param bind_cpu_x X coordinate of CPU to which interrupt will be delivered.
  51 * @param bind_cpu_y Y coordinate of CPU to which interrupt will be delivered.
  52 * @param bind_interrupt IPI interrupt number.
  53 * @param bind_event Sub-interrupt event bit number; a negative value can
  54 *  disable the interrupt.
  55 * @return Zero if all of the requested UART events were successfully
  56 *  configured to interrupt.
  57 */
  58extern int gxio_uart_cfg_interrupt(gxio_uart_context_t *context,
  59                                   int bind_cpu_x,
  60                                   int bind_cpu_y,
  61                                   int bind_interrupt, int bind_event);
  62
  63/* Initialize a UART context.
  64 *
  65 *  A properly initialized context must be obtained before any of the other
  66 *  gxio_uart routines may be used.
  67 *
  68 * @param context Pointer to a gxio_uart_context_t, which will be initialized
  69 *  by this routine, if it succeeds.
  70 * @param uart_index Index of the UART to use.
  71 * @return Zero if the context was successfully initialized, else a
  72 *  GXIO_ERR_xxx error code.
  73 */
  74extern int gxio_uart_init(gxio_uart_context_t *context, int uart_index);
  75
  76/* Destroy a UART context.
  77 *
  78 *  Once destroyed, a context may not be used with any gxio_uart routines
  79 *  other than gxio_uart_init().  After this routine returns, no further
  80 *  interrupts requested on this context will be delivered.  The state and
  81 *  configuration of the pins which had been attached to this context are
  82 *  unchanged by this operation.
  83 *
  84 * @param context Pointer to a gxio_uart_context_t.
  85 * @return Zero if the context was successfully destroyed, else a
  86 *  GXIO_ERR_xxx error code.
  87 */
  88extern int gxio_uart_destroy(gxio_uart_context_t *context);
  89
  90/* Write UART register.
  91 * @param context Pointer to a gxio_uart_context_t.
  92 * @param offset UART register offset.
  93 * @param word Data will be wrote to UART reigister.
  94 */
  95extern void gxio_uart_write(gxio_uart_context_t *context, uint64_t offset,
  96                            uint64_t word);
  97
  98/* Read UART register.
  99 * @param context Pointer to a gxio_uart_context_t.
 100 * @param offset UART register offset.
 101 * @return Data read from UART register.
 102 */
 103extern uint64_t gxio_uart_read(gxio_uart_context_t *context, uint64_t offset);
 104
 105#endif /* _GXIO_UART_H_ */
 106