1
2#ifndef _ASM_X86_MSHYPER_H
3#define _ASM_X86_MSHYPER_H
4
5#include <linux/types.h>
6#include <linux/atomic.h>
7#include <linux/nmi.h>
8#include <asm/io.h>
9#include <asm/hyperv.h>
10
11
12
13
14
15enum hv_cpuid_function {
16 HVCPUID_VERSION_FEATURES = 0x00000001,
17 HVCPUID_VENDOR_MAXFUNCTION = 0x40000000,
18 HVCPUID_INTERFACE = 0x40000001,
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20
21
22
23
24 HVCPUID_VERSION = 0x40000002,
25 HVCPUID_FEATURES = 0x40000003,
26 HVCPUID_ENLIGHTENMENT_INFO = 0x40000004,
27 HVCPUID_IMPLEMENTATION_LIMITS = 0x40000005,
28};
29
30struct ms_hyperv_info {
31 u32 features;
32 u32 misc_features;
33 u32 hints;
34 u32 max_vp_index;
35 u32 max_lp_index;
36};
37
38extern struct ms_hyperv_info ms_hyperv;
39
40
41
42
43union hv_x64_msr_hypercall_contents {
44 u64 as_uint64;
45 struct {
46 u64 enable:1;
47 u64 reserved:11;
48 u64 guest_physical_address:52;
49 };
50};
51
52
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54
55
56struct ms_hyperv_tsc_page {
57 volatile u32 tsc_sequence;
58 u32 reserved1;
59 volatile u64 tsc_scale;
60 volatile s64 tsc_offset;
61 u64 reserved2[509];
62};
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87
88#define HV_LINUX_VENDOR_ID 0x8100
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92
93
94static inline __u64 generate_guest_id(__u64 d_info1, __u64 kernel_version,
95 __u64 d_info2)
96{
97 __u64 guest_id = 0;
98
99 guest_id = (((__u64)HV_LINUX_VENDOR_ID) << 48);
100 guest_id |= (d_info1 << 48);
101 guest_id |= (kernel_version << 16);
102 guest_id |= d_info2;
103
104 return guest_id;
105}
106
107
108
109static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
110{
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120
121 if (cmpxchg(&msg->header.message_type, old_msg_type,
122 HVMSG_NONE) != old_msg_type)
123 return;
124
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130
131
132 mb();
133
134 if (msg->header.message_flags.msg_pending) {
135
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139
140 wrmsrl(HV_X64_MSR_EOM, 0);
141 }
142}
143
144#define hv_init_timer(timer, tick) wrmsrl(timer, tick)
145#define hv_init_timer_config(config, val) wrmsrl(config, val)
146
147#define hv_get_simp(val) rdmsrl(HV_X64_MSR_SIMP, val)
148#define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val)
149
150#define hv_get_siefp(val) rdmsrl(HV_X64_MSR_SIEFP, val)
151#define hv_set_siefp(val) wrmsrl(HV_X64_MSR_SIEFP, val)
152
153#define hv_get_synic_state(val) rdmsrl(HV_X64_MSR_SCONTROL, val)
154#define hv_set_synic_state(val) wrmsrl(HV_X64_MSR_SCONTROL, val)
155
156#define hv_get_vp_index(index) rdmsrl(HV_X64_MSR_VP_INDEX, index)
157
158#define hv_get_synint_state(int_num, val) rdmsrl(int_num, val)
159#define hv_set_synint_state(int_num, val) wrmsrl(int_num, val)
160
161void hyperv_callback_vector(void);
162#ifdef CONFIG_TRACING
163#define trace_hyperv_callback_vector hyperv_callback_vector
164#endif
165void hyperv_vector_handler(struct pt_regs *regs);
166void hv_setup_vmbus_irq(void (*handler)(void));
167void hv_remove_vmbus_irq(void);
168
169void hv_setup_kexec_handler(void (*handler)(void));
170void hv_remove_kexec_handler(void);
171void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs));
172void hv_remove_crash_handler(void);
173
174#if IS_ENABLED(CONFIG_HYPERV)
175extern struct clocksource *hyperv_cs;
176extern void *hv_hypercall_pg;
177
178static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
179{
180 u64 input_address = input ? virt_to_phys(input) : 0;
181 u64 output_address = output ? virt_to_phys(output) : 0;
182 u64 hv_status;
183
184#ifdef CONFIG_X86_64
185 if (!hv_hypercall_pg)
186 return U64_MAX;
187
188 __asm__ __volatile__("mov %4, %%r8\n"
189 "call *%5"
190 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
191 "+c" (control), "+d" (input_address)
192 : "r" (output_address), "m" (hv_hypercall_pg)
193 : "cc", "memory", "r8", "r9", "r10", "r11");
194#else
195 u32 input_address_hi = upper_32_bits(input_address);
196 u32 input_address_lo = lower_32_bits(input_address);
197 u32 output_address_hi = upper_32_bits(output_address);
198 u32 output_address_lo = lower_32_bits(output_address);
199
200 if (!hv_hypercall_pg)
201 return U64_MAX;
202
203 __asm__ __volatile__("call *%7"
204 : "=A" (hv_status),
205 "+c" (input_address_lo), ASM_CALL_CONSTRAINT
206 : "A" (control),
207 "b" (input_address_hi),
208 "D"(output_address_hi), "S"(output_address_lo),
209 "m" (hv_hypercall_pg)
210 : "cc", "memory");
211#endif
212 return hv_status;
213}
214
215#define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
216#define HV_HYPERCALL_FAST_BIT BIT(16)
217#define HV_HYPERCALL_VARHEAD_OFFSET 17
218#define HV_HYPERCALL_REP_COMP_OFFSET 32
219#define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
220#define HV_HYPERCALL_REP_START_OFFSET 48
221#define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48)
222
223
224static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
225{
226 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
227
228#ifdef CONFIG_X86_64
229 {
230 __asm__ __volatile__("call *%4"
231 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
232 "+c" (control), "+d" (input1)
233 : "m" (hv_hypercall_pg)
234 : "cc", "r8", "r9", "r10", "r11");
235 }
236#else
237 {
238 u32 input1_hi = upper_32_bits(input1);
239 u32 input1_lo = lower_32_bits(input1);
240
241 __asm__ __volatile__ ("call *%5"
242 : "=A"(hv_status),
243 "+c"(input1_lo),
244 ASM_CALL_CONSTRAINT
245 : "A" (control),
246 "b" (input1_hi),
247 "m" (hv_hypercall_pg)
248 : "cc", "edi", "esi");
249 }
250#endif
251 return hv_status;
252}
253
254
255
256
257
258static inline u64 hv_do_rep_hypercall(u16 code, u16 rep_count, u16 varhead_size,
259 void *input, void *output)
260{
261 u64 control = code;
262 u64 status;
263 u16 rep_comp;
264
265 control |= (u64)varhead_size << HV_HYPERCALL_VARHEAD_OFFSET;
266 control |= (u64)rep_count << HV_HYPERCALL_REP_COMP_OFFSET;
267
268 do {
269 status = hv_do_hypercall(control, input, output);
270 if ((status & HV_HYPERCALL_RESULT_MASK) != HV_STATUS_SUCCESS)
271 return status;
272
273
274 rep_comp = (status & HV_HYPERCALL_REP_COMP_MASK) >>
275 HV_HYPERCALL_REP_COMP_OFFSET;
276
277 control &= ~HV_HYPERCALL_REP_START_MASK;
278 control |= (u64)rep_comp << HV_HYPERCALL_REP_START_OFFSET;
279
280 touch_nmi_watchdog();
281 } while (rep_comp < rep_count);
282
283 return status;
284}
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291
292extern u32 *hv_vp_index;
293extern u32 hv_max_vp_index;
294
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305
306static inline int hv_cpu_number_to_vp_number(int cpu_number)
307{
308 return hv_vp_index[cpu_number];
309}
310
311void hyperv_init(void);
312void hyperv_setup_mmu_ops(void);
313void hyper_alloc_mmu(void);
314void hyperv_report_panic(struct pt_regs *regs);
315bool hv_is_hypercall_page_setup(void);
316void hyperv_cleanup(void);
317#else
318static inline void hyperv_init(void) {}
319static inline bool hv_is_hypercall_page_setup(void) { return false; }
320static inline void hyperv_cleanup(void) {}
321static inline void hyperv_setup_mmu_ops(void) {}
322#endif
323
324#ifdef CONFIG_HYPERV_TSCPAGE
325struct ms_hyperv_tsc_page *hv_get_tsc_page(void);
326static inline u64 hv_read_tsc_page(const struct ms_hyperv_tsc_page *tsc_pg)
327{
328 u64 scale, offset, cur_tsc;
329 u32 sequence;
330
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344
345
346
347 do {
348 sequence = READ_ONCE(tsc_pg->tsc_sequence);
349 if (!sequence)
350 return U64_MAX;
351
352
353
354
355 smp_rmb();
356
357 scale = READ_ONCE(tsc_pg->tsc_scale);
358 offset = READ_ONCE(tsc_pg->tsc_offset);
359 cur_tsc = rdtsc_ordered();
360
361
362
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364
365 smp_rmb();
366
367 } while (READ_ONCE(tsc_pg->tsc_sequence) != sequence);
368
369 return mul_u64_u64_shr(cur_tsc, scale, 64) + offset;
370}
371
372#else
373static inline struct ms_hyperv_tsc_page *hv_get_tsc_page(void)
374{
375 return NULL;
376}
377#endif
378#endif
379