1#ifndef _ASM_X86_UV_BIOS_H
2#define _ASM_X86_UV_BIOS_H
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25#include <linux/rtc.h>
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31
32enum uv_bios_cmd {
33 UV_BIOS_COMMON,
34 UV_BIOS_GET_SN_INFO,
35 UV_BIOS_FREQ_BASE,
36 UV_BIOS_WATCHLIST_ALLOC,
37 UV_BIOS_WATCHLIST_FREE,
38 UV_BIOS_MEMPROTECT,
39 UV_BIOS_GET_PARTITION_ADDR,
40 UV_BIOS_SET_LEGACY_VGA_TARGET
41};
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45
46enum {
47 BIOS_STATUS_MORE_PASSES = 1,
48 BIOS_STATUS_SUCCESS = 0,
49 BIOS_STATUS_UNIMPLEMENTED = -ENOSYS,
50 BIOS_STATUS_EINVAL = -EINVAL,
51 BIOS_STATUS_UNAVAIL = -EBUSY
52};
53
54
55struct uv_gam_parameters {
56 u64 mmr_base;
57 u64 gru_base;
58 u8 mmr_shift;
59 u8 gru_shift;
60 u8 gpa_shift;
61 u8 unused1;
62};
63
64
65#define UV_GAM_RANGE_TYPE_UNUSED 0
66#define UV_GAM_RANGE_TYPE_RAM 1
67#define UV_GAM_RANGE_TYPE_NVRAM 2
68#define UV_GAM_RANGE_TYPE_NV_WINDOW 3
69#define UV_GAM_RANGE_TYPE_NV_MAILBOX 4
70#define UV_GAM_RANGE_TYPE_HOLE 5
71#define UV_GAM_RANGE_TYPE_MAX 6
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74#define UV_GAM_RANGE_SHFT 26
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76struct uv_gam_range_entry {
77 char type;
78 char unused1;
79 u16 nasid;
80 u16 sockid;
81 u16 pnode;
82 u32 unused2;
83 u32 limit;
84};
85
86#define UV_SYSTAB_SIG "UVST"
87#define UV_SYSTAB_VERSION_1 1
88#define UV_SYSTAB_VERSION_UV4 0x400
89#define UV_SYSTAB_VERSION_UV4_1 0x401
90#define UV_SYSTAB_VERSION_UV4_2 0x402
91#define UV_SYSTAB_VERSION_UV4_3 0x403
92#define UV_SYSTAB_VERSION_UV4_LATEST UV_SYSTAB_VERSION_UV4_3
93
94#define UV_SYSTAB_TYPE_UNUSED 0
95#define UV_SYSTAB_TYPE_GAM_PARAMS 1
96#define UV_SYSTAB_TYPE_GAM_RNG_TBL 2
97#define UV_SYSTAB_TYPE_MAX 3
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103struct uv_systab {
104 char signature[4];
105 u32 revision;
106 u64 function;
107 u32 size;
108 struct {
109 u32 type:8;
110 u32 offset:24;
111 } entry[1];
112};
113extern struct uv_systab *uv_systab;
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115
116enum {
117 BIOS_FREQ_BASE_PLATFORM = 0,
118 BIOS_FREQ_BASE_INTERVAL_TIMER = 1,
119 BIOS_FREQ_BASE_REALTIME_CLOCK = 2
120};
121
122union partition_info_u {
123 u64 val;
124 struct {
125 u64 hub_version : 8,
126 partition_id : 16,
127 coherence_id : 16,
128 region_size : 24;
129 };
130};
131
132enum uv_memprotect {
133 UV_MEMPROT_RESTRICT_ACCESS,
134 UV_MEMPROT_ALLOW_AMO,
135 UV_MEMPROT_ALLOW_RW
136};
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141extern s64 uv_bios_call(enum uv_bios_cmd, u64, u64, u64, u64, u64);
142extern s64 uv_bios_call_irqsave(enum uv_bios_cmd, u64, u64, u64, u64, u64);
143extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64);
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145extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *, long *);
146extern s64 uv_bios_freq_base(u64, u64 *);
147extern int uv_bios_mq_watchlist_alloc(unsigned long, unsigned int,
148 unsigned long *);
149extern int uv_bios_mq_watchlist_free(int, int);
150extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect);
151extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 *);
152extern int uv_bios_set_legacy_vga_target(bool decode, int domain, int bus);
153
154#ifdef CONFIG_EFI
155extern void uv_bios_init(void);
156#else
157void uv_bios_init(void) { }
158#endif
159
160extern unsigned long sn_rtc_cycles_per_second;
161extern int uv_type;
162extern long sn_partition_id;
163extern long sn_coherency_id;
164extern long sn_region_size;
165extern long system_serial_number;
166#define uv_partition_coherence_id() (sn_coherency_id)
167
168extern struct kobject *sgi_uv_kobj;
169
170#endif
171
