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15#include <linux/clk.h>
16#include <linux/kernel.h>
17#include <linux/gfp.h>
18#include <linux/module.h>
19#include <linux/pm.h>
20#include <linux/interrupt.h>
21#include <linux/device.h>
22#include <linux/platform_device.h>
23#include <linux/libata.h>
24#include <linux/ahci_platform.h>
25#include <linux/phy/phy.h>
26#include <linux/pm_runtime.h>
27#include <linux/of_platform.h>
28#include "ahci.h"
29
30static void ahci_host_stop(struct ata_host *host);
31
32struct ata_port_operations ahci_platform_ops = {
33 .inherits = &ahci_ops,
34 .host_stop = ahci_host_stop,
35};
36EXPORT_SYMBOL_GPL(ahci_platform_ops);
37
38
39
40
41
42
43
44
45
46
47
48
49static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
50{
51 int rc, i;
52
53 for (i = 0; i < hpriv->nports; i++) {
54 rc = phy_init(hpriv->phys[i]);
55 if (rc)
56 goto disable_phys;
57
58 rc = phy_power_on(hpriv->phys[i]);
59 if (rc) {
60 phy_exit(hpriv->phys[i]);
61 goto disable_phys;
62 }
63 }
64
65 return 0;
66
67disable_phys:
68 while (--i >= 0) {
69 phy_power_off(hpriv->phys[i]);
70 phy_exit(hpriv->phys[i]);
71 }
72 return rc;
73}
74
75
76
77
78
79
80
81static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
82{
83 int i;
84
85 for (i = 0; i < hpriv->nports; i++) {
86 phy_power_off(hpriv->phys[i]);
87 phy_exit(hpriv->phys[i]);
88 }
89}
90
91
92
93
94
95
96
97
98
99
100
101
102int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
103{
104 int c, rc;
105
106 for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
107 rc = clk_prepare_enable(hpriv->clks[c]);
108 if (rc)
109 goto disable_unprepare_clk;
110 }
111 return 0;
112
113disable_unprepare_clk:
114 while (--c >= 0)
115 clk_disable_unprepare(hpriv->clks[c]);
116 return rc;
117}
118EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
119
120
121
122
123
124
125
126
127void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
128{
129 int c;
130
131 for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
132 if (hpriv->clks[c])
133 clk_disable_unprepare(hpriv->clks[c]);
134}
135EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
136
137
138
139
140
141
142
143
144
145
146
147
148
149int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
150{
151 int rc, i;
152
153 for (i = 0; i < hpriv->nports; i++) {
154 if (!hpriv->target_pwrs[i])
155 continue;
156
157 rc = regulator_enable(hpriv->target_pwrs[i]);
158 if (rc)
159 goto disable_target_pwrs;
160 }
161
162 return 0;
163
164disable_target_pwrs:
165 while (--i >= 0)
166 if (hpriv->target_pwrs[i])
167 regulator_disable(hpriv->target_pwrs[i]);
168
169 return rc;
170}
171EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
172
173
174
175
176
177
178
179void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
180{
181 int i;
182
183 for (i = 0; i < hpriv->nports; i++) {
184 if (!hpriv->target_pwrs[i])
185 continue;
186 regulator_disable(hpriv->target_pwrs[i]);
187 }
188}
189EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
190
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205
206int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
207{
208 int rc;
209
210 rc = ahci_platform_enable_regulators(hpriv);
211 if (rc)
212 return rc;
213
214 rc = ahci_platform_enable_clks(hpriv);
215 if (rc)
216 goto disable_regulator;
217
218 rc = ahci_platform_enable_phys(hpriv);
219 if (rc)
220 goto disable_clks;
221
222 return 0;
223
224disable_clks:
225 ahci_platform_disable_clks(hpriv);
226
227disable_regulator:
228 ahci_platform_disable_regulators(hpriv);
229
230 return rc;
231}
232EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
233
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242
243
244void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
245{
246 ahci_platform_disable_phys(hpriv);
247
248 ahci_platform_disable_clks(hpriv);
249
250 ahci_platform_disable_regulators(hpriv);
251}
252EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
253
254static void ahci_platform_put_resources(struct device *dev, void *res)
255{
256 struct ahci_host_priv *hpriv = res;
257 int c;
258
259 if (hpriv->got_runtime_pm) {
260 pm_runtime_put_sync(dev);
261 pm_runtime_disable(dev);
262 }
263
264 for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
265 clk_put(hpriv->clks[c]);
266
267
268
269
270
271 for (c = 0; c < hpriv->nports; c++)
272 if (hpriv->target_pwrs && hpriv->target_pwrs[c])
273 regulator_put(hpriv->target_pwrs[c]);
274
275 kfree(hpriv->target_pwrs);
276}
277
278static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
279 struct device *dev, struct device_node *node)
280{
281 int rc;
282
283 hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
284
285 if (!IS_ERR(hpriv->phys[port]))
286 return 0;
287
288 rc = PTR_ERR(hpriv->phys[port]);
289 switch (rc) {
290 case -ENOSYS:
291
292 if (of_find_property(node, "phys", NULL)) {
293 dev_err(dev,
294 "couldn't get PHY in node %s: ENOSYS\n",
295 node->name);
296 break;
297 }
298 case -ENODEV:
299
300 hpriv->phys[port] = NULL;
301 rc = 0;
302 break;
303
304 default:
305 dev_err(dev,
306 "couldn't get PHY in node %s: %d\n",
307 node->name, rc);
308
309 break;
310 }
311
312 return rc;
313}
314
315static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
316 struct device *dev)
317{
318 struct regulator *target_pwr;
319 int rc = 0;
320
321 target_pwr = regulator_get_optional(dev, "target");
322
323 if (!IS_ERR(target_pwr))
324 hpriv->target_pwrs[port] = target_pwr;
325 else
326 rc = PTR_ERR(target_pwr);
327
328 return rc;
329}
330
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346
347struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev)
348{
349 struct device *dev = &pdev->dev;
350 struct ahci_host_priv *hpriv;
351 struct clk *clk;
352 struct device_node *child;
353 int i, sz, enabled_ports = 0, rc = -ENOMEM, child_nodes;
354 u32 mask_port_map = 0;
355
356 if (!devres_open_group(dev, NULL, GFP_KERNEL))
357 return ERR_PTR(-ENOMEM);
358
359 hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
360 GFP_KERNEL);
361 if (!hpriv)
362 goto err_out;
363
364 devres_add(dev, hpriv);
365
366 hpriv->mmio = devm_ioremap_resource(dev,
367 platform_get_resource(pdev, IORESOURCE_MEM, 0));
368 if (IS_ERR(hpriv->mmio)) {
369 dev_err(dev, "no mmio space\n");
370 rc = PTR_ERR(hpriv->mmio);
371 goto err_out;
372 }
373
374 for (i = 0; i < AHCI_MAX_CLKS; i++) {
375
376
377
378
379
380
381 if (i == 0)
382 clk = clk_get(dev, NULL);
383 else
384 clk = of_clk_get(dev->of_node, i);
385
386 if (IS_ERR(clk)) {
387 rc = PTR_ERR(clk);
388 if (rc == -EPROBE_DEFER)
389 goto err_out;
390 break;
391 }
392 hpriv->clks[i] = clk;
393 }
394
395 hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
396
397
398
399
400
401
402 if (!child_nodes)
403 hpriv->nports = 1;
404
405 sz = hpriv->nports * sizeof(*hpriv->phys);
406 hpriv->phys = devm_kzalloc(dev, sz, GFP_KERNEL);
407 if (!hpriv->phys) {
408 rc = -ENOMEM;
409 goto err_out;
410 }
411 sz = hpriv->nports * sizeof(*hpriv->target_pwrs);
412 hpriv->target_pwrs = kzalloc(sz, GFP_KERNEL);
413 if (!hpriv->target_pwrs) {
414 rc = -ENOMEM;
415 goto err_out;
416 }
417
418 if (child_nodes) {
419 for_each_child_of_node(dev->of_node, child) {
420 u32 port;
421 struct platform_device *port_dev __maybe_unused;
422
423 if (!of_device_is_available(child))
424 continue;
425
426 if (of_property_read_u32(child, "reg", &port)) {
427 rc = -EINVAL;
428 goto err_out;
429 }
430
431 if (port >= hpriv->nports) {
432 dev_warn(dev, "invalid port number %d\n", port);
433 continue;
434 }
435 mask_port_map |= BIT(port);
436
437#ifdef CONFIG_OF_ADDRESS
438 of_platform_device_create(child, NULL, NULL);
439
440 port_dev = of_find_device_by_node(child);
441
442 if (port_dev) {
443 rc = ahci_platform_get_regulator(hpriv, port,
444 &port_dev->dev);
445 if (rc == -EPROBE_DEFER)
446 goto err_out;
447 }
448#endif
449
450 rc = ahci_platform_get_phy(hpriv, port, dev, child);
451 if (rc)
452 goto err_out;
453
454 enabled_ports++;
455 }
456 if (!enabled_ports) {
457 dev_warn(dev, "No port enabled\n");
458 rc = -ENODEV;
459 goto err_out;
460 }
461
462 if (!hpriv->mask_port_map)
463 hpriv->mask_port_map = mask_port_map;
464 } else {
465
466
467
468
469 rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
470 if (rc)
471 goto err_out;
472
473 rc = ahci_platform_get_regulator(hpriv, 0, dev);
474 if (rc == -EPROBE_DEFER)
475 goto err_out;
476 }
477 pm_runtime_enable(dev);
478 pm_runtime_get_sync(dev);
479 hpriv->got_runtime_pm = true;
480
481 devres_remove_group(dev, NULL);
482 return hpriv;
483
484err_out:
485 devres_release_group(dev, NULL);
486 return ERR_PTR(rc);
487}
488EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
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503
504int ahci_platform_init_host(struct platform_device *pdev,
505 struct ahci_host_priv *hpriv,
506 const struct ata_port_info *pi_template,
507 struct scsi_host_template *sht)
508{
509 struct device *dev = &pdev->dev;
510 struct ata_port_info pi = *pi_template;
511 const struct ata_port_info *ppi[] = { &pi, NULL };
512 struct ata_host *host;
513 int i, irq, n_ports, rc;
514
515 irq = platform_get_irq(pdev, 0);
516 if (irq <= 0) {
517 if (irq != -EPROBE_DEFER)
518 dev_err(dev, "no irq\n");
519 return irq;
520 }
521
522 hpriv->irq = irq;
523
524
525 pi.private_data = (void *)(unsigned long)hpriv->flags;
526
527 ahci_save_initial_config(dev, hpriv);
528
529 if (hpriv->cap & HOST_CAP_NCQ)
530 pi.flags |= ATA_FLAG_NCQ;
531
532 if (hpriv->cap & HOST_CAP_PMP)
533 pi.flags |= ATA_FLAG_PMP;
534
535 ahci_set_em_messages(hpriv, &pi);
536
537
538
539
540
541
542 n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
543
544 host = ata_host_alloc_pinfo(dev, ppi, n_ports);
545 if (!host)
546 return -ENOMEM;
547
548 host->private_data = hpriv;
549
550 if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
551 host->flags |= ATA_HOST_PARALLEL_SCAN;
552 else
553 dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
554
555 if (pi.flags & ATA_FLAG_EM)
556 ahci_reset_em(host);
557
558 for (i = 0; i < host->n_ports; i++) {
559 struct ata_port *ap = host->ports[i];
560
561 ata_port_desc(ap, "mmio %pR",
562 platform_get_resource(pdev, IORESOURCE_MEM, 0));
563 ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
564
565
566 if (ap->flags & ATA_FLAG_EM)
567 ap->em_message_type = hpriv->em_msg_type;
568
569
570 if (!(hpriv->port_map & (1 << i)))
571 ap->ops = &ata_dummy_port_ops;
572 }
573
574 if (hpriv->cap & HOST_CAP_64) {
575 rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
576 if (rc) {
577 rc = dma_coerce_mask_and_coherent(dev,
578 DMA_BIT_MASK(32));
579 if (rc) {
580 dev_err(dev, "Failed to enable 64-bit DMA.\n");
581 return rc;
582 }
583 dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
584 }
585 }
586
587 rc = ahci_reset_controller(host);
588 if (rc)
589 return rc;
590
591 ahci_init_controller(host);
592 ahci_print_info(host, "platform");
593
594 return ahci_host_activate(host, sht);
595}
596EXPORT_SYMBOL_GPL(ahci_platform_init_host);
597
598static void ahci_host_stop(struct ata_host *host)
599{
600 struct ahci_host_priv *hpriv = host->private_data;
601
602 ahci_platform_disable_resources(hpriv);
603}
604
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612
613void ahci_platform_shutdown(struct platform_device *pdev)
614{
615 struct ata_host *host = platform_get_drvdata(pdev);
616 struct ahci_host_priv *hpriv = host->private_data;
617 void __iomem *mmio = hpriv->mmio;
618 int i;
619
620 for (i = 0; i < host->n_ports; i++) {
621 struct ata_port *ap = host->ports[i];
622
623
624 if (ap->ops->freeze)
625 ap->ops->freeze(ap);
626
627
628 if (ap->ops->port_stop)
629 ap->ops->port_stop(ap);
630 }
631
632
633 writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
634 readl(mmio + HOST_CTL);
635 writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
636}
637EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
638
639#ifdef CONFIG_PM_SLEEP
640
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649
650
651int ahci_platform_suspend_host(struct device *dev)
652{
653 struct ata_host *host = dev_get_drvdata(dev);
654 struct ahci_host_priv *hpriv = host->private_data;
655 void __iomem *mmio = hpriv->mmio;
656 u32 ctl;
657
658 if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
659 dev_err(dev, "firmware update required for suspend/resume\n");
660 return -EIO;
661 }
662
663
664
665
666
667
668 ctl = readl(mmio + HOST_CTL);
669 ctl &= ~HOST_IRQ_EN;
670 writel(ctl, mmio + HOST_CTL);
671 readl(mmio + HOST_CTL);
672
673 return ata_host_suspend(host, PMSG_SUSPEND);
674}
675EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
676
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686
687
688int ahci_platform_resume_host(struct device *dev)
689{
690 struct ata_host *host = dev_get_drvdata(dev);
691 int rc;
692
693 if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
694 rc = ahci_reset_controller(host);
695 if (rc)
696 return rc;
697
698 ahci_init_controller(host);
699 }
700
701 ata_host_resume(host);
702
703 return 0;
704}
705EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
706
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715
716
717int ahci_platform_suspend(struct device *dev)
718{
719 struct ata_host *host = dev_get_drvdata(dev);
720 struct ahci_host_priv *hpriv = host->private_data;
721 int rc;
722
723 rc = ahci_platform_suspend_host(dev);
724 if (rc)
725 return rc;
726
727 ahci_platform_disable_resources(hpriv);
728
729 return 0;
730}
731EXPORT_SYMBOL_GPL(ahci_platform_suspend);
732
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741
742
743int ahci_platform_resume(struct device *dev)
744{
745 struct ata_host *host = dev_get_drvdata(dev);
746 struct ahci_host_priv *hpriv = host->private_data;
747 int rc;
748
749 rc = ahci_platform_enable_resources(hpriv);
750 if (rc)
751 return rc;
752
753 rc = ahci_platform_resume_host(dev);
754 if (rc)
755 goto disable_resources;
756
757
758 pm_runtime_disable(dev);
759 pm_runtime_set_active(dev);
760 pm_runtime_enable(dev);
761
762 return 0;
763
764disable_resources:
765 ahci_platform_disable_resources(hpriv);
766
767 return rc;
768}
769EXPORT_SYMBOL_GPL(ahci_platform_resume);
770#endif
771
772MODULE_DESCRIPTION("AHCI SATA platform library");
773MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
774MODULE_LICENSE("GPL");
775