LXR linux/drivers/gpu/drm/amd/amdgpu/amdgpu

   1/*
   2 * Copyright 2016 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Author: Monk.liu@amd.com
  23 */
  24#ifndef AMDGPU_VIRT_H
  25#define AMDGPU_VIRT_H
  26
  27#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov ready */
  28#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is enabled on this GPU */
  29#define AMDGPU_SRIOV_CAPS_IS_VF        (1 << 2) /* this GPU is a virtual function */
  30#define AMDGPU_PASSTHROUGH_MODE        (1 << 3) /* thw whole GPU is pass through for VM */
  31#define AMDGPU_SRIOV_CAPS_RUNTIME      (1 << 4) /* is out of full access mode */
  32
  33struct amdgpu_mm_table {
  34        struct amdgpu_bo        *bo;
  35        uint32_t                *cpu_addr;
  36        uint64_t                gpu_addr;
  37};
  38
  39/**
  40 * struct amdgpu_virt_ops - amdgpu device virt operations
  41 */
  42struct amdgpu_virt_ops {
  43        int (*req_full_gpu)(struct amdgpu_device *adev, bool init);
  44        int (*rel_full_gpu)(struct amdgpu_device *adev, bool init);
  45        int (*reset_gpu)(struct amdgpu_device *adev);
  46        void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 data2, u32 data3);
  47};
  48
  49/* GPU virtualization */
  50struct amdgpu_virt {
  51        uint32_t                        caps;
  52        struct amdgpu_bo                *csa_obj;
  53        uint64_t                        csa_vmid0_addr;
  54        bool chained_ib_support;
  55        uint32_t                        reg_val_offs;
  56        struct mutex                    lock_reset;
  57        struct amdgpu_irq_src           ack_irq;
  58        struct amdgpu_irq_src           rcv_irq;
  59        struct work_struct              flr_work;
  60        struct amdgpu_mm_table          mm_table;
  61        const struct amdgpu_virt_ops    *ops;
  62};
  63
  64#define AMDGPU_CSA_SIZE    (8 * 1024)
  65#define AMDGPU_CSA_VADDR   (AMDGPU_VA_RESERVED_SIZE - AMDGPU_CSA_SIZE)
  66
  67#define amdgpu_sriov_enabled(adev) \
  68((adev)->virt.caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
  69
  70#define amdgpu_sriov_vf(adev) \
  71((adev)->virt.caps & AMDGPU_SRIOV_CAPS_IS_VF)
  72
  73#define amdgpu_sriov_bios(adev) \
  74((adev)->virt.caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
  75
  76#define amdgpu_sriov_runtime(adev) \
  77((adev)->virt.caps & AMDGPU_SRIOV_CAPS_RUNTIME)
  78
  79#define amdgpu_passthrough(adev) \
  80((adev)->virt.caps & AMDGPU_PASSTHROUGH_MODE)
  81
  82static inline bool is_virtual_machine(void)
  83{
  84#ifdef CONFIG_X86
  85        return boot_cpu_has(X86_FEATURE_HYPERVISOR);
  86#else
  87        return false;
  88#endif
  89}
  90
  91struct amdgpu_vm;
  92int amdgpu_allocate_static_csa(struct amdgpu_device *adev);
  93int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
  94                          struct amdgpu_bo_va **bo_va);
  95void amdgpu_virt_init_setting(struct amdgpu_device *adev);
  96uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
  97void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
  98int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init);
  99int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init);
 100int amdgpu_virt_reset_gpu(struct amdgpu_device *adev);
 101int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job *job);
 102int amdgpu_virt_alloc_mm_table(struct amdgpu_device *adev);
 103void amdgpu_virt_free_mm_table(struct amdgpu_device *adev);
 104
 105#endif
 106