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13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/completion.h>
16#include <linux/clk.h>
17#include <linux/spi/spi.h>
18#include <linux/iio/iio.h>
19#include <linux/iio/buffer.h>
20#include <linux/iio/trigger.h>
21#include <linux/iio/triggered_buffer.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/regulator/consumer.h>
24
25#define ADC12138_MODE_AUTO_CAL 0x08
26#define ADC12138_MODE_READ_STATUS 0x0c
27#define ADC12138_MODE_ACQUISITION_TIME_6 0x0e
28#define ADC12138_MODE_ACQUISITION_TIME_10 0x4e
29#define ADC12138_MODE_ACQUISITION_TIME_18 0x8e
30#define ADC12138_MODE_ACQUISITION_TIME_34 0xce
31
32#define ADC12138_STATUS_CAL BIT(6)
33
34enum {
35 adc12130,
36 adc12132,
37 adc12138,
38};
39
40struct adc12138 {
41 struct spi_device *spi;
42 unsigned int id;
43
44 struct clk *cclk;
45
46 struct regulator *vref_p;
47
48 struct regulator *vref_n;
49 struct mutex lock;
50 struct completion complete;
51
52 unsigned int acquisition_time;
53
54 u8 tx_buf[2] ____cacheline_aligned;
55 u8 rx_buf[2];
56};
57
58#define ADC12138_VOLTAGE_CHANNEL(chan) \
59 { \
60 .type = IIO_VOLTAGE, \
61 .indexed = 1, \
62 .channel = chan, \
63 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
64 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
65 | BIT(IIO_CHAN_INFO_OFFSET), \
66 .scan_index = chan, \
67 .scan_type = { \
68 .sign = 's', \
69 .realbits = 13, \
70 .storagebits = 16, \
71 .shift = 3, \
72 .endianness = IIO_BE, \
73 }, \
74 }
75
76#define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
77 { \
78 .type = IIO_VOLTAGE, \
79 .indexed = 1, \
80 .channel = (chan1), \
81 .channel2 = (chan2), \
82 .differential = 1, \
83 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
84 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
85 | BIT(IIO_CHAN_INFO_OFFSET), \
86 .scan_index = si, \
87 .scan_type = { \
88 .sign = 's', \
89 .realbits = 13, \
90 .storagebits = 16, \
91 .shift = 3, \
92 .endianness = IIO_BE, \
93 }, \
94 }
95
96static const struct iio_chan_spec adc12132_channels[] = {
97 ADC12138_VOLTAGE_CHANNEL(0),
98 ADC12138_VOLTAGE_CHANNEL(1),
99 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
100 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
101 IIO_CHAN_SOFT_TIMESTAMP(4),
102};
103
104static const struct iio_chan_spec adc12138_channels[] = {
105 ADC12138_VOLTAGE_CHANNEL(0),
106 ADC12138_VOLTAGE_CHANNEL(1),
107 ADC12138_VOLTAGE_CHANNEL(2),
108 ADC12138_VOLTAGE_CHANNEL(3),
109 ADC12138_VOLTAGE_CHANNEL(4),
110 ADC12138_VOLTAGE_CHANNEL(5),
111 ADC12138_VOLTAGE_CHANNEL(6),
112 ADC12138_VOLTAGE_CHANNEL(7),
113 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
114 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
115 ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
116 ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
117 ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
118 ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
119 ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
120 ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
121 IIO_CHAN_SOFT_TIMESTAMP(16),
122};
123
124static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
125 void *rx_buf, int len)
126{
127 struct spi_transfer xfer = {
128 .tx_buf = adc->tx_buf,
129 .rx_buf = adc->rx_buf,
130 .len = len,
131 };
132 int ret;
133
134
135 if (adc->id != adc12138)
136 mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
137
138 adc->tx_buf[0] = mode;
139
140 ret = spi_sync_transfer(adc->spi, &xfer, 1);
141 if (ret)
142 return ret;
143
144 memcpy(rx_buf, adc->rx_buf, len);
145
146 return 0;
147}
148
149static int adc12138_read_status(struct adc12138 *adc)
150{
151 u8 rx_buf[2];
152 int ret;
153
154 ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
155 rx_buf, 2);
156 if (ret)
157 return ret;
158
159 return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
160}
161
162static int __adc12138_start_conv(struct adc12138 *adc,
163 struct iio_chan_spec const *channel,
164 void *data, int len)
165
166{
167 const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
168 u8 mode = (ch_to_mux[channel->channel] << 4) |
169 (channel->differential ? 0 : 0x80);
170
171 return adc12138_mode_programming(adc, mode, data, len);
172}
173
174static int adc12138_start_conv(struct adc12138 *adc,
175 struct iio_chan_spec const *channel)
176{
177 u8 trash;
178
179 return __adc12138_start_conv(adc, channel, &trash, 1);
180}
181
182static int adc12138_start_and_read_conv(struct adc12138 *adc,
183 struct iio_chan_spec const *channel,
184 __be16 *data)
185{
186 return __adc12138_start_conv(adc, channel, data, 2);
187}
188
189static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
190{
191
192 return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
193 value, sizeof(*value));
194}
195
196static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
197{
198 if (!wait_for_completion_timeout(&adc->complete, timeout))
199 return -ETIMEDOUT;
200
201 return 0;
202}
203
204static int adc12138_adc_conversion(struct adc12138 *adc,
205 struct iio_chan_spec const *channel,
206 __be16 *value)
207{
208 int ret;
209
210 reinit_completion(&adc->complete);
211
212 ret = adc12138_start_conv(adc, channel);
213 if (ret)
214 return ret;
215
216 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
217 if (ret)
218 return ret;
219
220 return adc12138_read_conv_data(adc, value);
221}
222
223static int adc12138_read_raw(struct iio_dev *iio,
224 struct iio_chan_spec const *channel, int *value,
225 int *shift, long mask)
226{
227 struct adc12138 *adc = iio_priv(iio);
228 int ret;
229 __be16 data;
230
231 switch (mask) {
232 case IIO_CHAN_INFO_RAW:
233 mutex_lock(&adc->lock);
234 ret = adc12138_adc_conversion(adc, channel, &data);
235 mutex_unlock(&adc->lock);
236 if (ret)
237 return ret;
238
239 *value = sign_extend32(be16_to_cpu(data) >> 3, 12);
240
241 return IIO_VAL_INT;
242 case IIO_CHAN_INFO_SCALE:
243 ret = regulator_get_voltage(adc->vref_p);
244 if (ret < 0)
245 return ret;
246 *value = ret;
247
248 if (!IS_ERR(adc->vref_n)) {
249 ret = regulator_get_voltage(adc->vref_n);
250 if (ret < 0)
251 return ret;
252 *value -= ret;
253 }
254
255
256 *value /= 1000;
257 *shift = channel->scan_type.realbits - 1;
258
259 return IIO_VAL_FRACTIONAL_LOG2;
260 case IIO_CHAN_INFO_OFFSET:
261 if (!IS_ERR(adc->vref_n)) {
262 *value = regulator_get_voltage(adc->vref_n);
263 if (*value < 0)
264 return *value;
265 } else {
266 *value = 0;
267 }
268
269
270 *value /= 1000;
271
272 return IIO_VAL_INT;
273 }
274
275 return -EINVAL;
276}
277
278static const struct iio_info adc12138_info = {
279 .read_raw = adc12138_read_raw,
280 .driver_module = THIS_MODULE,
281};
282
283static int adc12138_init(struct adc12138 *adc)
284{
285 int ret;
286 int status;
287 u8 mode;
288 u8 trash;
289
290 reinit_completion(&adc->complete);
291
292 ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
293 if (ret)
294 return ret;
295
296
297 status = adc12138_read_status(adc);
298 if (status < 0)
299 return status;
300
301 adc12138_wait_eoc(adc, msecs_to_jiffies(100));
302
303 status = adc12138_read_status(adc);
304 if (status & ADC12138_STATUS_CAL) {
305 dev_warn(&adc->spi->dev,
306 "Auto Cal sequence is still in progress: %#x\n",
307 status);
308 return -EIO;
309 }
310
311 switch (adc->acquisition_time) {
312 case 6:
313 mode = ADC12138_MODE_ACQUISITION_TIME_6;
314 break;
315 case 10:
316 mode = ADC12138_MODE_ACQUISITION_TIME_10;
317 break;
318 case 18:
319 mode = ADC12138_MODE_ACQUISITION_TIME_18;
320 break;
321 case 34:
322 mode = ADC12138_MODE_ACQUISITION_TIME_34;
323 break;
324 default:
325 return -EINVAL;
326 }
327
328 return adc12138_mode_programming(adc, mode, &trash, 1);
329}
330
331static irqreturn_t adc12138_trigger_handler(int irq, void *p)
332{
333 struct iio_poll_func *pf = p;
334 struct iio_dev *indio_dev = pf->indio_dev;
335 struct adc12138 *adc = iio_priv(indio_dev);
336 __be16 data[20] = { };
337 __be16 trash;
338 int ret;
339 int scan_index;
340 int i = 0;
341
342 mutex_lock(&adc->lock);
343
344 for_each_set_bit(scan_index, indio_dev->active_scan_mask,
345 indio_dev->masklength) {
346 const struct iio_chan_spec *scan_chan =
347 &indio_dev->channels[scan_index];
348
349 reinit_completion(&adc->complete);
350
351 ret = adc12138_start_and_read_conv(adc, scan_chan,
352 i ? &data[i - 1] : &trash);
353 if (ret) {
354 dev_warn(&adc->spi->dev,
355 "failed to start conversion\n");
356 goto out;
357 }
358
359 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
360 if (ret) {
361 dev_warn(&adc->spi->dev, "wait eoc timeout\n");
362 goto out;
363 }
364
365 i++;
366 }
367
368 if (i) {
369 ret = adc12138_read_conv_data(adc, &data[i - 1]);
370 if (ret) {
371 dev_warn(&adc->spi->dev,
372 "failed to get conversion data\n");
373 goto out;
374 }
375 }
376
377 iio_push_to_buffers_with_timestamp(indio_dev, data,
378 iio_get_time_ns(indio_dev));
379out:
380 mutex_unlock(&adc->lock);
381
382 iio_trigger_notify_done(indio_dev->trig);
383
384 return IRQ_HANDLED;
385}
386
387static irqreturn_t adc12138_eoc_handler(int irq, void *p)
388{
389 struct iio_dev *indio_dev = p;
390 struct adc12138 *adc = iio_priv(indio_dev);
391
392 complete(&adc->complete);
393
394 return IRQ_HANDLED;
395}
396
397static int adc12138_probe(struct spi_device *spi)
398{
399 struct iio_dev *indio_dev;
400 struct adc12138 *adc;
401 int ret;
402
403 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
404 if (!indio_dev)
405 return -ENOMEM;
406
407 adc = iio_priv(indio_dev);
408 adc->spi = spi;
409 adc->id = spi_get_device_id(spi)->driver_data;
410 mutex_init(&adc->lock);
411 init_completion(&adc->complete);
412
413 indio_dev->name = spi_get_device_id(spi)->name;
414 indio_dev->dev.parent = &spi->dev;
415 indio_dev->info = &adc12138_info;
416 indio_dev->modes = INDIO_DIRECT_MODE;
417
418 switch (adc->id) {
419 case adc12130:
420 case adc12132:
421 indio_dev->channels = adc12132_channels;
422 indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
423 break;
424 case adc12138:
425 indio_dev->channels = adc12138_channels;
426 indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
427 break;
428 default:
429 return -EINVAL;
430 }
431
432 ret = of_property_read_u32(spi->dev.of_node, "ti,acquisition-time",
433 &adc->acquisition_time);
434 if (ret)
435 adc->acquisition_time = 10;
436
437 adc->cclk = devm_clk_get(&spi->dev, NULL);
438 if (IS_ERR(adc->cclk))
439 return PTR_ERR(adc->cclk);
440
441 adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
442 if (IS_ERR(adc->vref_p))
443 return PTR_ERR(adc->vref_p);
444
445 adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
446 if (IS_ERR(adc->vref_n)) {
447
448
449
450
451 ret = PTR_ERR(adc->vref_n);
452 if (ret != -ENODEV)
453 return ret;
454 }
455
456 ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
457 IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
458 if (ret)
459 return ret;
460
461 ret = clk_prepare_enable(adc->cclk);
462 if (ret)
463 return ret;
464
465 ret = regulator_enable(adc->vref_p);
466 if (ret)
467 goto err_clk_disable;
468
469 if (!IS_ERR(adc->vref_n)) {
470 ret = regulator_enable(adc->vref_n);
471 if (ret)
472 goto err_vref_p_disable;
473 }
474
475 ret = adc12138_init(adc);
476 if (ret)
477 goto err_vref_n_disable;
478
479 spi_set_drvdata(spi, indio_dev);
480
481 ret = iio_triggered_buffer_setup(indio_dev, NULL,
482 adc12138_trigger_handler, NULL);
483 if (ret)
484 goto err_vref_n_disable;
485
486 ret = iio_device_register(indio_dev);
487 if (ret)
488 goto err_buffer_cleanup;
489
490 return 0;
491err_buffer_cleanup:
492 iio_triggered_buffer_cleanup(indio_dev);
493err_vref_n_disable:
494 if (!IS_ERR(adc->vref_n))
495 regulator_disable(adc->vref_n);
496err_vref_p_disable:
497 regulator_disable(adc->vref_p);
498err_clk_disable:
499 clk_disable_unprepare(adc->cclk);
500
501 return ret;
502}
503
504static int adc12138_remove(struct spi_device *spi)
505{
506 struct iio_dev *indio_dev = spi_get_drvdata(spi);
507 struct adc12138 *adc = iio_priv(indio_dev);
508
509 iio_device_unregister(indio_dev);
510 iio_triggered_buffer_cleanup(indio_dev);
511 if (!IS_ERR(adc->vref_n))
512 regulator_disable(adc->vref_n);
513 regulator_disable(adc->vref_p);
514 clk_disable_unprepare(adc->cclk);
515
516 return 0;
517}
518
519#ifdef CONFIG_OF
520
521static const struct of_device_id adc12138_dt_ids[] = {
522 { .compatible = "ti,adc12130", },
523 { .compatible = "ti,adc12132", },
524 { .compatible = "ti,adc12138", },
525 {}
526};
527MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
528
529#endif
530
531static const struct spi_device_id adc12138_id[] = {
532 { "adc12130", adc12130 },
533 { "adc12132", adc12132 },
534 { "adc12138", adc12138 },
535 {}
536};
537MODULE_DEVICE_TABLE(spi, adc12138_id);
538
539static struct spi_driver adc12138_driver = {
540 .driver = {
541 .name = "adc12138",
542 .of_match_table = of_match_ptr(adc12138_dt_ids),
543 },
544 .probe = adc12138_probe,
545 .remove = adc12138_remove,
546 .id_table = adc12138_id,
547};
548module_spi_driver(adc12138_driver);
549
550MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
551MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
552MODULE_LICENSE("GPL v2");
553
