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23#include <linux/bitfield.h>
24#include <linux/delay.h>
25#include <linux/iio/iio.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/platform_device.h>
29
30#include "stm32-dac-core.h"
31
32#define STM32_DAC_CHANNEL_1 1
33#define STM32_DAC_CHANNEL_2 2
34#define STM32_DAC_IS_CHAN_1(ch) ((ch) & STM32_DAC_CHANNEL_1)
35
36
37
38
39
40struct stm32_dac {
41 struct stm32_dac_common *common;
42};
43
44static int stm32_dac_is_enabled(struct iio_dev *indio_dev, int channel)
45{
46 struct stm32_dac *dac = iio_priv(indio_dev);
47 u32 en, val;
48 int ret;
49
50 ret = regmap_read(dac->common->regmap, STM32_DAC_CR, &val);
51 if (ret < 0)
52 return ret;
53 if (STM32_DAC_IS_CHAN_1(channel))
54 en = FIELD_GET(STM32_DAC_CR_EN1, val);
55 else
56 en = FIELD_GET(STM32_DAC_CR_EN2, val);
57
58 return !!en;
59}
60
61static int stm32_dac_set_enable_state(struct iio_dev *indio_dev, int ch,
62 bool enable)
63{
64 struct stm32_dac *dac = iio_priv(indio_dev);
65 u32 msk = STM32_DAC_IS_CHAN_1(ch) ? STM32_DAC_CR_EN1 : STM32_DAC_CR_EN2;
66 u32 en = enable ? msk : 0;
67 int ret;
68
69 ret = regmap_update_bits(dac->common->regmap, STM32_DAC_CR, msk, en);
70 if (ret < 0) {
71 dev_err(&indio_dev->dev, "%s failed\n", en ?
72 "Enable" : "Disable");
73 return ret;
74 }
75
76
77
78
79
80
81 if (en && dac->common->hfsel)
82 udelay(1);
83
84 return 0;
85}
86
87static int stm32_dac_get_value(struct stm32_dac *dac, int channel, int *val)
88{
89 int ret;
90
91 if (STM32_DAC_IS_CHAN_1(channel))
92 ret = regmap_read(dac->common->regmap, STM32_DAC_DOR1, val);
93 else
94 ret = regmap_read(dac->common->regmap, STM32_DAC_DOR2, val);
95
96 return ret ? ret : IIO_VAL_INT;
97}
98
99static int stm32_dac_set_value(struct stm32_dac *dac, int channel, int val)
100{
101 int ret;
102
103 if (STM32_DAC_IS_CHAN_1(channel))
104 ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R1, val);
105 else
106 ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R2, val);
107
108 return ret;
109}
110
111static int stm32_dac_read_raw(struct iio_dev *indio_dev,
112 struct iio_chan_spec const *chan,
113 int *val, int *val2, long mask)
114{
115 struct stm32_dac *dac = iio_priv(indio_dev);
116
117 switch (mask) {
118 case IIO_CHAN_INFO_RAW:
119 return stm32_dac_get_value(dac, chan->channel, val);
120 case IIO_CHAN_INFO_SCALE:
121 *val = dac->common->vref_mv;
122 *val2 = chan->scan_type.realbits;
123 return IIO_VAL_FRACTIONAL_LOG2;
124 default:
125 return -EINVAL;
126 }
127}
128
129static int stm32_dac_write_raw(struct iio_dev *indio_dev,
130 struct iio_chan_spec const *chan,
131 int val, int val2, long mask)
132{
133 struct stm32_dac *dac = iio_priv(indio_dev);
134
135 switch (mask) {
136 case IIO_CHAN_INFO_RAW:
137 return stm32_dac_set_value(dac, chan->channel, val);
138 default:
139 return -EINVAL;
140 }
141}
142
143static int stm32_dac_debugfs_reg_access(struct iio_dev *indio_dev,
144 unsigned reg, unsigned writeval,
145 unsigned *readval)
146{
147 struct stm32_dac *dac = iio_priv(indio_dev);
148
149 if (!readval)
150 return regmap_write(dac->common->regmap, reg, writeval);
151 else
152 return regmap_read(dac->common->regmap, reg, readval);
153}
154
155static const struct iio_info stm32_dac_iio_info = {
156 .read_raw = stm32_dac_read_raw,
157 .write_raw = stm32_dac_write_raw,
158 .debugfs_reg_access = stm32_dac_debugfs_reg_access,
159 .driver_module = THIS_MODULE,
160};
161
162static const char * const stm32_dac_powerdown_modes[] = {
163 "three_state",
164};
165
166static int stm32_dac_get_powerdown_mode(struct iio_dev *indio_dev,
167 const struct iio_chan_spec *chan)
168{
169 return 0;
170}
171
172static int stm32_dac_set_powerdown_mode(struct iio_dev *indio_dev,
173 const struct iio_chan_spec *chan,
174 unsigned int type)
175{
176 return 0;
177}
178
179static ssize_t stm32_dac_read_powerdown(struct iio_dev *indio_dev,
180 uintptr_t private,
181 const struct iio_chan_spec *chan,
182 char *buf)
183{
184 int ret = stm32_dac_is_enabled(indio_dev, chan->channel);
185
186 if (ret < 0)
187 return ret;
188
189 return sprintf(buf, "%d\n", ret ? 0 : 1);
190}
191
192static ssize_t stm32_dac_write_powerdown(struct iio_dev *indio_dev,
193 uintptr_t private,
194 const struct iio_chan_spec *chan,
195 const char *buf, size_t len)
196{
197 bool powerdown;
198 int ret;
199
200 ret = strtobool(buf, &powerdown);
201 if (ret)
202 return ret;
203
204 ret = stm32_dac_set_enable_state(indio_dev, chan->channel, !powerdown);
205 if (ret)
206 return ret;
207
208 return len;
209}
210
211static const struct iio_enum stm32_dac_powerdown_mode_en = {
212 .items = stm32_dac_powerdown_modes,
213 .num_items = ARRAY_SIZE(stm32_dac_powerdown_modes),
214 .get = stm32_dac_get_powerdown_mode,
215 .set = stm32_dac_set_powerdown_mode,
216};
217
218static const struct iio_chan_spec_ext_info stm32_dac_ext_info[] = {
219 {
220 .name = "powerdown",
221 .read = stm32_dac_read_powerdown,
222 .write = stm32_dac_write_powerdown,
223 .shared = IIO_SEPARATE,
224 },
225 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &stm32_dac_powerdown_mode_en),
226 IIO_ENUM_AVAILABLE("powerdown_mode", &stm32_dac_powerdown_mode_en),
227 {},
228};
229
230#define STM32_DAC_CHANNEL(chan, name) { \
231 .type = IIO_VOLTAGE, \
232 .indexed = 1, \
233 .output = 1, \
234 .channel = chan, \
235 .info_mask_separate = \
236 BIT(IIO_CHAN_INFO_RAW) | \
237 BIT(IIO_CHAN_INFO_SCALE), \
238 \
239 .scan_type = { \
240 .sign = 'u', \
241 .realbits = 12, \
242 .storagebits = 16, \
243 }, \
244 .datasheet_name = name, \
245 .ext_info = stm32_dac_ext_info \
246}
247
248static const struct iio_chan_spec stm32_dac_channels[] = {
249 STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_1, "out1"),
250 STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_2, "out2"),
251};
252
253static int stm32_dac_chan_of_init(struct iio_dev *indio_dev)
254{
255 struct device_node *np = indio_dev->dev.of_node;
256 unsigned int i;
257 u32 channel;
258 int ret;
259
260 ret = of_property_read_u32(np, "reg", &channel);
261 if (ret) {
262 dev_err(&indio_dev->dev, "Failed to read reg property\n");
263 return ret;
264 }
265
266 for (i = 0; i < ARRAY_SIZE(stm32_dac_channels); i++) {
267 if (stm32_dac_channels[i].channel == channel)
268 break;
269 }
270 if (i >= ARRAY_SIZE(stm32_dac_channels)) {
271 dev_err(&indio_dev->dev, "Invalid reg property\n");
272 return -EINVAL;
273 }
274
275 indio_dev->channels = &stm32_dac_channels[i];
276
277
278
279
280
281 indio_dev->num_channels = 1;
282
283 return 0;
284};
285
286static int stm32_dac_probe(struct platform_device *pdev)
287{
288 struct device_node *np = pdev->dev.of_node;
289 struct iio_dev *indio_dev;
290 struct stm32_dac *dac;
291 int ret;
292
293 if (!np)
294 return -ENODEV;
295
296 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*dac));
297 if (!indio_dev)
298 return -ENOMEM;
299 platform_set_drvdata(pdev, indio_dev);
300
301 dac = iio_priv(indio_dev);
302 dac->common = dev_get_drvdata(pdev->dev.parent);
303 indio_dev->name = dev_name(&pdev->dev);
304 indio_dev->dev.parent = &pdev->dev;
305 indio_dev->dev.of_node = pdev->dev.of_node;
306 indio_dev->info = &stm32_dac_iio_info;
307 indio_dev->modes = INDIO_DIRECT_MODE;
308
309 ret = stm32_dac_chan_of_init(indio_dev);
310 if (ret < 0)
311 return ret;
312
313 return devm_iio_device_register(&pdev->dev, indio_dev);
314}
315
316static const struct of_device_id stm32_dac_of_match[] = {
317 { .compatible = "st,stm32-dac", },
318 {},
319};
320MODULE_DEVICE_TABLE(of, stm32_dac_of_match);
321
322static struct platform_driver stm32_dac_driver = {
323 .probe = stm32_dac_probe,
324 .driver = {
325 .name = "stm32-dac",
326 .of_match_table = stm32_dac_of_match,
327 },
328};
329module_platform_driver(stm32_dac_driver);
330
331MODULE_ALIAS("platform:stm32-dac");
332MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
333MODULE_DESCRIPTION("STMicroelectronics STM32 DAC driver");
334MODULE_LICENSE("GPL v2");
335
