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19#include "saa7134.h"
20#include "saa7134-reg.h"
21
22#include <linux/init.h>
23#include <linux/list.h>
24#include <linux/module.h>
25#include <linux/kernel.h>
26
27
28
29static unsigned int vbi_debug;
30module_param(vbi_debug, int, 0644);
31MODULE_PARM_DESC(vbi_debug,"enable debug messages [vbi]");
32
33static unsigned int vbibufs = 4;
34module_param(vbibufs, int, 0444);
35MODULE_PARM_DESC(vbibufs,"number of vbi buffers, range 2-32");
36
37#define vbi_dbg(fmt, arg...) do { \
38 if (vbi_debug) \
39 printk(KERN_DEBUG pr_fmt("vbi: " fmt), ## arg); \
40 } while (0)
41
42
43
44#define VBI_LINE_COUNT 17
45#define VBI_LINE_LENGTH 2048
46#define VBI_SCALE 0x200
47
48static void task_init(struct saa7134_dev *dev, struct saa7134_buf *buf,
49 int task)
50{
51 struct saa7134_tvnorm *norm = dev->tvnorm;
52
53
54 saa_writeb(SAA7134_VBI_H_START1(task), norm->h_start & 0xff);
55 saa_writeb(SAA7134_VBI_H_START2(task), norm->h_start >> 8);
56 saa_writeb(SAA7134_VBI_H_STOP1(task), norm->h_stop & 0xff);
57 saa_writeb(SAA7134_VBI_H_STOP2(task), norm->h_stop >> 8);
58 saa_writeb(SAA7134_VBI_V_START1(task), norm->vbi_v_start_0 & 0xff);
59 saa_writeb(SAA7134_VBI_V_START2(task), norm->vbi_v_start_0 >> 8);
60 saa_writeb(SAA7134_VBI_V_STOP1(task), norm->vbi_v_stop_0 & 0xff);
61 saa_writeb(SAA7134_VBI_V_STOP2(task), norm->vbi_v_stop_0 >> 8);
62
63 saa_writeb(SAA7134_VBI_H_SCALE_INC1(task), VBI_SCALE & 0xff);
64 saa_writeb(SAA7134_VBI_H_SCALE_INC2(task), VBI_SCALE >> 8);
65 saa_writeb(SAA7134_VBI_PHASE_OFFSET_LUMA(task), 0x00);
66 saa_writeb(SAA7134_VBI_PHASE_OFFSET_CHROMA(task), 0x00);
67
68 saa_writeb(SAA7134_VBI_H_LEN1(task), dev->vbi_hlen & 0xff);
69 saa_writeb(SAA7134_VBI_H_LEN2(task), dev->vbi_hlen >> 8);
70 saa_writeb(SAA7134_VBI_V_LEN1(task), dev->vbi_vlen & 0xff);
71 saa_writeb(SAA7134_VBI_V_LEN2(task), dev->vbi_vlen >> 8);
72
73 saa_andorb(SAA7134_DATA_PATH(task), 0xc0, 0x00);
74}
75
76
77
78static int buffer_activate(struct saa7134_dev *dev,
79 struct saa7134_buf *buf,
80 struct saa7134_buf *next)
81{
82 struct saa7134_dmaqueue *dmaq = buf->vb2.vb2_buf.vb2_queue->drv_priv;
83 unsigned long control, base;
84
85 vbi_dbg("buffer_activate [%p]\n", buf);
86 buf->top_seen = 0;
87
88 task_init(dev, buf, TASK_A);
89 task_init(dev, buf, TASK_B);
90 saa_writeb(SAA7134_OFMT_DATA_A, 0x06);
91 saa_writeb(SAA7134_OFMT_DATA_B, 0x06);
92
93
94 base = saa7134_buffer_base(buf);
95 control = SAA7134_RS_CONTROL_BURST_16 |
96 SAA7134_RS_CONTROL_ME |
97 (dmaq->pt.dma >> 12);
98 saa_writel(SAA7134_RS_BA1(2), base);
99 saa_writel(SAA7134_RS_BA2(2), base + dev->vbi_hlen * dev->vbi_vlen);
100 saa_writel(SAA7134_RS_PITCH(2), dev->vbi_hlen);
101 saa_writel(SAA7134_RS_CONTROL(2), control);
102 saa_writel(SAA7134_RS_BA1(3), base);
103 saa_writel(SAA7134_RS_BA2(3), base + dev->vbi_hlen * dev->vbi_vlen);
104 saa_writel(SAA7134_RS_PITCH(3), dev->vbi_hlen);
105 saa_writel(SAA7134_RS_CONTROL(3), control);
106
107
108 saa7134_set_dmabits(dev);
109 mod_timer(&dmaq->timeout, jiffies + BUFFER_TIMEOUT);
110
111 return 0;
112}
113
114static int buffer_prepare(struct vb2_buffer *vb2)
115{
116 struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
117 struct saa7134_dev *dev = dmaq->dev;
118 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
119 struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
120 struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0);
121 unsigned int size;
122
123 if (dma->sgl->offset) {
124 pr_err("The buffer is not page-aligned\n");
125 return -EINVAL;
126 }
127 size = dev->vbi_hlen * dev->vbi_vlen * 2;
128 if (vb2_plane_size(vb2, 0) < size)
129 return -EINVAL;
130
131 vb2_set_plane_payload(vb2, 0, size);
132
133 return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents,
134 saa7134_buffer_startpage(buf));
135}
136
137static int queue_setup(struct vb2_queue *q,
138 unsigned int *nbuffers, unsigned int *nplanes,
139 unsigned int sizes[], struct device *alloc_devs[])
140{
141 struct saa7134_dmaqueue *dmaq = q->drv_priv;
142 struct saa7134_dev *dev = dmaq->dev;
143 unsigned int size;
144
145 dev->vbi_vlen = dev->tvnorm->vbi_v_stop_0 - dev->tvnorm->vbi_v_start_0 + 1;
146 if (dev->vbi_vlen > VBI_LINE_COUNT)
147 dev->vbi_vlen = VBI_LINE_COUNT;
148 dev->vbi_hlen = VBI_LINE_LENGTH;
149 size = dev->vbi_hlen * dev->vbi_vlen * 2;
150
151 *nbuffers = saa7134_buffer_count(size, *nbuffers);
152 *nplanes = 1;
153 sizes[0] = size;
154 return 0;
155}
156
157static int buffer_init(struct vb2_buffer *vb2)
158{
159 struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
160 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
161 struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
162
163 dmaq->curr = NULL;
164 buf->activate = buffer_activate;
165 return 0;
166}
167
168struct vb2_ops saa7134_vbi_qops = {
169 .queue_setup = queue_setup,
170 .buf_init = buffer_init,
171 .buf_prepare = buffer_prepare,
172 .buf_queue = saa7134_vb2_buffer_queue,
173 .wait_prepare = vb2_ops_wait_prepare,
174 .wait_finish = vb2_ops_wait_finish,
175 .start_streaming = saa7134_vb2_start_streaming,
176 .stop_streaming = saa7134_vb2_stop_streaming,
177};
178
179
180
181int saa7134_vbi_init1(struct saa7134_dev *dev)
182{
183 INIT_LIST_HEAD(&dev->vbi_q.queue);
184 setup_timer(&dev->vbi_q.timeout, saa7134_buffer_timeout,
185 (unsigned long)(&dev->vbi_q));
186 dev->vbi_q.dev = dev;
187
188 if (vbibufs < 2)
189 vbibufs = 2;
190 if (vbibufs > VIDEO_MAX_FRAME)
191 vbibufs = VIDEO_MAX_FRAME;
192 return 0;
193}
194
195int saa7134_vbi_fini(struct saa7134_dev *dev)
196{
197
198 return 0;
199}
200
201void saa7134_irq_vbi_done(struct saa7134_dev *dev, unsigned long status)
202{
203 spin_lock(&dev->slock);
204 if (dev->vbi_q.curr) {
205
206 if ((status & 0x10) == 0x00) {
207 dev->vbi_q.curr->top_seen = 1;
208 goto done;
209 }
210 if (!dev->vbi_q.curr->top_seen)
211 goto done;
212
213 saa7134_buffer_finish(dev, &dev->vbi_q, VB2_BUF_STATE_DONE);
214 }
215 saa7134_buffer_next(dev, &dev->vbi_q);
216
217 done:
218 spin_unlock(&dev->slock);
219}
220
