linux/drivers/net/ethernet/apm/xgene-v2/ring.h
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   1/*
   2 * Applied Micro X-Gene SoC Ethernet v2 Driver
   3 *
   4 * Copyright (c) 2017, Applied Micro Circuits Corporation
   5 * Author(s): Iyappan Subramanian <isubramanian@apm.com>
   6 *            Keyur Chudgar <kchudgar@apm.com>
   7 *
   8 * This program is free software; you can redistribute  it and/or modify it
   9 * under  the terms of  the GNU General  Public License as published by the
  10 * Free Software Foundation;  either version 2 of the  License, or (at your
  11 * option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20 */
  21
  22#ifndef __XGENE_ENET_V2_RING_H__
  23#define __XGENE_ENET_V2_RING_H__
  24
  25#define XGENE_ENET_DESC_SIZE    64
  26#define XGENE_ENET_NUM_DESC     256
  27#define NUM_BUFS                8
  28#define SLOT_EMPTY              0xfff
  29
  30#define DMATXCTRL               0xa180
  31#define DMATXDESCL              0xa184
  32#define DMATXDESCH              0xa1a0
  33#define DMATXSTATUS             0xa188
  34#define DMARXCTRL               0xa18c
  35#define DMARXDESCL              0xa190
  36#define DMARXDESCH              0xa1a4
  37#define DMARXSTATUS             0xa194
  38#define DMAINTRMASK             0xa198
  39#define DMAINTERRUPT            0xa19c
  40
  41#define D_POS                   62
  42#define D_LEN                   2
  43#define E_POS                   63
  44#define E_LEN                   1
  45#define PKT_ADDRL_POS           0
  46#define PKT_ADDRL_LEN           32
  47#define PKT_ADDRH_POS           32
  48#define PKT_ADDRH_LEN           10
  49#define PKT_SIZE_POS            32
  50#define PKT_SIZE_LEN            12
  51#define NEXT_DESC_ADDRL_POS     0
  52#define NEXT_DESC_ADDRL_LEN     32
  53#define NEXT_DESC_ADDRH_POS     48
  54#define NEXT_DESC_ADDRH_LEN     10
  55
  56#define TXPKTCOUNT_POS          16
  57#define TXPKTCOUNT_LEN          8
  58#define RXPKTCOUNT_POS          16
  59#define RXPKTCOUNT_LEN          8
  60
  61#define TX_PKT_SENT             BIT(0)
  62#define TX_BUS_ERROR            BIT(3)
  63#define RX_PKT_RCVD             BIT(4)
  64#define RX_BUS_ERROR            BIT(7)
  65#define RXSTATUS_RXPKTRCVD      BIT(0)
  66
  67struct xge_raw_desc {
  68        __le64 m0;
  69        __le64 m1;
  70        __le64 m2;
  71        __le64 m3;
  72        __le64 m4;
  73        __le64 m5;
  74        __le64 m6;
  75        __le64 m7;
  76};
  77
  78struct pkt_info {
  79        struct sk_buff *skb;
  80        dma_addr_t dma_addr;
  81        void *pkt_buf;
  82};
  83
  84/* software context of a descriptor ring */
  85struct xge_desc_ring {
  86        struct net_device *ndev;
  87        dma_addr_t dma_addr;
  88        u8 head;
  89        u8 tail;
  90        union {
  91                void *desc_addr;
  92                struct xge_raw_desc *raw_desc;
  93        };
  94        struct pkt_info (*pkt_info);
  95};
  96
  97static inline u64 xge_set_desc_bits(int pos, int len, u64 val)
  98{
  99        return (val & ((1ULL << len) - 1)) << pos;
 100}
 101
 102static inline u64 xge_get_desc_bits(int pos, int len, u64 src)
 103{
 104        return (src >> pos) & ((1ULL << len) - 1);
 105}
 106
 107#define SET_BITS(field, val) \
 108                xge_set_desc_bits(field ## _POS, field ## _LEN, val)
 109
 110#define GET_BITS(field, src) \
 111                xge_get_desc_bits(field ## _POS, field ## _LEN, src)
 112
 113void xge_setup_desc(struct xge_desc_ring *ring);
 114void xge_update_tx_desc_addr(struct xge_pdata *pdata);
 115void xge_update_rx_desc_addr(struct xge_pdata *pdata);
 116void xge_intr_enable(struct xge_pdata *pdata);
 117void xge_intr_disable(struct xge_pdata *pdata);
 118
 119#endif  /* __XGENE_ENET_V2_RING_H__ */
 120