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35#ifndef MLX4_FW_H
36#define MLX4_FW_H
37
38#include "mlx4.h"
39#include "icm.h"
40
41struct mlx4_mod_stat_cfg {
42 u8 log_pg_sz;
43 u8 log_pg_sz_m;
44};
45
46struct mlx4_port_cap {
47 u8 link_state;
48 u8 supported_port_types;
49 u8 suggested_type;
50 u8 default_sense;
51 u8 log_max_macs;
52 u8 log_max_vlans;
53 int ib_mtu;
54 int max_port_width;
55 int max_vl;
56 int max_tc_eth;
57 int max_gids;
58 int max_pkeys;
59 u64 def_mac;
60 u16 eth_mtu;
61 int trans_type;
62 int vendor_oui;
63 u16 wavelength;
64 u64 trans_code;
65 u8 dmfs_optimized_state;
66};
67
68struct mlx4_dev_cap {
69 int max_srq_sz;
70 int max_qp_sz;
71 int reserved_qps;
72 int max_qps;
73 int reserved_srqs;
74 int max_srqs;
75 int max_cq_sz;
76 int reserved_cqs;
77 int max_cqs;
78 int max_mpts;
79 int reserved_eqs;
80 int max_eqs;
81 int num_sys_eqs;
82 int reserved_mtts;
83 int reserved_mrws;
84 int max_requester_per_qp;
85 int max_responder_per_qp;
86 int max_rdma_global;
87 int local_ca_ack_delay;
88 int num_ports;
89 u32 max_msg_sz;
90 u16 stat_rate_support;
91 int fs_log_max_ucast_qp_range_size;
92 int fs_max_num_qp_per_entry;
93 u64 flags;
94 u64 flags2;
95 int reserved_uars;
96 int uar_size;
97 int min_page_sz;
98 int bf_reg_size;
99 int bf_regs_per_page;
100 int max_sq_sg;
101 int max_sq_desc_sz;
102 int max_rq_sg;
103 int max_rq_desc_sz;
104 int max_qp_per_mcg;
105 int reserved_mgms;
106 int max_mcgs;
107 int reserved_pds;
108 int max_pds;
109 int reserved_xrcds;
110 int max_xrcds;
111 int qpc_entry_sz;
112 int rdmarc_entry_sz;
113 int altc_entry_sz;
114 int aux_entry_sz;
115 int srq_entry_sz;
116 int cqc_entry_sz;
117 int eqc_entry_sz;
118 int dmpt_entry_sz;
119 int cmpt_entry_sz;
120 int mtt_entry_sz;
121 int resize_srq;
122 u32 bmme_flags;
123 u32 reserved_lkey;
124 u64 max_icm_sz;
125 int max_gso_sz;
126 int max_rss_tbl_sz;
127 u32 max_counters;
128 u32 dmfs_high_rate_qpn_base;
129 u32 dmfs_high_rate_qpn_range;
130 struct mlx4_rate_limit_caps rl_caps;
131 struct mlx4_port_cap port_cap[MLX4_MAX_PORTS + 1];
132 bool wol_port[MLX4_MAX_PORTS + 1];
133};
134
135struct mlx4_func_cap {
136 u8 num_ports;
137 u8 flags;
138 u32 pf_context_behaviour;
139 int qp_quota;
140 int cq_quota;
141 int srq_quota;
142 int mpt_quota;
143 int mtt_quota;
144 int max_eq;
145 int reserved_eq;
146 int mcg_quota;
147 struct mlx4_spec_qps spec_qps;
148 u32 reserved_lkey;
149 u8 physical_port;
150 u8 flags0;
151 u8 flags1;
152 u64 phys_port_id;
153 u32 extra_flags;
154};
155
156struct mlx4_func {
157 int bus;
158 int device;
159 int function;
160 int physical_function;
161 int rsvd_eqs;
162 int max_eq;
163 int rsvd_uars;
164};
165
166struct mlx4_adapter {
167 char board_id[MLX4_BOARD_ID_LEN];
168 u8 inta_pin;
169};
170
171struct mlx4_init_hca_param {
172 u64 qpc_base;
173 u64 rdmarc_base;
174 u64 auxc_base;
175 u64 altc_base;
176 u64 srqc_base;
177 u64 cqc_base;
178 u64 eqc_base;
179 u64 mc_base;
180 u64 dmpt_base;
181 u64 cmpt_base;
182 u64 mtt_base;
183 u64 global_caps;
184 u16 log_mc_entry_sz;
185 u16 log_mc_hash_sz;
186 u16 hca_core_clock;
187 u8 log_num_qps;
188 u8 log_num_srqs;
189 u8 log_num_cqs;
190 u8 log_num_eqs;
191 u16 num_sys_eqs;
192 u8 log_rd_per_qp;
193 u8 log_mc_table_sz;
194 u8 log_mpt_sz;
195 u8 log_uar_sz;
196 u8 mw_enabled;
197 u8 uar_page_sz;
198 u8 steering_mode;
199 u8 dmfs_high_steer_mode;
200 u64 dev_cap_enabled;
201 u16 cqe_size;
202 u16 eqe_size;
203 u8 rss_ip_frags;
204 u8 phv_check_en;
205};
206
207struct mlx4_init_ib_param {
208 int port_width;
209 int vl_cap;
210 int mtu_cap;
211 u16 gid_cap;
212 u16 pkey_cap;
213 int set_guid0;
214 u64 guid0;
215 int set_node_guid;
216 u64 node_guid;
217 int set_si_guid;
218 u64 si_guid;
219};
220
221struct mlx4_set_ib_param {
222 int set_si_guid;
223 int reset_qkey_viol;
224 u64 si_guid;
225 u32 cap_mask;
226};
227
228void mlx4_dev_cap_dump(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
229int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
230int mlx4_QUERY_PORT(struct mlx4_dev *dev, int port, struct mlx4_port_cap *port_cap);
231int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, u8 gen_or_port,
232 struct mlx4_func_cap *func_cap);
233int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave,
234 struct mlx4_vhcr *vhcr,
235 struct mlx4_cmd_mailbox *inbox,
236 struct mlx4_cmd_mailbox *outbox,
237 struct mlx4_cmd_info *cmd);
238int mlx4_QUERY_FUNC(struct mlx4_dev *dev, struct mlx4_func *func, int slave);
239int mlx4_MAP_FA(struct mlx4_dev *dev, struct mlx4_icm *icm);
240int mlx4_UNMAP_FA(struct mlx4_dev *dev);
241int mlx4_RUN_FW(struct mlx4_dev *dev);
242int mlx4_QUERY_FW(struct mlx4_dev *dev);
243int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter);
244int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param);
245int mlx4_QUERY_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param);
246int mlx4_CLOSE_HCA(struct mlx4_dev *dev, int panic);
247int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt);
248int mlx4_SET_ICM_SIZE(struct mlx4_dev *dev, u64 icm_size, u64 *aux_pages);
249int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm);
250int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev);
251int mlx4_NOP(struct mlx4_dev *dev);
252int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg);
253void mlx4_opreq_action(struct work_struct *work);
254
255#endif
256