LXR linux/drivers/pinctrl/mvebu/pinctrl-armada-ap806.c

   1/*
   2 * Marvell Armada ap806 pinctrl driver based on mvebu pinctrl core
   3 *
   4 * Copyright (C) 2017 Marvell
   5 *
   6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   7 * Hanna Hawa <hannah@marvell.com>
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License as published by
  11 * the Free Software Foundation; either version 2 of the License, or
  12 * (at your option) any later version.
  13 */
  14
  15#include <linux/err.h>
  16#include <linux/init.h>
  17#include <linux/io.h>
  18#include <linux/platform_device.h>
  19#include <linux/of.h>
  20#include <linux/of_device.h>
  21#include <linux/pinctrl/pinctrl.h>
  22
  23#include "pinctrl-mvebu.h"
  24
  25static struct mvebu_mpp_mode armada_ap806_mpp_modes[] = {
  26        MPP_MODE(0,
  27                 MPP_FUNCTION(0, "gpio",    NULL),
  28                 MPP_FUNCTION(1, "sdio",    "clk"),
  29                 MPP_FUNCTION(3, "spi0",    "clk")),
  30        MPP_MODE(1,
  31                 MPP_FUNCTION(0, "gpio",    NULL),
  32                 MPP_FUNCTION(1, "sdio",    "cmd"),
  33                 MPP_FUNCTION(3, "spi0",    "miso")),
  34        MPP_MODE(2,
  35                 MPP_FUNCTION(0, "gpio",    NULL),
  36                 MPP_FUNCTION(1, "sdio",    "d0"),
  37                 MPP_FUNCTION(3, "spi0",    "mosi")),
  38        MPP_MODE(3,
  39                 MPP_FUNCTION(0, "gpio",    NULL),
  40                 MPP_FUNCTION(1, "sdio",    "d1"),
  41                 MPP_FUNCTION(3, "spi0",    "cs0n")),
  42        MPP_MODE(4,
  43                 MPP_FUNCTION(0, "gpio",    NULL),
  44                 MPP_FUNCTION(1, "sdio",    "d2"),
  45                 MPP_FUNCTION(3, "i2c0",    "sda")),
  46        MPP_MODE(5,
  47                 MPP_FUNCTION(0, "gpio",    NULL),
  48                 MPP_FUNCTION(1, "sdio",    "d3"),
  49                 MPP_FUNCTION(3, "i2c0",    "sdk")),
  50        MPP_MODE(6,
  51                 MPP_FUNCTION(0, "gpio",    NULL),
  52                 MPP_FUNCTION(1, "sdio",    "ds")),
  53        MPP_MODE(7,
  54                 MPP_FUNCTION(0, "gpio",    NULL),
  55                 MPP_FUNCTION(1, "sdio",    "d4"),
  56                 MPP_FUNCTION(3, "uart1",   "rxd")),
  57        MPP_MODE(8,
  58                 MPP_FUNCTION(0, "gpio",    NULL),
  59                 MPP_FUNCTION(1, "sdio",    "d5"),
  60                 MPP_FUNCTION(3, "uart1",   "txd")),
  61        MPP_MODE(9,
  62                 MPP_FUNCTION(0, "gpio",    NULL),
  63                 MPP_FUNCTION(1, "sdio",    "d6"),
  64                 MPP_FUNCTION(3, "spi0",    "cs1n")),
  65        MPP_MODE(10,
  66                 MPP_FUNCTION(0, "gpio",    NULL),
  67                 MPP_FUNCTION(1, "sdio",    "d7")),
  68        MPP_MODE(11,
  69                 MPP_FUNCTION(0, "gpio",    NULL),
  70                 MPP_FUNCTION(3, "uart0",   "txd")),
  71        MPP_MODE(12,
  72                 MPP_FUNCTION(0, "gpio",    NULL),
  73                 MPP_FUNCTION(1, "sdio",    "pw_off"),
  74                 MPP_FUNCTION(2, "sdio",    "hw_rst")),
  75        MPP_MODE(13,
  76                 MPP_FUNCTION(0, "gpio",    NULL)),
  77        MPP_MODE(14,
  78                 MPP_FUNCTION(0, "gpio",    NULL)),
  79        MPP_MODE(15,
  80                 MPP_FUNCTION(0, "gpio",    NULL)),
  81        MPP_MODE(16,
  82                 MPP_FUNCTION(0, "gpio",    NULL)),
  83        MPP_MODE(17,
  84                 MPP_FUNCTION(0, "gpio",    NULL)),
  85        MPP_MODE(18,
  86                 MPP_FUNCTION(0, "gpio",    NULL)),
  87        MPP_MODE(19,
  88                 MPP_FUNCTION(0, "gpio",    NULL),
  89                 MPP_FUNCTION(3, "uart0",   "rxd"),
  90                 MPP_FUNCTION(4, "sdio",    "pw_off")),
  91};
  92
  93static struct mvebu_pinctrl_soc_info armada_ap806_pinctrl_info;
  94
  95static const struct of_device_id armada_ap806_pinctrl_of_match[] = {
  96        {
  97                .compatible = "marvell,ap806-pinctrl",
  98        },
  99        { },
 100};
 101
 102static const struct mvebu_mpp_ctrl armada_ap806_mpp_controls[] = {
 103        MPP_FUNC_CTRL(0, 19, NULL, mvebu_regmap_mpp_ctrl),
 104};
 105
 106static struct pinctrl_gpio_range armada_ap806_mpp_gpio_ranges[] = {
 107        MPP_GPIO_RANGE(0,   0,  0, 20),
 108};
 109
 110static int armada_ap806_pinctrl_probe(struct platform_device *pdev)
 111{
 112        struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info;
 113        const struct of_device_id *match =
 114                of_match_device(armada_ap806_pinctrl_of_match, &pdev->dev);
 115
 116        if (!match || !pdev->dev.parent)
 117                return -ENODEV;
 118
 119        soc->variant = 0; /* no variants for Armada AP806 */
 120        soc->controls = armada_ap806_mpp_controls;
 121        soc->ncontrols = ARRAY_SIZE(armada_ap806_mpp_controls);
 122        soc->gpioranges = armada_ap806_mpp_gpio_ranges;
 123        soc->ngpioranges = ARRAY_SIZE(armada_ap806_mpp_gpio_ranges);
 124        soc->modes = armada_ap806_mpp_modes;
 125        soc->nmodes = armada_ap806_mpp_controls[0].npins;
 126
 127        pdev->dev.platform_data = soc;
 128
 129        return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
 130}
 131
 132static struct platform_driver armada_ap806_pinctrl_driver = {
 133        .driver = {
 134                .name = "armada-ap806-pinctrl",
 135                .of_match_table = of_match_ptr(armada_ap806_pinctrl_of_match),
 136        },
 137        .probe = armada_ap806_pinctrl_probe,
 138};
 139
 140builtin_platform_driver(armada_ap806_pinctrl_driver);
 141