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8
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/timer.h>
13#include <linux/delay.h>
14#include <linux/gfp.h>
15#include <linux/io.h>
16#include <linux/atomic.h>
17#include <asm/debug.h>
18#include <asm/qdio.h>
19#include <asm/ipl.h>
20
21#include "cio.h"
22#include "css.h"
23#include "device.h"
24#include "qdio.h"
25#include "qdio_debug.h"
26
27MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
28 "Jan Glauber <jang@linux.vnet.ibm.com>");
29MODULE_DESCRIPTION("QDIO base support");
30MODULE_LICENSE("GPL");
31
32static inline int do_siga_sync(unsigned long schid,
33 unsigned int out_mask, unsigned int in_mask,
34 unsigned int fc)
35{
36 register unsigned long __fc asm ("0") = fc;
37 register unsigned long __schid asm ("1") = schid;
38 register unsigned long out asm ("2") = out_mask;
39 register unsigned long in asm ("3") = in_mask;
40 int cc;
41
42 asm volatile(
43 " siga 0\n"
44 " ipm %0\n"
45 " srl %0,28\n"
46 : "=d" (cc)
47 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
48 return cc;
49}
50
51static inline int do_siga_input(unsigned long schid, unsigned int mask,
52 unsigned int fc)
53{
54 register unsigned long __fc asm ("0") = fc;
55 register unsigned long __schid asm ("1") = schid;
56 register unsigned long __mask asm ("2") = mask;
57 int cc;
58
59 asm volatile(
60 " siga 0\n"
61 " ipm %0\n"
62 " srl %0,28\n"
63 : "=d" (cc)
64 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
65 return cc;
66}
67
68
69
70
71
72
73
74
75
76
77
78static inline int do_siga_output(unsigned long schid, unsigned long mask,
79 unsigned int *bb, unsigned int fc,
80 unsigned long aob)
81{
82 register unsigned long __fc asm("0") = fc;
83 register unsigned long __schid asm("1") = schid;
84 register unsigned long __mask asm("2") = mask;
85 register unsigned long __aob asm("3") = aob;
86 int cc;
87
88 asm volatile(
89 " siga 0\n"
90 " ipm %0\n"
91 " srl %0,28\n"
92 : "=d" (cc), "+d" (__fc), "+d" (__aob)
93 : "d" (__schid), "d" (__mask)
94 : "cc");
95 *bb = __fc >> 31;
96 return cc;
97}
98
99static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
100{
101
102 if (ccq == 0 || ccq == 32)
103 return 0;
104
105 if (ccq == 97)
106 return 1;
107
108 if (ccq == 96)
109 return 2;
110
111 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
112 return -EIO;
113}
114
115
116
117
118
119
120
121
122
123
124
125
126static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
127 int start, int count, int auto_ack)
128{
129 int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
130 unsigned int ccq = 0;
131
132 qperf_inc(q, eqbs);
133
134 if (!q->is_input_q)
135 nr += q->irq_ptr->nr_input_qs;
136again:
137 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
138 auto_ack);
139 rc = qdio_check_ccq(q, ccq);
140 if (!rc)
141 return count - tmp_count;
142
143 if (rc == 1) {
144 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
145 goto again;
146 }
147
148 if (rc == 2) {
149 qperf_inc(q, eqbs_partial);
150 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
151 tmp_count);
152
153
154
155
156 if (!retried++)
157 goto again;
158 else
159 return count - tmp_count;
160 }
161
162 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
163 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
164 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
165 q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
166 return 0;
167}
168
169
170
171
172
173
174
175
176
177
178
179
180static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
181 int count)
182{
183 unsigned int ccq = 0;
184 int tmp_count = count, tmp_start = start;
185 int nr = q->nr;
186 int rc;
187
188 if (!count)
189 return 0;
190 qperf_inc(q, sqbs);
191
192 if (!q->is_input_q)
193 nr += q->irq_ptr->nr_input_qs;
194again:
195 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
196 rc = qdio_check_ccq(q, ccq);
197 if (!rc) {
198 WARN_ON_ONCE(tmp_count);
199 return count - tmp_count;
200 }
201
202 if (rc == 1 || rc == 2) {
203 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
204 qperf_inc(q, sqbs_partial);
205 goto again;
206 }
207
208 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
209 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
210 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
211 q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
212 return 0;
213}
214
215
216static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
217 unsigned char *state, unsigned int count,
218 int auto_ack, int merge_pending)
219{
220 unsigned char __state = 0;
221 int i;
222
223 if (is_qebsm(q))
224 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
225
226 for (i = 0; i < count; i++) {
227 if (!__state) {
228 __state = q->slsb.val[bufnr];
229 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
230 __state = SLSB_P_OUTPUT_EMPTY;
231 } else if (merge_pending) {
232 if ((q->slsb.val[bufnr] & __state) != __state)
233 break;
234 } else if (q->slsb.val[bufnr] != __state)
235 break;
236 bufnr = next_buf(bufnr);
237 }
238 *state = __state;
239 return i;
240}
241
242static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
243 unsigned char *state, int auto_ack)
244{
245 return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
246}
247
248
249static inline int set_buf_states(struct qdio_q *q, int bufnr,
250 unsigned char state, int count)
251{
252 int i;
253
254 if (is_qebsm(q))
255 return qdio_do_sqbs(q, state, bufnr, count);
256
257 for (i = 0; i < count; i++) {
258 xchg(&q->slsb.val[bufnr], state);
259 bufnr = next_buf(bufnr);
260 }
261 return count;
262}
263
264static inline int set_buf_state(struct qdio_q *q, int bufnr,
265 unsigned char state)
266{
267 return set_buf_states(q, bufnr, state, 1);
268}
269
270
271static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
272{
273 struct qdio_q *q;
274 int i;
275
276 for_each_input_queue(irq_ptr, q, i)
277 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
278 QDIO_MAX_BUFFERS_PER_Q);
279 for_each_output_queue(irq_ptr, q, i)
280 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
281 QDIO_MAX_BUFFERS_PER_Q);
282}
283
284static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
285 unsigned int input)
286{
287 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
288 unsigned int fc = QDIO_SIGA_SYNC;
289 int cc;
290
291 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
292 qperf_inc(q, siga_sync);
293
294 if (is_qebsm(q)) {
295 schid = q->irq_ptr->sch_token;
296 fc |= QDIO_SIGA_QEBSM_FLAG;
297 }
298
299 cc = do_siga_sync(schid, output, input, fc);
300 if (unlikely(cc))
301 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
302 return (cc) ? -EIO : 0;
303}
304
305static inline int qdio_siga_sync_q(struct qdio_q *q)
306{
307 if (q->is_input_q)
308 return qdio_siga_sync(q, 0, q->mask);
309 else
310 return qdio_siga_sync(q, q->mask, 0);
311}
312
313static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
314 unsigned long aob)
315{
316 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
317 unsigned int fc = QDIO_SIGA_WRITE;
318 u64 start_time = 0;
319 int retries = 0, cc;
320 unsigned long laob = 0;
321
322 WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
323 !q->u.out.use_cq));
324 if (q->u.out.use_cq && aob != 0) {
325 fc = QDIO_SIGA_WRITEQ;
326 laob = aob;
327 }
328
329 if (is_qebsm(q)) {
330 schid = q->irq_ptr->sch_token;
331 fc |= QDIO_SIGA_QEBSM_FLAG;
332 }
333again:
334 cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
335
336
337 if (unlikely(*busy_bit)) {
338 retries++;
339
340 if (!start_time) {
341 start_time = get_tod_clock_fast();
342 goto again;
343 }
344 if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
345 goto again;
346 }
347 if (retries) {
348 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
349 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
350 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
351 }
352 return cc;
353}
354
355static inline int qdio_siga_input(struct qdio_q *q)
356{
357 unsigned long schid = *((u32 *) &q->irq_ptr->schid);
358 unsigned int fc = QDIO_SIGA_READ;
359 int cc;
360
361 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
362 qperf_inc(q, siga_read);
363
364 if (is_qebsm(q)) {
365 schid = q->irq_ptr->sch_token;
366 fc |= QDIO_SIGA_QEBSM_FLAG;
367 }
368
369 cc = do_siga_input(schid, q->mask, fc);
370 if (unlikely(cc))
371 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
372 return (cc) ? -EIO : 0;
373}
374
375#define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
376#define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
377
378static inline void qdio_sync_queues(struct qdio_q *q)
379{
380
381 if (pci_out_supported(q))
382 qdio_siga_sync_all(q);
383 else
384 qdio_siga_sync_q(q);
385}
386
387int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
388 unsigned char *state)
389{
390 if (need_siga_sync(q))
391 qdio_siga_sync_q(q);
392 return get_buf_states(q, bufnr, state, 1, 0, 0);
393}
394
395static inline void qdio_stop_polling(struct qdio_q *q)
396{
397 if (!q->u.in.polling)
398 return;
399
400 q->u.in.polling = 0;
401 qperf_inc(q, stop_polling);
402
403
404 if (is_qebsm(q)) {
405 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
406 q->u.in.ack_count);
407 q->u.in.ack_count = 0;
408 } else
409 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
410}
411
412static inline void account_sbals(struct qdio_q *q, unsigned int count)
413{
414 int pos;
415
416 q->q_stats.nr_sbal_total += count;
417 if (count == QDIO_MAX_BUFFERS_MASK) {
418 q->q_stats.nr_sbals[7]++;
419 return;
420 }
421 pos = ilog2(count);
422 q->q_stats.nr_sbals[pos]++;
423}
424
425static void process_buffer_error(struct qdio_q *q, int count)
426{
427 unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
428 SLSB_P_OUTPUT_NOT_INIT;
429
430 q->qdio_error = QDIO_ERROR_SLSB_STATE;
431
432
433 if ((!q->is_input_q &&
434 (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
435 qperf_inc(q, target_full);
436 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
437 q->first_to_check);
438 goto set;
439 }
440
441 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
442 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
443 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
444 DBF_ERROR("F14:%2x F15:%2x",
445 q->sbal[q->first_to_check]->element[14].sflags,
446 q->sbal[q->first_to_check]->element[15].sflags);
447
448set:
449
450
451
452
453 set_buf_states(q, q->first_to_check, state, count);
454}
455
456static inline void inbound_primed(struct qdio_q *q, int count)
457{
458 int new;
459
460 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, count);
461
462
463 if (is_qebsm(q)) {
464 if (!q->u.in.polling) {
465 q->u.in.polling = 1;
466 q->u.in.ack_count = count;
467 q->u.in.ack_start = q->first_to_check;
468 return;
469 }
470
471
472 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
473 q->u.in.ack_count);
474 q->u.in.ack_count = count;
475 q->u.in.ack_start = q->first_to_check;
476 return;
477 }
478
479
480
481
482
483 new = add_buf(q->first_to_check, count - 1);
484 if (q->u.in.polling) {
485
486 set_buf_state(q, new, SLSB_P_INPUT_ACK);
487 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
488 } else {
489 q->u.in.polling = 1;
490 set_buf_state(q, new, SLSB_P_INPUT_ACK);
491 }
492
493 q->u.in.ack_start = new;
494 count--;
495 if (!count)
496 return;
497
498 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
499}
500
501static int get_inbound_buffer_frontier(struct qdio_q *q)
502{
503 int count, stop;
504 unsigned char state = 0;
505
506 q->timestamp = get_tod_clock_fast();
507
508
509
510
511
512 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
513 stop = add_buf(q->first_to_check, count);
514
515 if (q->first_to_check == stop)
516 goto out;
517
518
519
520
521
522 count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
523 if (!count)
524 goto out;
525
526 switch (state) {
527 case SLSB_P_INPUT_PRIMED:
528 inbound_primed(q, count);
529 q->first_to_check = add_buf(q->first_to_check, count);
530 if (atomic_sub_return(count, &q->nr_buf_used) == 0)
531 qperf_inc(q, inbound_queue_full);
532 if (q->irq_ptr->perf_stat_enabled)
533 account_sbals(q, count);
534 break;
535 case SLSB_P_INPUT_ERROR:
536 process_buffer_error(q, count);
537 q->first_to_check = add_buf(q->first_to_check, count);
538 atomic_sub(count, &q->nr_buf_used);
539 if (q->irq_ptr->perf_stat_enabled)
540 account_sbals_error(q, count);
541 break;
542 case SLSB_CU_INPUT_EMPTY:
543 case SLSB_P_INPUT_NOT_INIT:
544 case SLSB_P_INPUT_ACK:
545 if (q->irq_ptr->perf_stat_enabled)
546 q->q_stats.nr_sbal_nop++;
547 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
548 q->nr, q->first_to_check);
549 break;
550 default:
551 WARN_ON_ONCE(1);
552 }
553out:
554 return q->first_to_check;
555}
556
557static int qdio_inbound_q_moved(struct qdio_q *q)
558{
559 int bufnr;
560
561 bufnr = get_inbound_buffer_frontier(q);
562
563 if (bufnr != q->last_move) {
564 q->last_move = bufnr;
565 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
566 q->u.in.timestamp = get_tod_clock();
567 return 1;
568 } else
569 return 0;
570}
571
572static inline int qdio_inbound_q_done(struct qdio_q *q)
573{
574 unsigned char state = 0;
575
576 if (!atomic_read(&q->nr_buf_used))
577 return 1;
578
579 if (need_siga_sync(q))
580 qdio_siga_sync_q(q);
581 get_buf_state(q, q->first_to_check, &state, 0);
582
583 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
584
585 return 0;
586
587 if (is_thinint_irq(q->irq_ptr))
588 return 1;
589
590
591 if (MACHINE_IS_VM)
592 return 1;
593
594
595
596
597
598 if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
599 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
600 q->first_to_check);
601 return 1;
602 } else
603 return 0;
604}
605
606static inline int contains_aobs(struct qdio_q *q)
607{
608 return !q->is_input_q && q->u.out.use_cq;
609}
610
611static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
612{
613 unsigned char state = 0;
614 int j, b = start;
615
616 if (!contains_aobs(q))
617 return;
618
619 for (j = 0; j < count; ++j) {
620 get_buf_state(q, b, &state, 0);
621 if (state == SLSB_P_OUTPUT_PENDING) {
622 struct qaob *aob = q->u.out.aobs[b];
623 if (aob == NULL)
624 continue;
625
626 q->u.out.sbal_state[b].flags |=
627 QDIO_OUTBUF_STATE_FLAG_PENDING;
628 q->u.out.aobs[b] = NULL;
629 } else if (state == SLSB_P_OUTPUT_EMPTY) {
630 q->u.out.sbal_state[b].aob = NULL;
631 }
632 b = next_buf(b);
633 }
634}
635
636static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
637 int bufnr)
638{
639 unsigned long phys_aob = 0;
640
641 if (!q->use_cq)
642 goto out;
643
644 if (!q->aobs[bufnr]) {
645 struct qaob *aob = qdio_allocate_aob();
646 q->aobs[bufnr] = aob;
647 }
648 if (q->aobs[bufnr]) {
649 q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
650 q->sbal_state[bufnr].aob = q->aobs[bufnr];
651 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
652 phys_aob = virt_to_phys(q->aobs[bufnr]);
653 WARN_ON_ONCE(phys_aob & 0xFF);
654 }
655
656out:
657 return phys_aob;
658}
659
660static void qdio_kick_handler(struct qdio_q *q)
661{
662 int start = q->first_to_kick;
663 int end = q->first_to_check;
664 int count;
665
666 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
667 return;
668
669 count = sub_buf(end, start);
670
671 if (q->is_input_q) {
672 qperf_inc(q, inbound_handler);
673 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
674 } else {
675 qperf_inc(q, outbound_handler);
676 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
677 start, count);
678 }
679
680 qdio_handle_aobs(q, start, count);
681
682 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
683 q->irq_ptr->int_parm);
684
685
686 q->first_to_kick = end;
687 q->qdio_error = 0;
688}
689
690static inline int qdio_tasklet_schedule(struct qdio_q *q)
691{
692 if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
693 tasklet_schedule(&q->tasklet);
694 return 0;
695 }
696 return -EPERM;
697}
698
699static void __qdio_inbound_processing(struct qdio_q *q)
700{
701 qperf_inc(q, tasklet_inbound);
702
703 if (!qdio_inbound_q_moved(q))
704 return;
705
706 qdio_kick_handler(q);
707
708 if (!qdio_inbound_q_done(q)) {
709
710 qperf_inc(q, tasklet_inbound_resched);
711 if (!qdio_tasklet_schedule(q))
712 return;
713 }
714
715 qdio_stop_polling(q);
716
717
718
719
720 if (!qdio_inbound_q_done(q)) {
721 qperf_inc(q, tasklet_inbound_resched2);
722 qdio_tasklet_schedule(q);
723 }
724}
725
726void qdio_inbound_processing(unsigned long data)
727{
728 struct qdio_q *q = (struct qdio_q *)data;
729 __qdio_inbound_processing(q);
730}
731
732static int get_outbound_buffer_frontier(struct qdio_q *q)
733{
734 int count, stop;
735 unsigned char state = 0;
736
737 q->timestamp = get_tod_clock_fast();
738
739 if (need_siga_sync(q))
740 if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
741 !pci_out_supported(q)) ||
742 (queue_type(q) == QDIO_IQDIO_QFMT &&
743 multicast_outbound(q)))
744 qdio_siga_sync_q(q);
745
746
747
748
749
750 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
751 stop = add_buf(q->first_to_check, count);
752 if (q->first_to_check == stop)
753 goto out;
754
755 count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
756 if (!count)
757 goto out;
758
759 switch (state) {
760 case SLSB_P_OUTPUT_EMPTY:
761
762 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
763 "out empty:%1d %02x", q->nr, count);
764
765 atomic_sub(count, &q->nr_buf_used);
766 q->first_to_check = add_buf(q->first_to_check, count);
767 if (q->irq_ptr->perf_stat_enabled)
768 account_sbals(q, count);
769
770 break;
771 case SLSB_P_OUTPUT_ERROR:
772 process_buffer_error(q, count);
773 q->first_to_check = add_buf(q->first_to_check, count);
774 atomic_sub(count, &q->nr_buf_used);
775 if (q->irq_ptr->perf_stat_enabled)
776 account_sbals_error(q, count);
777 break;
778 case SLSB_CU_OUTPUT_PRIMED:
779
780 if (q->irq_ptr->perf_stat_enabled)
781 q->q_stats.nr_sbal_nop++;
782 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
783 q->nr);
784 break;
785 case SLSB_P_OUTPUT_NOT_INIT:
786 case SLSB_P_OUTPUT_HALTED:
787 break;
788 default:
789 WARN_ON_ONCE(1);
790 }
791
792out:
793 return q->first_to_check;
794}
795
796
797static inline int qdio_outbound_q_done(struct qdio_q *q)
798{
799 return atomic_read(&q->nr_buf_used) == 0;
800}
801
802static inline int qdio_outbound_q_moved(struct qdio_q *q)
803{
804 int bufnr;
805
806 bufnr = get_outbound_buffer_frontier(q);
807
808 if (bufnr != q->last_move) {
809 q->last_move = bufnr;
810 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
811 return 1;
812 } else
813 return 0;
814}
815
816static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
817{
818 int retries = 0, cc;
819 unsigned int busy_bit;
820
821 if (!need_siga_out(q))
822 return 0;
823
824 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
825retry:
826 qperf_inc(q, siga_write);
827
828 cc = qdio_siga_output(q, &busy_bit, aob);
829 switch (cc) {
830 case 0:
831 break;
832 case 2:
833 if (busy_bit) {
834 while (++retries < QDIO_BUSY_BIT_RETRIES) {
835 mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
836 goto retry;
837 }
838 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
839 cc = -EBUSY;
840 } else {
841 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
842 cc = -ENOBUFS;
843 }
844 break;
845 case 1:
846 case 3:
847 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
848 cc = -EIO;
849 break;
850 }
851 if (retries) {
852 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
853 DBF_ERROR("count:%u", retries);
854 }
855 return cc;
856}
857
858static void __qdio_outbound_processing(struct qdio_q *q)
859{
860 qperf_inc(q, tasklet_outbound);
861 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
862
863 if (qdio_outbound_q_moved(q))
864 qdio_kick_handler(q);
865
866 if (queue_type(q) == QDIO_ZFCP_QFMT)
867 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
868 goto sched;
869
870 if (q->u.out.pci_out_enabled)
871 return;
872
873
874
875
876
877
878 if (qdio_outbound_q_done(q))
879 del_timer_sync(&q->u.out.timer);
880 else
881 if (!timer_pending(&q->u.out.timer) &&
882 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
883 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
884 return;
885
886sched:
887 qdio_tasklet_schedule(q);
888}
889
890
891void qdio_outbound_processing(unsigned long data)
892{
893 struct qdio_q *q = (struct qdio_q *)data;
894 __qdio_outbound_processing(q);
895}
896
897void qdio_outbound_timer(unsigned long data)
898{
899 struct qdio_q *q = (struct qdio_q *)data;
900
901 qdio_tasklet_schedule(q);
902}
903
904static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
905{
906 struct qdio_q *out;
907 int i;
908
909 if (!pci_out_supported(q))
910 return;
911
912 for_each_output_queue(q->irq_ptr, out, i)
913 if (!qdio_outbound_q_done(out))
914 qdio_tasklet_schedule(out);
915}
916
917static void __tiqdio_inbound_processing(struct qdio_q *q)
918{
919 qperf_inc(q, tasklet_inbound);
920 if (need_siga_sync(q) && need_siga_sync_after_ai(q))
921 qdio_sync_queues(q);
922
923
924
925
926
927 qdio_check_outbound_after_thinint(q);
928
929 if (!qdio_inbound_q_moved(q))
930 return;
931
932 qdio_kick_handler(q);
933
934 if (!qdio_inbound_q_done(q)) {
935 qperf_inc(q, tasklet_inbound_resched);
936 if (!qdio_tasklet_schedule(q))
937 return;
938 }
939
940 qdio_stop_polling(q);
941
942
943
944
945 if (!qdio_inbound_q_done(q)) {
946 qperf_inc(q, tasklet_inbound_resched2);
947 qdio_tasklet_schedule(q);
948 }
949}
950
951void tiqdio_inbound_processing(unsigned long data)
952{
953 struct qdio_q *q = (struct qdio_q *)data;
954 __tiqdio_inbound_processing(q);
955}
956
957static inline void qdio_set_state(struct qdio_irq *irq_ptr,
958 enum qdio_irq_states state)
959{
960 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
961
962 irq_ptr->state = state;
963 mb();
964}
965
966static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
967{
968 if (irb->esw.esw0.erw.cons) {
969 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
970 DBF_ERROR_HEX(irb, 64);
971 DBF_ERROR_HEX(irb->ecw, 64);
972 }
973}
974
975
976static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
977{
978 int i;
979 struct qdio_q *q;
980
981 if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
982 return;
983
984 for_each_input_queue(irq_ptr, q, i) {
985 if (q->u.in.queue_start_poll) {
986
987 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
988 &q->u.in.queue_irq_state)) {
989 qperf_inc(q, int_discarded);
990 continue;
991 }
992 q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
993 q->irq_ptr->int_parm);
994 } else {
995 tasklet_schedule(&q->tasklet);
996 }
997 }
998
999 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
1000 return;
1001
1002 for_each_output_queue(irq_ptr, q, i) {
1003 if (qdio_outbound_q_done(q))
1004 continue;
1005 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
1006 qdio_siga_sync_q(q);
1007 qdio_tasklet_schedule(q);
1008 }
1009}
1010
1011static void qdio_handle_activate_check(struct ccw_device *cdev,
1012 unsigned long intparm, int cstat, int dstat)
1013{
1014 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1015 struct qdio_q *q;
1016 int count;
1017
1018 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
1019 DBF_ERROR("intp :%lx", intparm);
1020 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1021
1022 if (irq_ptr->nr_input_qs) {
1023 q = irq_ptr->input_qs[0];
1024 } else if (irq_ptr->nr_output_qs) {
1025 q = irq_ptr->output_qs[0];
1026 } else {
1027 dump_stack();
1028 goto no_handler;
1029 }
1030
1031 count = sub_buf(q->first_to_check, q->first_to_kick);
1032 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
1033 q->nr, q->first_to_kick, count, irq_ptr->int_parm);
1034no_handler:
1035 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1036
1037
1038
1039
1040 lgr_info_log();
1041}
1042
1043static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
1044 int dstat)
1045{
1046 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1047
1048 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
1049
1050 if (cstat)
1051 goto error;
1052 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
1053 goto error;
1054 if (!(dstat & DEV_STAT_DEV_END))
1055 goto error;
1056 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
1057 return;
1058
1059error:
1060 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
1061 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1062 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1063}
1064
1065
1066void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
1067 struct irb *irb)
1068{
1069 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1070 struct subchannel_id schid;
1071 int cstat, dstat;
1072
1073 if (!intparm || !irq_ptr) {
1074 ccw_device_get_schid(cdev, &schid);
1075 DBF_ERROR("qint:%4x", schid.sch_no);
1076 return;
1077 }
1078
1079 if (irq_ptr->perf_stat_enabled)
1080 irq_ptr->perf_stat.qdio_int++;
1081
1082 if (IS_ERR(irb)) {
1083 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
1084 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1085 wake_up(&cdev->private->wait_q);
1086 return;
1087 }
1088 qdio_irq_check_sense(irq_ptr, irb);
1089 cstat = irb->scsw.cmd.cstat;
1090 dstat = irb->scsw.cmd.dstat;
1091
1092 switch (irq_ptr->state) {
1093 case QDIO_IRQ_STATE_INACTIVE:
1094 qdio_establish_handle_irq(cdev, cstat, dstat);
1095 break;
1096 case QDIO_IRQ_STATE_CLEANUP:
1097 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1098 break;
1099 case QDIO_IRQ_STATE_ESTABLISHED:
1100 case QDIO_IRQ_STATE_ACTIVE:
1101 if (cstat & SCHN_STAT_PCI) {
1102 qdio_int_handler_pci(irq_ptr);
1103 return;
1104 }
1105 if (cstat || dstat)
1106 qdio_handle_activate_check(cdev, intparm, cstat,
1107 dstat);
1108 break;
1109 case QDIO_IRQ_STATE_STOPPED:
1110 break;
1111 default:
1112 WARN_ON_ONCE(1);
1113 }
1114 wake_up(&cdev->private->wait_q);
1115}
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125int qdio_get_ssqd_desc(struct ccw_device *cdev,
1126 struct qdio_ssqd_desc *data)
1127{
1128 struct subchannel_id schid;
1129
1130 if (!cdev || !cdev->private)
1131 return -EINVAL;
1132
1133 ccw_device_get_schid(cdev, &schid);
1134 DBF_EVENT("get ssqd:%4x", schid.sch_no);
1135 return qdio_setup_get_ssqd(NULL, &schid, data);
1136}
1137EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1138
1139static void qdio_shutdown_queues(struct ccw_device *cdev)
1140{
1141 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1142 struct qdio_q *q;
1143 int i;
1144
1145 for_each_input_queue(irq_ptr, q, i)
1146 tasklet_kill(&q->tasklet);
1147
1148 for_each_output_queue(irq_ptr, q, i) {
1149 del_timer_sync(&q->u.out.timer);
1150 tasklet_kill(&q->tasklet);
1151 }
1152}
1153
1154
1155
1156
1157
1158
1159int qdio_shutdown(struct ccw_device *cdev, int how)
1160{
1161 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1162 struct subchannel_id schid;
1163 int rc;
1164
1165 if (!irq_ptr)
1166 return -ENODEV;
1167
1168 WARN_ON_ONCE(irqs_disabled());
1169 ccw_device_get_schid(cdev, &schid);
1170 DBF_EVENT("qshutdown:%4x", schid.sch_no);
1171
1172 mutex_lock(&irq_ptr->setup_mutex);
1173
1174
1175
1176
1177 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1178 mutex_unlock(&irq_ptr->setup_mutex);
1179 return 0;
1180 }
1181
1182
1183
1184
1185
1186 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1187
1188 tiqdio_remove_input_queues(irq_ptr);
1189 qdio_shutdown_queues(cdev);
1190 qdio_shutdown_debug_entries(irq_ptr);
1191
1192
1193 spin_lock_irq(get_ccwdev_lock(cdev));
1194
1195 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1196 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1197 else
1198
1199 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1200 if (rc) {
1201 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1202 DBF_ERROR("rc:%4d", rc);
1203 goto no_cleanup;
1204 }
1205
1206 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1207 spin_unlock_irq(get_ccwdev_lock(cdev));
1208 wait_event_interruptible_timeout(cdev->private->wait_q,
1209 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1210 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1211 10 * HZ);
1212 spin_lock_irq(get_ccwdev_lock(cdev));
1213
1214no_cleanup:
1215 qdio_shutdown_thinint(irq_ptr);
1216
1217
1218 if ((void *)cdev->handler == (void *)qdio_int_handler)
1219 cdev->handler = irq_ptr->orig_handler;
1220 spin_unlock_irq(get_ccwdev_lock(cdev));
1221
1222 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1223 mutex_unlock(&irq_ptr->setup_mutex);
1224 if (rc)
1225 return rc;
1226 return 0;
1227}
1228EXPORT_SYMBOL_GPL(qdio_shutdown);
1229
1230
1231
1232
1233
1234int qdio_free(struct ccw_device *cdev)
1235{
1236 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1237 struct subchannel_id schid;
1238
1239 if (!irq_ptr)
1240 return -ENODEV;
1241
1242 ccw_device_get_schid(cdev, &schid);
1243 DBF_EVENT("qfree:%4x", schid.sch_no);
1244 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
1245 mutex_lock(&irq_ptr->setup_mutex);
1246
1247 irq_ptr->debug_area = NULL;
1248 cdev->private->qdio_data = NULL;
1249 mutex_unlock(&irq_ptr->setup_mutex);
1250
1251 qdio_release_memory(irq_ptr);
1252 return 0;
1253}
1254EXPORT_SYMBOL_GPL(qdio_free);
1255
1256
1257
1258
1259
1260int qdio_allocate(struct qdio_initialize *init_data)
1261{
1262 struct subchannel_id schid;
1263 struct qdio_irq *irq_ptr;
1264
1265 ccw_device_get_schid(init_data->cdev, &schid);
1266 DBF_EVENT("qallocate:%4x", schid.sch_no);
1267
1268 if ((init_data->no_input_qs && !init_data->input_handler) ||
1269 (init_data->no_output_qs && !init_data->output_handler))
1270 return -EINVAL;
1271
1272 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1273 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1274 return -EINVAL;
1275
1276 if ((!init_data->input_sbal_addr_array) ||
1277 (!init_data->output_sbal_addr_array))
1278 return -EINVAL;
1279
1280
1281 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1282 if (!irq_ptr)
1283 goto out_err;
1284
1285 mutex_init(&irq_ptr->setup_mutex);
1286 if (qdio_allocate_dbf(init_data, irq_ptr))
1287 goto out_rel;
1288
1289
1290
1291
1292
1293
1294
1295 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1296 if (!irq_ptr->chsc_page)
1297 goto out_rel;
1298
1299
1300 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1301 if (!irq_ptr->qdr)
1302 goto out_rel;
1303
1304 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1305 init_data->no_output_qs))
1306 goto out_rel;
1307
1308 init_data->cdev->private->qdio_data = irq_ptr;
1309 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1310 return 0;
1311out_rel:
1312 qdio_release_memory(irq_ptr);
1313out_err:
1314 return -ENOMEM;
1315}
1316EXPORT_SYMBOL_GPL(qdio_allocate);
1317
1318static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
1319{
1320 struct qdio_q *q = irq_ptr->input_qs[0];
1321 int i, use_cq = 0;
1322
1323 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
1324 use_cq = 1;
1325
1326 for_each_output_queue(irq_ptr, q, i) {
1327 if (use_cq) {
1328 if (qdio_enable_async_operation(&q->u.out) < 0) {
1329 use_cq = 0;
1330 continue;
1331 }
1332 } else
1333 qdio_disable_async_operation(&q->u.out);
1334 }
1335 DBF_EVENT("use_cq:%d", use_cq);
1336}
1337
1338
1339
1340
1341
1342int qdio_establish(struct qdio_initialize *init_data)
1343{
1344 struct ccw_device *cdev = init_data->cdev;
1345 struct subchannel_id schid;
1346 struct qdio_irq *irq_ptr;
1347 int rc;
1348
1349 ccw_device_get_schid(cdev, &schid);
1350 DBF_EVENT("qestablish:%4x", schid.sch_no);
1351
1352 irq_ptr = cdev->private->qdio_data;
1353 if (!irq_ptr)
1354 return -ENODEV;
1355
1356 mutex_lock(&irq_ptr->setup_mutex);
1357 qdio_setup_irq(init_data);
1358
1359 rc = qdio_establish_thinint(irq_ptr);
1360 if (rc) {
1361 mutex_unlock(&irq_ptr->setup_mutex);
1362 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1363 return rc;
1364 }
1365
1366
1367 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1368 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1369 irq_ptr->ccw.count = irq_ptr->equeue.count;
1370 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1371
1372 spin_lock_irq(get_ccwdev_lock(cdev));
1373 ccw_device_set_options_mask(cdev, 0);
1374
1375 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1376 spin_unlock_irq(get_ccwdev_lock(cdev));
1377 if (rc) {
1378 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1379 DBF_ERROR("rc:%4x", rc);
1380 mutex_unlock(&irq_ptr->setup_mutex);
1381 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1382 return rc;
1383 }
1384
1385 wait_event_interruptible_timeout(cdev->private->wait_q,
1386 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1387 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1388
1389 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1390 mutex_unlock(&irq_ptr->setup_mutex);
1391 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1392 return -EIO;
1393 }
1394
1395 qdio_setup_ssqd_info(irq_ptr);
1396
1397 qdio_detect_hsicq(irq_ptr);
1398
1399
1400 qdio_init_buf_states(irq_ptr);
1401
1402 mutex_unlock(&irq_ptr->setup_mutex);
1403 qdio_print_subchannel_info(irq_ptr, cdev);
1404 qdio_setup_debug_entries(irq_ptr, cdev);
1405 return 0;
1406}
1407EXPORT_SYMBOL_GPL(qdio_establish);
1408
1409
1410
1411
1412
1413int qdio_activate(struct ccw_device *cdev)
1414{
1415 struct subchannel_id schid;
1416 struct qdio_irq *irq_ptr;
1417 int rc;
1418
1419 ccw_device_get_schid(cdev, &schid);
1420 DBF_EVENT("qactivate:%4x", schid.sch_no);
1421
1422 irq_ptr = cdev->private->qdio_data;
1423 if (!irq_ptr)
1424 return -ENODEV;
1425
1426 mutex_lock(&irq_ptr->setup_mutex);
1427 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1428 rc = -EBUSY;
1429 goto out;
1430 }
1431
1432 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1433 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1434 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1435 irq_ptr->ccw.cda = 0;
1436
1437 spin_lock_irq(get_ccwdev_lock(cdev));
1438 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1439
1440 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1441 0, DOIO_DENY_PREFETCH);
1442 spin_unlock_irq(get_ccwdev_lock(cdev));
1443 if (rc) {
1444 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1445 DBF_ERROR("rc:%4x", rc);
1446 goto out;
1447 }
1448
1449 if (is_thinint_irq(irq_ptr))
1450 tiqdio_add_input_queues(irq_ptr);
1451
1452
1453 msleep(5);
1454
1455 switch (irq_ptr->state) {
1456 case QDIO_IRQ_STATE_STOPPED:
1457 case QDIO_IRQ_STATE_ERR:
1458 rc = -EIO;
1459 break;
1460 default:
1461 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1462 rc = 0;
1463 }
1464out:
1465 mutex_unlock(&irq_ptr->setup_mutex);
1466 return rc;
1467}
1468EXPORT_SYMBOL_GPL(qdio_activate);
1469
1470static inline int buf_in_between(int bufnr, int start, int count)
1471{
1472 int end = add_buf(start, count);
1473
1474 if (end > start) {
1475 if (bufnr >= start && bufnr < end)
1476 return 1;
1477 else
1478 return 0;
1479 }
1480
1481
1482 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1483 (bufnr < end))
1484 return 1;
1485 else
1486 return 0;
1487}
1488
1489
1490
1491
1492
1493
1494
1495
1496static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1497 int bufnr, int count)
1498{
1499 int diff;
1500
1501 qperf_inc(q, inbound_call);
1502
1503 if (!q->u.in.polling)
1504 goto set;
1505
1506
1507 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1508
1509 q->u.in.polling = 0;
1510 q->u.in.ack_count = 0;
1511 goto set;
1512 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
1513 if (is_qebsm(q)) {
1514
1515 diff = add_buf(bufnr, count);
1516 diff = sub_buf(diff, q->u.in.ack_start);
1517 q->u.in.ack_count -= diff;
1518 if (q->u.in.ack_count <= 0) {
1519 q->u.in.polling = 0;
1520 q->u.in.ack_count = 0;
1521 goto set;
1522 }
1523 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
1524 }
1525 else
1526
1527 q->u.in.polling = 0;
1528 }
1529
1530set:
1531 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1532 atomic_add(count, &q->nr_buf_used);
1533
1534 if (need_siga_in(q))
1535 return qdio_siga_input(q);
1536
1537 return 0;
1538}
1539
1540
1541
1542
1543
1544
1545
1546
1547static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1548 int bufnr, int count)
1549{
1550 unsigned char state = 0;
1551 int used, rc = 0;
1552
1553 qperf_inc(q, outbound_call);
1554
1555 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1556 used = atomic_add_return(count, &q->nr_buf_used);
1557
1558 if (used == QDIO_MAX_BUFFERS_PER_Q)
1559 qperf_inc(q, outbound_queue_full);
1560
1561 if (callflags & QDIO_FLAG_PCI_OUT) {
1562 q->u.out.pci_out_enabled = 1;
1563 qperf_inc(q, pci_request_int);
1564 } else
1565 q->u.out.pci_out_enabled = 0;
1566
1567 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1568 unsigned long phys_aob = 0;
1569
1570
1571 WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
1572
1573 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
1574
1575 rc = qdio_kick_outbound_q(q, phys_aob);
1576 } else if (need_siga_sync(q)) {
1577 rc = qdio_siga_sync_q(q);
1578 } else {
1579
1580 get_buf_state(q, prev_buf(bufnr), &state, 0);
1581 if (state != SLSB_CU_OUTPUT_PRIMED)
1582 rc = qdio_kick_outbound_q(q, 0);
1583 else
1584 qperf_inc(q, fast_requeue);
1585 }
1586
1587
1588 if (used >= q->u.out.scan_threshold || rc)
1589 qdio_tasklet_schedule(q);
1590 else
1591
1592 if (!timer_pending(&q->u.out.timer) &&
1593 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
1594 mod_timer(&q->u.out.timer, jiffies + HZ);
1595 return rc;
1596}
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1607 int q_nr, unsigned int bufnr, unsigned int count)
1608{
1609 struct qdio_irq *irq_ptr;
1610
1611 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1612 return -EINVAL;
1613
1614 irq_ptr = cdev->private->qdio_data;
1615 if (!irq_ptr)
1616 return -ENODEV;
1617
1618 DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1619 "do%02x b:%02x c:%02x", callflags, bufnr, count);
1620
1621 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1622 return -EIO;
1623 if (!count)
1624 return 0;
1625 if (callflags & QDIO_FLAG_SYNC_INPUT)
1626 return handle_inbound(irq_ptr->input_qs[q_nr],
1627 callflags, bufnr, count);
1628 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1629 return handle_outbound(irq_ptr->output_qs[q_nr],
1630 callflags, bufnr, count);
1631 return -EINVAL;
1632}
1633EXPORT_SYMBOL_GPL(do_QDIO);
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644int qdio_start_irq(struct ccw_device *cdev, int nr)
1645{
1646 struct qdio_q *q;
1647 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1648
1649 if (!irq_ptr)
1650 return -ENODEV;
1651 q = irq_ptr->input_qs[nr];
1652
1653 clear_nonshared_ind(irq_ptr);
1654 qdio_stop_polling(q);
1655 clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
1656
1657
1658
1659
1660
1661 if (test_nonshared_ind(irq_ptr))
1662 goto rescan;
1663 if (!qdio_inbound_q_done(q))
1664 goto rescan;
1665 return 0;
1666
1667rescan:
1668 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1669 &q->u.in.queue_irq_state))
1670 return 0;
1671 else
1672 return 1;
1673
1674}
1675EXPORT_SYMBOL(qdio_start_irq);
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1690 int *error)
1691{
1692 struct qdio_q *q;
1693 int start, end;
1694 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1695
1696 if (!irq_ptr)
1697 return -ENODEV;
1698 q = irq_ptr->input_qs[nr];
1699
1700
1701
1702
1703
1704 if (need_siga_sync(q))
1705 qdio_sync_queues(q);
1706
1707
1708 qdio_check_outbound_after_thinint(q);
1709
1710 if (!qdio_inbound_q_moved(q))
1711 return 0;
1712
1713
1714 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1715 return -EIO;
1716
1717 start = q->first_to_kick;
1718 end = q->first_to_check;
1719 *bufnr = start;
1720 *error = q->qdio_error;
1721
1722
1723 q->first_to_kick = end;
1724 q->qdio_error = 0;
1725 return sub_buf(end, start);
1726}
1727EXPORT_SYMBOL(qdio_get_next_buffers);
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738int qdio_stop_irq(struct ccw_device *cdev, int nr)
1739{
1740 struct qdio_q *q;
1741 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1742
1743 if (!irq_ptr)
1744 return -ENODEV;
1745 q = irq_ptr->input_qs[nr];
1746
1747 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1748 &q->u.in.queue_irq_state))
1749 return 0;
1750 else
1751 return 1;
1752}
1753EXPORT_SYMBOL(qdio_stop_irq);
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772int qdio_pnso_brinfo(struct subchannel_id schid,
1773 int cnc, u16 *response,
1774 void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
1775 void *entry),
1776 void *priv)
1777{
1778 struct chsc_pnso_area *rr;
1779 int rc;
1780 u32 prev_instance = 0;
1781 int isfirstblock = 1;
1782 int i, size, elems;
1783
1784 rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
1785 if (rr == NULL)
1786 return -ENOMEM;
1787 do {
1788
1789 rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
1790 if (rc != 0 && rc != -EBUSY)
1791 goto out;
1792 if (rr->response.code != 1) {
1793 rc = -EIO;
1794 continue;
1795 } else
1796 rc = 0;
1797
1798 if (cb == NULL)
1799 continue;
1800
1801 size = rr->naihdr.naids;
1802 elems = (rr->response.length -
1803 sizeof(struct chsc_header) -
1804 sizeof(struct chsc_brinfo_naihdr)) /
1805 size;
1806
1807 if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
1808
1809
1810 rc = -EAGAIN;
1811 break;
1812 }
1813 isfirstblock = 0;
1814 prev_instance = rr->naihdr.instance;
1815 for (i = 0; i < elems; i++)
1816 switch (size) {
1817 case sizeof(struct qdio_brinfo_entry_l3_ipv6):
1818 (*cb)(priv, l3_ipv6_addr,
1819 &rr->entries.l3_ipv6[i]);
1820 break;
1821 case sizeof(struct qdio_brinfo_entry_l3_ipv4):
1822 (*cb)(priv, l3_ipv4_addr,
1823 &rr->entries.l3_ipv4[i]);
1824 break;
1825 case sizeof(struct qdio_brinfo_entry_l2):
1826 (*cb)(priv, l2_addr_lnid,
1827 &rr->entries.l2[i]);
1828 break;
1829 default:
1830 WARN_ON_ONCE(1);
1831 rc = -EIO;
1832 goto out;
1833 }
1834 } while (rr->response.code == 0x0107 ||
1835 (rr->response.code == 1 &&
1836
1837 (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
1838 (*response) = rr->response.code;
1839
1840out:
1841 free_page((unsigned long)rr);
1842 return rc;
1843}
1844EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
1845
1846static int __init init_QDIO(void)
1847{
1848 int rc;
1849
1850 rc = qdio_debug_init();
1851 if (rc)
1852 return rc;
1853 rc = qdio_setup_init();
1854 if (rc)
1855 goto out_debug;
1856 rc = tiqdio_allocate_memory();
1857 if (rc)
1858 goto out_cache;
1859 rc = tiqdio_register_thinints();
1860 if (rc)
1861 goto out_ti;
1862 return 0;
1863
1864out_ti:
1865 tiqdio_free_memory();
1866out_cache:
1867 qdio_setup_exit();
1868out_debug:
1869 qdio_debug_exit();
1870 return rc;
1871}
1872
1873static void __exit exit_QDIO(void)
1874{
1875 tiqdio_unregister_thinints();
1876 tiqdio_free_memory();
1877 qdio_setup_exit();
1878 qdio_debug_exit();
1879}
1880
1881module_init(init_QDIO);
1882module_exit(exit_QDIO);
1883