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15#ifndef _RTW_HT_H_
16#define _RTW_HT_H_
17
18
19struct ht_priv
20{
21 u8 ht_option;
22 u8 ampdu_enable;
23 u8 tx_amsdu_enable;
24 u8 bss_coexist;
25
26
27 u32 tx_amsdu_maxlen;
28 u32 rx_ampdu_maxlen;
29
30 u8 rx_ampdu_min_spacing;
31
32 u8 ch_offset;
33 u8 sgi_20m;
34 u8 sgi_40m;
35
36
37 u8 agg_enable_bitmap;
38
39 u8 candidate_tid_bitmap;
40
41 u8 ldpc_cap;
42 u8 stbc_cap;
43 u8 beamform_cap;
44
45 struct rtw_ieee80211_ht_cap ht_cap;
46
47};
48
49typedef enum AGGRE_SIZE{
50 HT_AGG_SIZE_8K = 0,
51 HT_AGG_SIZE_16K = 1,
52 HT_AGG_SIZE_32K = 2,
53 HT_AGG_SIZE_64K = 3,
54 VHT_AGG_SIZE_128K = 4,
55 VHT_AGG_SIZE_256K = 5,
56 VHT_AGG_SIZE_512K = 6,
57 VHT_AGG_SIZE_1024K = 7,
58}AGGRE_SIZE_E, *PAGGRE_SIZE_E;
59
60typedef enum _RT_HT_INF0_CAP{
61 RT_HT_CAP_USE_TURBO_AGGR = 0x01,
62 RT_HT_CAP_USE_LONG_PREAMBLE = 0x02,
63 RT_HT_CAP_USE_AMPDU = 0x04,
64 RT_HT_CAP_USE_WOW = 0x8,
65 RT_HT_CAP_USE_SOFTAP = 0x10,
66 RT_HT_CAP_USE_92SE = 0x20,
67 RT_HT_CAP_USE_88C_92C = 0x40,
68 RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80,
69}RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY;
70
71typedef enum _RT_HT_INF1_CAP{
72 RT_HT_CAP_USE_VIDEO_CLIENT = 0x01,
73 RT_HT_CAP_USE_JAGUAR_BCUT = 0x02,
74 RT_HT_CAP_USE_JAGUAR_CCUT = 0x04,
75}RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY;
76
77#define LDPC_HT_ENABLE_RX BIT0
78#define LDPC_HT_ENABLE_TX BIT1
79#define LDPC_HT_TEST_TX_ENABLE BIT2
80#define LDPC_HT_CAP_TX BIT3
81
82#define STBC_HT_ENABLE_RX BIT0
83#define STBC_HT_ENABLE_TX BIT1
84#define STBC_HT_TEST_TX_ENABLE BIT2
85#define STBC_HT_CAP_TX BIT3
86
87#define BEAMFORMING_HT_BEAMFORMER_ENABLE BIT0
88#define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT1
89#define BEAMFORMING_HT_BEAMFORMER_TEST BIT2
90
91
92
93
94#define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 2, _val)
95#define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+3, 0, 1, _val)
96#define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+3, 0, 1)
97
98
99#define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart), 0, 1, _val)
100#define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart), 0, 1)
101
102
103#define GET_HT_CAPABILITY_ELE_LDPC_CAP(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 1)
104#define GET_HT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1)
105
106#define GET_HT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 2)
107
108
109#define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val))
110#define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val))
111#define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val))
112#define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val))
113#define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val))
114
115#define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart) LE_BITS_TO_4BYTE((_pEleStart)+21, 10, 1)
116#define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart) LE_BITS_TO_4BYTE((_pEleStart)+21, 15, 2)
117
118#endif
119