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56#ifndef _HFA384x_H
57#define _HFA384x_H
58
59#define HFA384x_FIRMWARE_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))
60
61#include <linux/if_ether.h>
62#include <linux/usb.h>
63
64
65#define HFA384x_PORTID_MAX ((u16)7)
66#define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX + 1))
67#define HFA384x_PDR_LEN_MAX ((u16)512)
68#define HFA384x_PDA_RECS_MAX ((u16)200)
69#define HFA384x_PDA_LEN_MAX ((u16)1024)
70#define HFA384x_SCANRESULT_MAX ((u16)31)
71#define HFA384x_HSCANRESULT_MAX ((u16)31)
72#define HFA384x_CHINFORESULT_MAX ((u16)16)
73#define HFA384x_RID_GUESSING_MAXLEN 2048
74#define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN
75#define HFA384x_USB_RWMEM_MAXLEN 2048
76
77
78#define HFA384x_PORTTYPE_IBSS ((u16)0)
79#define HFA384x_PORTTYPE_BSS ((u16)1)
80#define HFA384x_PORTTYPE_PSUEDOIBSS ((u16)3)
81#define HFA384x_WEPFLAGS_PRIVINVOKED ((u16)BIT(0))
82#define HFA384x_WEPFLAGS_EXCLUDE ((u16)BIT(1))
83#define HFA384x_WEPFLAGS_DISABLE_TXCRYPT ((u16)BIT(4))
84#define HFA384x_WEPFLAGS_DISABLE_RXCRYPT ((u16)BIT(7))
85#define HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM ((u16)3)
86#define HFA384x_PORTSTATUS_DISABLED ((u16)1)
87#define HFA384x_RATEBIT_1 ((u16)1)
88#define HFA384x_RATEBIT_2 ((u16)2)
89#define HFA384x_RATEBIT_5dot5 ((u16)4)
90#define HFA384x_RATEBIT_11 ((u16)8)
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107#define HFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80)
108#define HFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f)
109#define HFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000)
110#define HFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff)
111
112
113
114
115#define HFA384x_ADDR_AUX_PAGE_MASK (0xffff)
116#define HFA384x_ADDR_AUX_OFF_MASK (0x007f)
117
118
119#define HFA384x_ADDR_AUX_MKFLAT(p, o) \
120 ((((u32)(((u16)(p)) & HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \
121 ((u32)(((u16)(o)) & HFA384x_ADDR_AUX_OFF_MASK)))
122
123
124#define HFA384x_ADDR_CMD_MKPAGE(f) \
125 ((u16)((((u32)(f)) & HFA384x_ADDR_FLAT_CMD_PAGE_MASK) >> 16))
126#define HFA384x_ADDR_CMD_MKOFF(f) \
127 ((u16)(((u32)(f)) & HFA384x_ADDR_FLAT_CMD_OFF_MASK))
128
129
130#define HFA3842_PDA_BASE (0x007f0000UL)
131#define HFA3841_PDA_BASE (0x003f0000UL)
132#define HFA3841_PDA_BOGUS_BASE (0x00390000UL)
133
134
135#define HFA384x_DLSTATE_DISABLED 0
136#define HFA384x_DLSTATE_RAMENABLED 1
137#define HFA384x_DLSTATE_FLASHENABLED 2
138
139
140#define HFA384x_CMD_AINFO ((u16)GENMASK(14, 8))
141#define HFA384x_CMD_MACPORT ((u16)GENMASK(10, 8))
142#define HFA384x_CMD_PROGMODE ((u16)GENMASK(9, 8))
143#define HFA384x_CMD_CMDCODE ((u16)GENMASK(5, 0))
144#define HFA384x_STATUS_RESULT ((u16)GENMASK(14, 8))
145
146
147
148#define HFA384x_CMDCODE_INIT ((u16)0x00)
149#define HFA384x_CMDCODE_ENABLE ((u16)0x01)
150#define HFA384x_CMDCODE_DISABLE ((u16)0x02)
151
152
153#define HFA384x_CMDCODE_INQ ((u16)0x11)
154
155
156#define HFA384x_CMDCODE_DOWNLD ((u16)0x22)
157
158
159#define HFA384x_CMDCODE_MONITOR ((u16)(0x38))
160#define HFA384x_MONITOR_ENABLE ((u16)(0x0b))
161#define HFA384x_MONITOR_DISABLE ((u16)(0x0f))
162
163
164#define HFA384x_CMD_ERR ((u16)(0x7F))
165
166
167
168
169
170
171
172
173#define HFA384x_PROGMODE_DISABLE ((u16)0x00)
174#define HFA384x_PROGMODE_RAM ((u16)0x01)
175#define HFA384x_PROGMODE_NV ((u16)0x02)
176#define HFA384x_PROGMODE_NVWRITE ((u16)0x03)
177
178
179
180
181
182
183#define HFA384x_RID_CNFPORTTYPE ((u16)0xFC00)
184#define HFA384x_RID_CNFOWNMACADDR ((u16)0xFC01)
185#define HFA384x_RID_CNFDESIREDSSID ((u16)0xFC02)
186#define HFA384x_RID_CNFOWNCHANNEL ((u16)0xFC03)
187#define HFA384x_RID_CNFOWNSSID ((u16)0xFC04)
188#define HFA384x_RID_CNFMAXDATALEN ((u16)0xFC07)
189
190
191
192
193
194
195
196#define HFA384x_RID_CNFOWNMACADDR_LEN ((u16)6)
197#define HFA384x_RID_CNFDESIREDSSID_LEN ((u16)34)
198#define HFA384x_RID_CNFOWNSSID_LEN ((u16)34)
199
200
201
202
203
204#define HFA384x_RID_CREATEIBSS ((u16)0xFC81)
205#define HFA384x_RID_FRAGTHRESH ((u16)0xFC82)
206#define HFA384x_RID_RTSTHRESH ((u16)0xFC83)
207#define HFA384x_RID_TXRATECNTL ((u16)0xFC84)
208#define HFA384x_RID_PROMISCMODE ((u16)0xFC85)
209
210
211
212
213
214#define HFA384x_RID_MAXLOADTIME ((u16)0xFD00)
215#define HFA384x_RID_DOWNLOADBUFFER ((u16)0xFD01)
216#define HFA384x_RID_PRIIDENTITY ((u16)0xFD02)
217#define HFA384x_RID_PRISUPRANGE ((u16)0xFD03)
218#define HFA384x_RID_PRI_CFIACTRANGES ((u16)0xFD04)
219#define HFA384x_RID_NICSERIALNUMBER ((u16)0xFD0A)
220#define HFA384x_RID_NICIDENTITY ((u16)0xFD0B)
221#define HFA384x_RID_MFISUPRANGE ((u16)0xFD0C)
222#define HFA384x_RID_CFISUPRANGE ((u16)0xFD0D)
223#define HFA384x_RID_STAIDENTITY ((u16)0xFD20)
224#define HFA384x_RID_STASUPRANGE ((u16)0xFD21)
225#define HFA384x_RID_STA_MFIACTRANGES ((u16)0xFD22)
226#define HFA384x_RID_STA_CFIACTRANGES ((u16)0xFD23)
227
228
229
230
231
232
233
234#define HFA384x_RID_NICSERIALNUMBER_LEN ((u16)12)
235
236
237
238
239
240#define HFA384x_RID_PORTSTATUS ((u16)0xFD40)
241#define HFA384x_RID_CURRENTSSID ((u16)0xFD41)
242#define HFA384x_RID_CURRENTBSSID ((u16)0xFD42)
243#define HFA384x_RID_CURRENTTXRATE ((u16)0xFD44)
244#define HFA384x_RID_SHORTRETRYLIMIT ((u16)0xFD48)
245#define HFA384x_RID_LONGRETRYLIMIT ((u16)0xFD49)
246#define HFA384x_RID_MAXTXLIFETIME ((u16)0xFD4A)
247#define HFA384x_RID_PRIVACYOPTIMP ((u16)0xFD4F)
248#define HFA384x_RID_DBMCOMMSQUALITY ((u16)0xFD51)
249
250
251
252
253
254
255
256#define HFA384x_RID_DBMCOMMSQUALITY_LEN \
257 ((u16)sizeof(struct hfa384x_dbmcommsquality))
258#define HFA384x_RID_JOINREQUEST_LEN \
259 ((u16)sizeof(struct hfa384x_join_request_data))
260
261
262
263
264
265#define HFA384x_RID_CURRENTCHANNEL ((u16)0xFDC1)
266
267
268
269
270
271#define HFA384x_RID_CNFWEPDEFAULTKEYID ((u16)0xFC23)
272#define HFA384x_RID_CNFWEPDEFAULTKEY0 ((u16)0xFC24)
273#define HFA384x_RID_CNFWEPDEFAULTKEY1 ((u16)0xFC25)
274#define HFA384x_RID_CNFWEPDEFAULTKEY2 ((u16)0xFC26)
275#define HFA384x_RID_CNFWEPDEFAULTKEY3 ((u16)0xFC27)
276#define HFA384x_RID_CNFWEPFLAGS ((u16)0xFC28)
277#define HFA384x_RID_CNFAUTHENTICATION ((u16)0xFC2A)
278#define HFA384x_RID_CNFROAMINGMODE ((u16)0xFC2D)
279#define HFA384x_RID_CNFAPBCNINT ((u16)0xFC33)
280#define HFA384x_RID_CNFDBMADJUST ((u16)0xFC46)
281#define HFA384x_RID_CNFWPADATA ((u16)0xFC48)
282#define HFA384x_RID_CNFBASICRATES ((u16)0xFCB3)
283#define HFA384x_RID_CNFSUPPRATES ((u16)0xFCB4)
284#define HFA384x_RID_CNFPASSIVESCANCTRL ((u16)0xFCBA)
285#define HFA384x_RID_TXPOWERMAX ((u16)0xFCBE)
286#define HFA384x_RID_JOINREQUEST ((u16)0xFCE2)
287#define HFA384x_RID_AUTHENTICATESTA ((u16)0xFCE3)
288#define HFA384x_RID_HOSTSCAN ((u16)0xFCE5)
289
290#define HFA384x_RID_CNFWEPDEFAULTKEY_LEN ((u16)6)
291#define HFA384x_RID_CNFWEP128DEFAULTKEY_LEN ((u16)14)
292
293
294
295
296
297#define HFA384x_PDR_PCB_PARTNUM ((u16)0x0001)
298#define HFA384x_PDR_PDAVER ((u16)0x0002)
299#define HFA384x_PDR_NIC_SERIAL ((u16)0x0003)
300#define HFA384x_PDR_MKK_MEASUREMENTS ((u16)0x0004)
301#define HFA384x_PDR_NIC_RAMSIZE ((u16)0x0005)
302#define HFA384x_PDR_MFISUPRANGE ((u16)0x0006)
303#define HFA384x_PDR_CFISUPRANGE ((u16)0x0007)
304#define HFA384x_PDR_NICID ((u16)0x0008)
305#define HFA384x_PDR_MAC_ADDRESS ((u16)0x0101)
306#define HFA384x_PDR_REGDOMAIN ((u16)0x0103)
307#define HFA384x_PDR_ALLOWED_CHANNEL ((u16)0x0104)
308#define HFA384x_PDR_DEFAULT_CHANNEL ((u16)0x0105)
309#define HFA384x_PDR_TEMPTYPE ((u16)0x0107)
310#define HFA384x_PDR_IFR_SETTING ((u16)0x0200)
311#define HFA384x_PDR_RFR_SETTING ((u16)0x0201)
312#define HFA384x_PDR_HFA3861_BASELINE ((u16)0x0202)
313#define HFA384x_PDR_HFA3861_SHADOW ((u16)0x0203)
314#define HFA384x_PDR_HFA3861_IFRF ((u16)0x0204)
315#define HFA384x_PDR_HFA3861_CHCALSP ((u16)0x0300)
316#define HFA384x_PDR_HFA3861_CHCALI ((u16)0x0301)
317#define HFA384x_PDR_MAX_TX_POWER ((u16)0x0302)
318#define HFA384x_PDR_MASTER_CHAN_LIST ((u16)0x0303)
319#define HFA384x_PDR_3842_NIC_CONFIG ((u16)0x0400)
320#define HFA384x_PDR_USB_ID ((u16)0x0401)
321#define HFA384x_PDR_PCI_ID ((u16)0x0402)
322#define HFA384x_PDR_PCI_IFCONF ((u16)0x0403)
323#define HFA384x_PDR_PCI_PMCONF ((u16)0x0404)
324#define HFA384x_PDR_RFENRGY ((u16)0x0406)
325#define HFA384x_PDR_USB_POWER_TYPE ((u16)0x0407)
326#define HFA384x_PDR_USB_MAX_POWER ((u16)0x0409)
327#define HFA384x_PDR_USB_MANUFACTURER ((u16)0x0410)
328#define HFA384x_PDR_USB_PRODUCT ((u16)0x0411)
329#define HFA384x_PDR_ANT_DIVERSITY ((u16)0x0412)
330#define HFA384x_PDR_HFO_DELAY ((u16)0x0413)
331#define HFA384x_PDR_SCALE_THRESH ((u16)0x0414)
332
333#define HFA384x_PDR_HFA3861_MANF_TESTSP ((u16)0x0900)
334#define HFA384x_PDR_HFA3861_MANF_TESTI ((u16)0x0901)
335#define HFA384x_PDR_END_OF_PDA ((u16)0x0000)
336
337
338
339#define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8))
340#define HFA384x_CMD_MACPORT_SET(value) \
341 ((u16)HFA384x_CMD_AINFO_SET(value))
342#define HFA384x_CMD_PROGMODE_SET(value) \
343 ((u16)HFA384x_CMD_AINFO_SET((u16)value))
344#define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value))
345
346#define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8)
347
348
349#define HFA384x_STATE_PREINIT 0
350#define HFA384x_STATE_INIT 1
351#define HFA384x_STATE_RUNNING 2
352
353
354
355struct hfa384x_bytestr {
356 __le16 len;
357 u8 data[0];
358} __packed;
359
360struct hfa384x_bytestr32 {
361 __le16 len;
362 u8 data[32];
363} __packed;
364
365
366
367
368
369
370
371
372struct hfa384x_compident {
373 u16 id;
374 u16 variant;
375 u16 major;
376 u16 minor;
377} __packed;
378
379struct hfa384x_caplevel {
380 u16 role;
381 u16 id;
382 u16 variant;
383 u16 bottom;
384 u16 top;
385} __packed;
386
387
388#define HFA384x_CNFAUTHENTICATION_OPENSYSTEM 0x0001
389#define HFA384x_CNFAUTHENTICATION_SHAREDKEY 0x0002
390#define HFA384x_CNFAUTHENTICATION_LEAP 0x0004
391
392
393
394
395
396
397
398#define HFA384x_CREATEIBSS_JOINCREATEIBSS 0
399
400
401struct hfa384x_host_scan_request_data {
402 __le16 channel_list;
403 __le16 tx_rate;
404 struct hfa384x_bytestr32 ssid;
405} __packed;
406
407
408struct hfa384x_join_request_data {
409 u8 bssid[WLAN_BSSID_LEN];
410 u16 channel;
411} __packed;
412
413
414struct hfa384x_authenticate_station_data {
415 u8 address[ETH_ALEN];
416 __le16 status;
417 __le16 algorithm;
418} __packed;
419
420
421struct hfa384x_wpa_data {
422 __le16 datalen;
423 u8 data[0];
424} __packed;
425
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427
428
429
430
431
432
433struct hfa384x_downloadbuffer {
434 u16 page;
435 u16 offset;
436 u16 len;
437} __packed;
438
439
440
441
442
443
444#define HFA384x_PSTATUS_CONN_IBSS ((u16)3)
445
446
447struct hfa384x_commsquality {
448 __le16 cq_curr_bss;
449 __le16 asl_curr_bss;
450 __le16 anl_curr_fc;
451} __packed;
452
453
454struct hfa384x_dbmcommsquality {
455 u16 cq_dbm_curr_bss;
456 u16 asl_dbm_curr_bss;
457 u16 anl_dbm_curr_fc;
458} __packed;
459
460
461
462
463
464
465
466
467struct hfa384x_tx_frame {
468 u16 status;
469 u16 reserved1;
470 u16 reserved2;
471 u32 sw_support;
472 u8 tx_retrycount;
473 u8 tx_rate;
474 u16 tx_control;
475
476
477
478 u16 frame_control;
479 u16 duration_id;
480 u8 address1[6];
481 u8 address2[6];
482 u8 address3[6];
483 u16 sequence_control;
484 u8 address4[6];
485 __le16 data_len;
486
487
488
489 u8 dest_addr[6];
490 u8 src_addr[6];
491 u16 data_length;
492} __packed;
493
494
495
496
497
498#define HFA384x_TXSTATUS_ACKERR ((u16)BIT(5))
499#define HFA384x_TXSTATUS_FORMERR ((u16)BIT(3))
500#define HFA384x_TXSTATUS_DISCON ((u16)BIT(2))
501#define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1))
502#define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0))
503
504#define HFA384x_TX_MACPORT ((u16)GENMASK(10, 8))
505#define HFA384x_TX_STRUCTYPE ((u16)GENMASK(4, 3))
506#define HFA384x_TX_TXEX ((u16)BIT(2))
507#define HFA384x_TX_TXOK ((u16)BIT(1))
508
509
510
511
512
513#define HFA384x_TXSTATUS_ISERROR(v) \
514 (((u16)(v)) & \
515 (HFA384x_TXSTATUS_ACKERR | HFA384x_TXSTATUS_FORMERR | \
516 HFA384x_TXSTATUS_DISCON | HFA384x_TXSTATUS_AGEDERR | \
517 HFA384x_TXSTATUS_RETRYERR))
518
519#define HFA384x_TX_SET(v, m, s) ((((u16)(v)) << ((u16)(s))) & ((u16)(m)))
520
521#define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8)
522#define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, \
523 HFA384x_TX_STRUCTYPE, 3)
524#define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2)
525#define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1)
526
527
528
529
530
531struct hfa384x_rx_frame {
532
533 u16 status;
534 u32 time;
535 u8 silence;
536 u8 signal;
537 u8 rate;
538 u8 rx_flow;
539 u16 reserved1;
540 u16 reserved2;
541
542
543 __le16 frame_control;
544 u16 duration_id;
545 u8 address1[6];
546 u8 address2[6];
547 u8 address3[6];
548 u16 sequence_control;
549 u8 address4[6];
550 __le16 data_len;
551
552
553 u8 dest_addr[6];
554 u8 src_addr[6];
555 u16 data_length;
556} __packed;
557
558
559
560
561
562
563#define HFA384x_RXSTATUS_MACPORT ((u16)GENMASK(10, 8))
564#define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0))
565
566
567
568
569#define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) \
570 & HFA384x_RXSTATUS_MACPORT) >> 8))
571#define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) \
572 & HFA384x_RXSTATUS_FCSERR))
573
574
575
576
577
578
579#define HFA384x_IT_HANDOVERADDR ((u16)0xF000UL)
580#define HFA384x_IT_COMMTALLIES ((u16)0xF100UL)
581#define HFA384x_IT_SCANRESULTS ((u16)0xF101UL)
582#define HFA384x_IT_CHINFORESULTS ((u16)0xF102UL)
583#define HFA384x_IT_HOSTSCANRESULTS ((u16)0xF103UL)
584#define HFA384x_IT_LINKSTATUS ((u16)0xF200UL)
585#define HFA384x_IT_ASSOCSTATUS ((u16)0xF201UL)
586#define HFA384x_IT_AUTHREQ ((u16)0xF202UL)
587#define HFA384x_IT_PSUSERCNT ((u16)0xF203UL)
588#define HFA384x_IT_KEYIDCHANGED ((u16)0xF204UL)
589#define HFA384x_IT_ASSOCREQ ((u16)0xF205UL)
590#define HFA384x_IT_MICFAILURE ((u16)0xF206UL)
591
592
593
594
595
596
597
598
599
600struct hfa384x_comm_tallies_16 {
601 __le16 txunicastframes;
602 __le16 txmulticastframes;
603 __le16 txfragments;
604 __le16 txunicastoctets;
605 __le16 txmulticastoctets;
606 __le16 txdeferredtrans;
607 __le16 txsingleretryframes;
608 __le16 txmultipleretryframes;
609 __le16 txretrylimitexceeded;
610 __le16 txdiscards;
611 __le16 rxunicastframes;
612 __le16 rxmulticastframes;
613 __le16 rxfragments;
614 __le16 rxunicastoctets;
615 __le16 rxmulticastoctets;
616 __le16 rxfcserrors;
617 __le16 rxdiscardsnobuffer;
618 __le16 txdiscardswrongsa;
619 __le16 rxdiscardswepundecr;
620 __le16 rxmsginmsgfrag;
621 __le16 rxmsginbadmsgfrag;
622} __packed;
623
624struct hfa384x_comm_tallies_32 {
625 __le32 txunicastframes;
626 __le32 txmulticastframes;
627 __le32 txfragments;
628 __le32 txunicastoctets;
629 __le32 txmulticastoctets;
630 __le32 txdeferredtrans;
631 __le32 txsingleretryframes;
632 __le32 txmultipleretryframes;
633 __le32 txretrylimitexceeded;
634 __le32 txdiscards;
635 __le32 rxunicastframes;
636 __le32 rxmulticastframes;
637 __le32 rxfragments;
638 __le32 rxunicastoctets;
639 __le32 rxmulticastoctets;
640 __le32 rxfcserrors;
641 __le32 rxdiscardsnobuffer;
642 __le32 txdiscardswrongsa;
643 __le32 rxdiscardswepundecr;
644 __le32 rxmsginmsgfrag;
645 __le32 rxmsginbadmsgfrag;
646} __packed;
647
648
649struct hfa384x_scan_result_sub {
650 u16 chid;
651 u16 anl;
652 u16 sl;
653 u8 bssid[WLAN_BSSID_LEN];
654 u16 bcnint;
655 u16 capinfo;
656 struct hfa384x_bytestr32 ssid;
657 u8 supprates[10];
658 u16 proberesp_rate;
659} __packed;
660
661struct hfa384x_scan_result {
662 u16 rsvd;
663 u16 scanreason;
664 struct hfa384x_scan_result_sub result[HFA384x_SCANRESULT_MAX];
665} __packed;
666
667
668struct hfa384x_ch_info_result_sub {
669 u16 chid;
670 u16 anl;
671 u16 pnl;
672 u16 active;
673} __packed;
674
675#define HFA384x_CHINFORESULT_BSSACTIVE BIT(0)
676#define HFA384x_CHINFORESULT_PCFACTIVE BIT(1)
677
678struct hfa384x_ch_info_result {
679 u16 scanchannels;
680 struct hfa384x_ch_info_result_sub result[HFA384x_CHINFORESULT_MAX];
681} __packed;
682
683
684struct hfa384x_hscan_result_sub {
685 __le16 chid;
686 __le16 anl;
687 __le16 sl;
688 u8 bssid[WLAN_BSSID_LEN];
689 __le16 bcnint;
690 __le16 capinfo;
691 struct hfa384x_bytestr32 ssid;
692 u8 supprates[10];
693 u16 proberesp_rate;
694 __le16 atim;
695} __packed;
696
697struct hfa384x_hscan_result {
698 u16 nresult;
699 u16 rsvd;
700 struct hfa384x_hscan_result_sub result[HFA384x_HSCANRESULT_MAX];
701} __packed;
702
703
704
705#define HFA384x_LINK_NOTCONNECTED ((u16)0)
706#define HFA384x_LINK_CONNECTED ((u16)1)
707#define HFA384x_LINK_DISCONNECTED ((u16)2)
708#define HFA384x_LINK_AP_CHANGE ((u16)3)
709#define HFA384x_LINK_AP_OUTOFRANGE ((u16)4)
710#define HFA384x_LINK_AP_INRANGE ((u16)5)
711#define HFA384x_LINK_ASSOCFAIL ((u16)6)
712
713struct hfa384x_link_status {
714 __le16 linkstatus;
715} __packed;
716
717
718
719#define HFA384x_ASSOCSTATUS_STAASSOC ((u16)1)
720#define HFA384x_ASSOCSTATUS_REASSOC ((u16)2)
721#define HFA384x_ASSOCSTATUS_AUTHFAIL ((u16)5)
722
723struct hfa384x_assoc_status {
724 u16 assocstatus;
725 u8 sta_addr[ETH_ALEN];
726
727 u8 old_ap_addr[ETH_ALEN];
728 u16 reason;
729 u16 reserved;
730} __packed;
731
732
733
734struct hfa384x_auth_request {
735 u8 sta_addr[ETH_ALEN];
736 __le16 algorithm;
737} __packed;
738
739
740
741struct hfa384x_ps_user_count {
742 __le16 usercnt;
743} __packed;
744
745struct hfa384x_key_id_changed {
746 u8 sta_addr[ETH_ALEN];
747 u16 keyid;
748} __packed;
749
750
751union hfa384x_infodata {
752 struct hfa384x_comm_tallies_16 commtallies16;
753 struct hfa384x_comm_tallies_32 commtallies32;
754 struct hfa384x_scan_result scanresult;
755 struct hfa384x_ch_info_result chinforesult;
756 struct hfa384x_hscan_result hscanresult;
757 struct hfa384x_link_status linkstatus;
758 struct hfa384x_assoc_status assocstatus;
759 struct hfa384x_auth_request authreq;
760 struct hfa384x_ps_user_count psusercnt;
761 struct hfa384x_key_id_changed keyidchanged;
762} __packed;
763
764struct hfa384x_inf_frame {
765 u16 framelen;
766 u16 infotype;
767 union hfa384x_infodata info;
768} __packed;
769
770
771
772
773
774
775
776#define HFA384x_USB_TXFRM 0
777#define HFA384x_USB_CMDREQ 1
778#define HFA384x_USB_WRIDREQ 2
779#define HFA384x_USB_RRIDREQ 3
780#define HFA384x_USB_WMEMREQ 4
781#define HFA384x_USB_RMEMREQ 5
782
783
784#define HFA384x_USB_ISTXFRM(a) (((a) & 0x9000) == 0x1000)
785#define HFA384x_USB_ISRXFRM(a) (!((a) & 0x9000))
786#define HFA384x_USB_INFOFRM 0x8000
787#define HFA384x_USB_CMDRESP 0x8001
788#define HFA384x_USB_WRIDRESP 0x8002
789#define HFA384x_USB_RRIDRESP 0x8003
790#define HFA384x_USB_WMEMRESP 0x8004
791#define HFA384x_USB_RMEMRESP 0x8005
792#define HFA384x_USB_BUFAVAIL 0x8006
793#define HFA384x_USB_ERROR 0x8007
794
795
796
797
798struct hfa384x_usb_txfrm {
799 struct hfa384x_tx_frame desc;
800 u8 data[WLAN_DATA_MAXLEN];
801} __packed;
802
803struct hfa384x_usb_cmdreq {
804 __le16 type;
805 __le16 cmd;
806 __le16 parm0;
807 __le16 parm1;
808 __le16 parm2;
809 u8 pad[54];
810} __packed;
811
812struct hfa384x_usb_wridreq {
813 __le16 type;
814 __le16 frmlen;
815 __le16 rid;
816 u8 data[HFA384x_RIDDATA_MAXLEN];
817} __packed;
818
819struct hfa384x_usb_rridreq {
820 __le16 type;
821 __le16 frmlen;
822 __le16 rid;
823 u8 pad[58];
824} __packed;
825
826struct hfa384x_usb_wmemreq {
827 __le16 type;
828 __le16 frmlen;
829 __le16 offset;
830 __le16 page;
831 u8 data[HFA384x_USB_RWMEM_MAXLEN];
832} __packed;
833
834struct hfa384x_usb_rmemreq {
835 __le16 type;
836 __le16 frmlen;
837 __le16 offset;
838 __le16 page;
839 u8 pad[56];
840} __packed;
841
842
843
844
845struct hfa384x_usb_rxfrm {
846 struct hfa384x_rx_frame desc;
847 u8 data[WLAN_DATA_MAXLEN];
848} __packed;
849
850struct hfa384x_usb_infofrm {
851 u16 type;
852 struct hfa384x_inf_frame info;
853} __packed;
854
855struct hfa384x_usb_statusresp {
856 u16 type;
857 __le16 status;
858 __le16 resp0;
859 __le16 resp1;
860 __le16 resp2;
861} __packed;
862
863struct hfa384x_usb_rridresp {
864 u16 type;
865 __le16 frmlen;
866 __le16 rid;
867 u8 data[HFA384x_RIDDATA_MAXLEN];
868} __packed;
869
870struct hfa384x_usb_rmemresp {
871 u16 type;
872 u16 frmlen;
873 u8 data[HFA384x_USB_RWMEM_MAXLEN];
874} __packed;
875
876struct hfa384x_usb_bufavail {
877 u16 type;
878 u16 frmlen;
879} __packed;
880
881struct hfa384x_usb_error {
882 u16 type;
883 u16 errortype;
884} __packed;
885
886
887
888
889union hfa384x_usbout {
890 __le16 type;
891 struct hfa384x_usb_txfrm txfrm;
892 struct hfa384x_usb_cmdreq cmdreq;
893 struct hfa384x_usb_wridreq wridreq;
894 struct hfa384x_usb_rridreq rridreq;
895 struct hfa384x_usb_wmemreq wmemreq;
896 struct hfa384x_usb_rmemreq rmemreq;
897} __packed;
898
899union hfa384x_usbin {
900 __le16 type;
901 struct hfa384x_usb_rxfrm rxfrm;
902 struct hfa384x_usb_txfrm txfrm;
903 struct hfa384x_usb_infofrm infofrm;
904 struct hfa384x_usb_statusresp cmdresp;
905 struct hfa384x_usb_statusresp wridresp;
906 struct hfa384x_usb_rridresp rridresp;
907 struct hfa384x_usb_statusresp wmemresp;
908 struct hfa384x_usb_rmemresp rmemresp;
909 struct hfa384x_usb_bufavail bufavail;
910 struct hfa384x_usb_error usberror;
911 u8 boguspad[3000];
912} __packed;
913
914
915
916
917
918
919struct hfa384x_pdr_pcb_partnum {
920 u8 num[8];
921} __packed;
922
923struct hfa384x_pdr_pcb_tracenum {
924 u8 num[8];
925} __packed;
926
927struct hfa384x_pdr_nic_serial {
928 u8 num[12];
929} __packed;
930
931struct hfa384x_pdr_mkk_measurements {
932 double carrier_freq;
933 double occupied_band;
934 double power_density;
935 double tx_spur_f1;
936 double tx_spur_f2;
937 double tx_spur_f3;
938 double tx_spur_f4;
939 double tx_spur_l1;
940 double tx_spur_l2;
941 double tx_spur_l3;
942 double tx_spur_l4;
943 double rx_spur_f1;
944 double rx_spur_f2;
945 double rx_spur_l1;
946 double rx_spur_l2;
947} __packed;
948
949struct hfa384x_pdr_nic_ramsize {
950 u8 size[12];
951} __packed;
952
953struct hfa384x_pdr_mfisuprange {
954 u16 id;
955 u16 variant;
956 u16 bottom;
957 u16 top;
958} __packed;
959
960struct hfa384x_pdr_cfisuprange {
961 u16 id;
962 u16 variant;
963 u16 bottom;
964 u16 top;
965} __packed;
966
967struct hfa384x_pdr_nicid {
968 u16 id;
969 u16 variant;
970 u16 major;
971 u16 minor;
972} __packed;
973
974struct hfa384x_pdr_refdac_measurements {
975 u16 value[0];
976} __packed;
977
978struct hfa384x_pdr_vgdac_measurements {
979 u16 value[0];
980} __packed;
981
982struct hfa384x_pdr_level_comp_measurements {
983 u16 value[0];
984} __packed;
985
986struct hfa384x_pdr_mac_address {
987 u8 addr[6];
988} __packed;
989
990struct hfa384x_pdr_mkk_callname {
991 u8 callname[8];
992} __packed;
993
994struct hfa384x_pdr_regdomain {
995 u16 numdomains;
996 u16 domain[5];
997} __packed;
998
999struct hfa384x_pdr_allowed_channel {
1000 u16 ch_bitmap;
1001} __packed;
1002
1003struct hfa384x_pdr_default_channel {
1004 u16 channel;
1005} __packed;
1006
1007struct hfa384x_pdr_privacy_option {
1008 u16 available;
1009} __packed;
1010
1011struct hfa384x_pdr_temptype {
1012 u16 type;
1013} __packed;
1014
1015struct hfa384x_pdr_refdac_setup {
1016 u16 ch_value[14];
1017} __packed;
1018
1019struct hfa384x_pdr_vgdac_setup {
1020 u16 ch_value[14];
1021} __packed;
1022
1023struct hfa384x_pdr_level_comp_setup {
1024 u16 ch_value[14];
1025} __packed;
1026
1027struct hfa384x_pdr_trimdac_setup {
1028 u16 trimidac;
1029 u16 trimqdac;
1030} __packed;
1031
1032struct hfa384x_pdr_ifr_setting {
1033 u16 value[3];
1034} __packed;
1035
1036struct hfa384x_pdr_rfr_setting {
1037 u16 value[3];
1038} __packed;
1039
1040struct hfa384x_pdr_hfa3861_baseline {
1041 u16 value[50];
1042} __packed;
1043
1044struct hfa384x_pdr_hfa3861_shadow {
1045 u32 value[32];
1046} __packed;
1047
1048struct hfa384x_pdr_hfa3861_ifrf {
1049 u32 value[20];
1050} __packed;
1051
1052struct hfa384x_pdr_hfa3861_chcalsp {
1053 u16 value[14];
1054} __packed;
1055
1056struct hfa384x_pdr_hfa3861_chcali {
1057 u16 value[17];
1058} __packed;
1059
1060struct hfa384x_pdr_hfa3861_nic_config {
1061 u16 config_bitmap;
1062} __packed;
1063
1064struct hfa384x_pdr_hfo_delay {
1065 u8 hfo_delay;
1066} __packed;
1067
1068struct hfa384x_pdr_hfa3861_manf_testsp {
1069 u16 value[30];
1070} __packed;
1071
1072struct hfa384x_pdr_hfa3861_manf_testi {
1073 u16 value[30];
1074} __packed;
1075
1076struct hfa384x_pdr_end_of_pda {
1077 u16 crc;
1078} __packed;
1079
1080struct hfa384x_pdrec {
1081 __le16 len;
1082 __le16 code;
1083 union pdr {
1084 struct hfa384x_pdr_pcb_partnum pcb_partnum;
1085 struct hfa384x_pdr_pcb_tracenum pcb_tracenum;
1086 struct hfa384x_pdr_nic_serial nic_serial;
1087 struct hfa384x_pdr_mkk_measurements mkk_measurements;
1088 struct hfa384x_pdr_nic_ramsize nic_ramsize;
1089 struct hfa384x_pdr_mfisuprange mfisuprange;
1090 struct hfa384x_pdr_cfisuprange cfisuprange;
1091 struct hfa384x_pdr_nicid nicid;
1092 struct hfa384x_pdr_refdac_measurements refdac_measurements;
1093 struct hfa384x_pdr_vgdac_measurements vgdac_measurements;
1094 struct hfa384x_pdr_level_comp_measurements level_compc_measurements;
1095 struct hfa384x_pdr_mac_address mac_address;
1096 struct hfa384x_pdr_mkk_callname mkk_callname;
1097 struct hfa384x_pdr_regdomain regdomain;
1098 struct hfa384x_pdr_allowed_channel allowed_channel;
1099 struct hfa384x_pdr_default_channel default_channel;
1100 struct hfa384x_pdr_privacy_option privacy_option;
1101 struct hfa384x_pdr_temptype temptype;
1102 struct hfa384x_pdr_refdac_setup refdac_setup;
1103 struct hfa384x_pdr_vgdac_setup vgdac_setup;
1104 struct hfa384x_pdr_level_comp_setup level_comp_setup;
1105 struct hfa384x_pdr_trimdac_setup trimdac_setup;
1106 struct hfa384x_pdr_ifr_setting ifr_setting;
1107 struct hfa384x_pdr_rfr_setting rfr_setting;
1108 struct hfa384x_pdr_hfa3861_baseline hfa3861_baseline;
1109 struct hfa384x_pdr_hfa3861_shadow hfa3861_shadow;
1110 struct hfa384x_pdr_hfa3861_ifrf hfa3861_ifrf;
1111 struct hfa384x_pdr_hfa3861_chcalsp hfa3861_chcalsp;
1112 struct hfa384x_pdr_hfa3861_chcali hfa3861_chcali;
1113 struct hfa384x_pdr_hfa3861_nic_config nic_config;
1114 struct hfa384x_pdr_hfo_delay hfo_delay;
1115 struct hfa384x_pdr_hfa3861_manf_testsp hfa3861_manf_testsp;
1116 struct hfa384x_pdr_hfa3861_manf_testi hfa3861_manf_testi;
1117 struct hfa384x_pdr_end_of_pda end_of_pda;
1118
1119 } data;
1120} __packed;
1121
1122#ifdef __KERNEL__
1123
1124
1125
1126
1127
1128struct hfa384x_cmdresult {
1129 u16 status;
1130 u16 resp0;
1131 u16 resp1;
1132 u16 resp2;
1133};
1134
1135
1136
1137
1138
1139
1140
1141
1142struct hfa384x_rridresult {
1143 u16 rid;
1144 const void *riddata;
1145 unsigned int riddata_len;
1146};
1147
1148enum ctlx_state {
1149 CTLX_START = 0,
1150
1151 CTLX_COMPLETE,
1152 CTLX_REQ_FAILED,
1153
1154 CTLX_PENDING,
1155 CTLX_REQ_SUBMITTED,
1156 CTLX_REQ_COMPLETE,
1157 CTLX_RESP_COMPLETE
1158};
1159
1160struct hfa384x_usbctlx;
1161struct hfa384x;
1162
1163typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *);
1164
1165typedef void (*ctlx_usercb_t) (struct hfa384x *hw,
1166 void *ctlxresult, void *usercb_data);
1167
1168struct hfa384x_usbctlx {
1169 struct list_head list;
1170
1171 size_t outbufsize;
1172 union hfa384x_usbout outbuf;
1173 union hfa384x_usbin inbuf;
1174
1175 enum ctlx_state state;
1176
1177 struct completion done;
1178 volatile int reapable;
1179
1180 ctlx_cmdcb_t cmdcb;
1181 ctlx_usercb_t usercb;
1182 void *usercb_data;
1183
1184 int variant;
1185};
1186
1187struct hfa384x_usbctlxq {
1188 spinlock_t lock;
1189 struct list_head pending;
1190 struct list_head active;
1191 struct list_head completing;
1192 struct list_head reapable;
1193};
1194
1195struct hfa384x_metacmd {
1196 u16 cmd;
1197
1198 u16 parm0;
1199 u16 parm1;
1200 u16 parm2;
1201
1202 struct hfa384x_cmdresult result;
1203};
1204
1205#define MAX_GRP_ADDR 32
1206#define WLAN_COMMENT_MAX 80
1207
1208#define WLAN_AUTH_MAX 60
1209#define WLAN_ACCESS_MAX 60
1210#define WLAN_ACCESS_NONE 0
1211#define WLAN_ACCESS_ALL 1
1212#define WLAN_ACCESS_ALLOW 2
1213#define WLAN_ACCESS_DENY 3
1214
1215
1216struct prism2sta_authlist {
1217 unsigned int cnt;
1218 u8 addr[WLAN_AUTH_MAX][ETH_ALEN];
1219 u8 assoc[WLAN_AUTH_MAX];
1220};
1221
1222struct prism2sta_accesslist {
1223 unsigned int modify;
1224 unsigned int cnt;
1225 u8 addr[WLAN_ACCESS_MAX][ETH_ALEN];
1226 unsigned int cnt1;
1227 u8 addr1[WLAN_ACCESS_MAX][ETH_ALEN];
1228};
1229
1230struct hfa384x {
1231
1232 struct usb_device *usb;
1233 struct urb rx_urb;
1234 struct sk_buff *rx_urb_skb;
1235 struct urb tx_urb;
1236 struct urb ctlx_urb;
1237 union hfa384x_usbout txbuff;
1238 struct hfa384x_usbctlxq ctlxq;
1239 struct timer_list reqtimer;
1240 struct timer_list resptimer;
1241
1242 struct timer_list throttle;
1243
1244 struct tasklet_struct reaper_bh;
1245 struct tasklet_struct completion_bh;
1246
1247 struct work_struct usb_work;
1248
1249 unsigned long usb_flags;
1250#define THROTTLE_RX 0
1251#define THROTTLE_TX 1
1252#define WORK_RX_HALT 2
1253#define WORK_TX_HALT 3
1254#define WORK_RX_RESUME 4
1255#define WORK_TX_RESUME 5
1256
1257 unsigned short req_timer_done:1;
1258 unsigned short resp_timer_done:1;
1259
1260 int endp_in;
1261 int endp_out;
1262
1263 int sniff_fcs;
1264 int sniff_channel;
1265 int sniff_truncate;
1266 int sniffhdr;
1267
1268 wait_queue_head_t cmdq;
1269
1270
1271 u32 state;
1272 u32 isap;
1273 u8 port_enabled[HFA384x_NUMPORTS_MAX];
1274
1275
1276 unsigned int dlstate;
1277 struct hfa384x_downloadbuffer bufinfo;
1278 u16 dltimeout;
1279
1280 int scanflag;
1281 int join_ap;
1282 int join_retries;
1283 struct hfa384x_join_request_data joinreq;
1284
1285 struct wlandevice *wlandev;
1286
1287 struct work_struct link_bh;
1288
1289 struct work_struct commsqual_bh;
1290 struct hfa384x_commsquality qual;
1291 struct timer_list commsqual_timer;
1292
1293 u16 link_status;
1294 u16 link_status_new;
1295 struct sk_buff_head authq;
1296
1297 u32 txrate;
1298
1299
1300
1301
1302 unsigned int presniff_port_type;
1303 u16 presniff_wepflags;
1304 u32 dot11_desired_bss_type;
1305
1306 int dbmadjust;
1307
1308
1309
1310
1311 u8 dot11_grp_addr[MAX_GRP_ADDR][ETH_ALEN];
1312 unsigned int dot11_grpcnt;
1313
1314
1315 struct hfa384x_compident ident_nic;
1316 struct hfa384x_compident ident_pri_fw;
1317 struct hfa384x_compident ident_sta_fw;
1318 struct hfa384x_compident ident_ap_fw;
1319 u16 mm_mods;
1320
1321
1322 struct hfa384x_caplevel cap_sup_mfi;
1323 struct hfa384x_caplevel cap_sup_cfi;
1324 struct hfa384x_caplevel cap_sup_pri;
1325 struct hfa384x_caplevel cap_sup_sta;
1326 struct hfa384x_caplevel cap_sup_ap;
1327
1328
1329 struct hfa384x_caplevel cap_act_pri_cfi;
1330
1331
1332
1333
1334 struct hfa384x_caplevel cap_act_sta_cfi;
1335
1336
1337
1338
1339 struct hfa384x_caplevel cap_act_sta_mfi;
1340
1341 struct hfa384x_caplevel cap_act_ap_cfi;
1342
1343
1344
1345
1346 struct hfa384x_caplevel cap_act_ap_mfi;
1347
1348 u32 psusercount;
1349 struct hfa384x_comm_tallies_32 tallies;
1350 u8 comment[WLAN_COMMENT_MAX + 1];
1351
1352
1353 struct {
1354 atomic_t done;
1355 u8 count;
1356 struct hfa384x_ch_info_result results;
1357 } channel_info;
1358
1359 struct hfa384x_inf_frame *scanresults;
1360
1361 struct prism2sta_authlist authlist;
1362 unsigned int accessmode;
1363 struct prism2sta_accesslist allow;
1364 struct prism2sta_accesslist deny;
1365
1366};
1367
1368void hfa384x_create(struct hfa384x *hw, struct usb_device *usb);
1369void hfa384x_destroy(struct hfa384x *hw);
1370
1371int
1372hfa384x_corereset(struct hfa384x *hw, int holdtime, int settletime, int genesis);
1373int hfa384x_drvr_disable(struct hfa384x *hw, u16 macport);
1374int hfa384x_drvr_enable(struct hfa384x *hw, u16 macport);
1375int hfa384x_drvr_flashdl_enable(struct hfa384x *hw);
1376int hfa384x_drvr_flashdl_disable(struct hfa384x *hw);
1377int hfa384x_drvr_flashdl_write(struct hfa384x *hw, u32 daddr, void *buf, u32 len);
1378int hfa384x_drvr_getconfig(struct hfa384x *hw, u16 rid, void *buf, u16 len);
1379int hfa384x_drvr_ramdl_enable(struct hfa384x *hw, u32 exeaddr);
1380int hfa384x_drvr_ramdl_disable(struct hfa384x *hw);
1381int hfa384x_drvr_ramdl_write(struct hfa384x *hw, u32 daddr, void *buf, u32 len);
1382int hfa384x_drvr_readpda(struct hfa384x *hw, void *buf, unsigned int len);
1383int hfa384x_drvr_setconfig(struct hfa384x *hw, u16 rid, void *buf, u16 len);
1384
1385static inline int hfa384x_drvr_getconfig16(struct hfa384x *hw, u16 rid, void *val)
1386{
1387 int result = 0;
1388
1389 result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16));
1390 if (result == 0)
1391 le16_to_cpus(val);
1392 return result;
1393}
1394
1395static inline int hfa384x_drvr_setconfig16(struct hfa384x *hw, u16 rid, u16 val)
1396{
1397 __le16 value = cpu_to_le16(val);
1398
1399 return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value));
1400}
1401
1402int
1403hfa384x_drvr_setconfig_async(struct hfa384x *hw,
1404 u16 rid,
1405 void *buf,
1406 u16 len, ctlx_usercb_t usercb, void *usercb_data);
1407
1408static inline int
1409hfa384x_drvr_setconfig16_async(struct hfa384x *hw, u16 rid, u16 val)
1410{
1411 __le16 value = cpu_to_le16(val);
1412
1413 return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value),
1414 NULL, NULL);
1415}
1416
1417int hfa384x_drvr_start(struct hfa384x *hw);
1418int hfa384x_drvr_stop(struct hfa384x *hw);
1419int
1420hfa384x_drvr_txframe(struct hfa384x *hw, struct sk_buff *skb,
1421 union p80211_hdr *p80211_hdr,
1422 struct p80211_metawep *p80211_wep);
1423void hfa384x_tx_timeout(struct wlandevice *wlandev);
1424
1425int hfa384x_cmd_initialize(struct hfa384x *hw);
1426int hfa384x_cmd_enable(struct hfa384x *hw, u16 macport);
1427int hfa384x_cmd_disable(struct hfa384x *hw, u16 macport);
1428int hfa384x_cmd_allocate(struct hfa384x *hw, u16 len);
1429int hfa384x_cmd_monitor(struct hfa384x *hw, u16 enable);
1430int
1431hfa384x_cmd_download(struct hfa384x *hw,
1432 u16 mode, u16 lowaddr, u16 highaddr, u16 codelen);
1433
1434#endif
1435
1436#endif
1437