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14#include <linux/serial_8250.h>
15#include <linux/serial_reg.h>
16#include <linux/dmaengine.h>
17
18struct uart_8250_dma {
19 int (*tx_dma)(struct uart_8250_port *p);
20 int (*rx_dma)(struct uart_8250_port *p);
21
22
23 dma_filter_fn fn;
24
25 void *rx_param;
26 void *tx_param;
27
28 struct dma_slave_config rxconf;
29 struct dma_slave_config txconf;
30
31 struct dma_chan *rxchan;
32 struct dma_chan *txchan;
33
34
35 phys_addr_t rx_dma_addr;
36 phys_addr_t tx_dma_addr;
37
38
39 dma_addr_t rx_addr;
40 dma_addr_t tx_addr;
41
42 dma_cookie_t rx_cookie;
43 dma_cookie_t tx_cookie;
44
45 void *rx_buf;
46
47 size_t rx_size;
48 size_t tx_size;
49
50 unsigned char tx_running;
51 unsigned char tx_err;
52 unsigned char rx_running;
53};
54
55struct old_serial_port {
56 unsigned int uart;
57 unsigned int baud_base;
58 unsigned int port;
59 unsigned int irq;
60 upf_t flags;
61 unsigned char io_type;
62 unsigned char __iomem *iomem_base;
63 unsigned short iomem_reg_shift;
64};
65
66struct serial8250_config {
67 const char *name;
68 unsigned short fifo_size;
69 unsigned short tx_loadsz;
70 unsigned char fcr;
71 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
72 unsigned int flags;
73};
74
75#define UART_CAP_FIFO (1 << 8)
76#define UART_CAP_EFR (1 << 9)
77#define UART_CAP_SLEEP (1 << 10)
78#define UART_CAP_AFE (1 << 11)
79#define UART_CAP_UUE (1 << 12)
80#define UART_CAP_RTOIE (1 << 13)
81#define UART_CAP_HFIFO (1 << 14)
82#define UART_CAP_RPM (1 << 15)
83#define UART_CAP_IRDA (1 << 16)
84#define UART_CAP_MINI (1 << 17)
85
86
87
88#define UART_BUG_QUOT (1 << 0)
89#define UART_BUG_TXEN (1 << 1)
90#define UART_BUG_NOMSR (1 << 2)
91#define UART_BUG_THRE (1 << 3)
92#define UART_BUG_PARITY (1 << 4)
93
94
95#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
96#define SERIAL8250_SHARE_IRQS 1
97#else
98#define SERIAL8250_SHARE_IRQS 0
99#endif
100
101#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
102 { \
103 .iobase = _base, \
104 .irq = _irq, \
105 .uartclk = 1843200, \
106 .iotype = UPIO_PORT, \
107 .flags = UPF_BOOT_AUTOCONF | (_flags), \
108 }
109
110#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
111
112
113static inline int serial_in(struct uart_8250_port *up, int offset)
114{
115 return up->port.serial_in(&up->port, offset);
116}
117
118static inline void serial_out(struct uart_8250_port *up, int offset, int value)
119{
120 up->port.serial_out(&up->port, offset, value);
121}
122
123void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
124
125static inline int serial_dl_read(struct uart_8250_port *up)
126{
127 return up->dl_read(up);
128}
129
130static inline void serial_dl_write(struct uart_8250_port *up, int value)
131{
132 up->dl_write(up, value);
133}
134
135struct uart_8250_port *serial8250_get_port(int line);
136
137void serial8250_rpm_get(struct uart_8250_port *p);
138void serial8250_rpm_put(struct uart_8250_port *p);
139
140void serial8250_rpm_get_tx(struct uart_8250_port *p);
141void serial8250_rpm_put_tx(struct uart_8250_port *p);
142
143int serial8250_em485_init(struct uart_8250_port *p);
144void serial8250_em485_destroy(struct uart_8250_port *p);
145
146static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
147{
148 serial_out(up, UART_MCR, value);
149}
150
151static inline int serial8250_in_MCR(struct uart_8250_port *up)
152{
153 return serial_in(up, UART_MCR);
154}
155
156#if defined(__alpha__) && !defined(CONFIG_PCI)
157
158
159
160
161
162#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
163#else
164#define ALPHA_KLUDGE_MCR 0
165#endif
166
167#ifdef CONFIG_SERIAL_8250_PNP
168int serial8250_pnp_init(void);
169void serial8250_pnp_exit(void);
170#else
171static inline int serial8250_pnp_init(void) { return 0; }
172static inline void serial8250_pnp_exit(void) { }
173#endif
174
175#ifdef CONFIG_SERIAL_8250_FINTEK
176int fintek_8250_probe(struct uart_8250_port *uart);
177#else
178static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
179#endif
180
181#ifdef CONFIG_ARCH_OMAP1
182static inline int is_omap1_8250(struct uart_8250_port *pt)
183{
184 int res;
185
186 switch (pt->port.mapbase) {
187 case OMAP1_UART1_BASE:
188 case OMAP1_UART2_BASE:
189 case OMAP1_UART3_BASE:
190 res = 1;
191 break;
192 default:
193 res = 0;
194 break;
195 }
196
197 return res;
198}
199
200static inline int is_omap1510_8250(struct uart_8250_port *pt)
201{
202 if (!cpu_is_omap1510())
203 return 0;
204
205 return is_omap1_8250(pt);
206}
207#else
208static inline int is_omap1_8250(struct uart_8250_port *pt)
209{
210 return 0;
211}
212static inline int is_omap1510_8250(struct uart_8250_port *pt)
213{
214 return 0;
215}
216#endif
217
218#ifdef CONFIG_SERIAL_8250_DMA
219extern int serial8250_tx_dma(struct uart_8250_port *);
220extern int serial8250_rx_dma(struct uart_8250_port *);
221extern void serial8250_rx_dma_flush(struct uart_8250_port *);
222extern int serial8250_request_dma(struct uart_8250_port *);
223extern void serial8250_release_dma(struct uart_8250_port *);
224#else
225static inline int serial8250_tx_dma(struct uart_8250_port *p)
226{
227 return -1;
228}
229static inline int serial8250_rx_dma(struct uart_8250_port *p)
230{
231 return -1;
232}
233static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
234static inline int serial8250_request_dma(struct uart_8250_port *p)
235{
236 return -1;
237}
238static inline void serial8250_release_dma(struct uart_8250_port *p) { }
239#endif
240
241static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
242{
243 unsigned char status;
244
245 status = serial_in(up, 0x04);
246#define PRESL(x) ((x) & 0x30)
247 if (PRESL(status) == 0x10) {
248
249 return 0;
250 } else {
251 status &= ~0xB0;
252 status |= 0x10;
253 serial_out(up, 0x04, status);
254 }
255 return 1;
256}
257
258static inline int serial_index(struct uart_port *port)
259{
260 return port->minor - 64;
261}
262