LXR linux/include/uapi/linux/kfd

   1/*
   2 * Copyright 2014 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22
  23#ifndef KFD_IOCTL_H_INCLUDED
  24#define KFD_IOCTL_H_INCLUDED
  25
  26#include <drm/drm.h>
  27#include <linux/ioctl.h>
  28
  29#define KFD_IOCTL_MAJOR_VERSION 1
  30#define KFD_IOCTL_MINOR_VERSION 1
  31
  32struct kfd_ioctl_get_version_args {
  33        __u32 major_version;    /* from KFD */
  34        __u32 minor_version;    /* from KFD */
  35};
  36
  37/* For kfd_ioctl_create_queue_args.queue_type. */
  38#define KFD_IOC_QUEUE_TYPE_COMPUTE      0
  39#define KFD_IOC_QUEUE_TYPE_SDMA         1
  40#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL  2
  41
  42#define KFD_MAX_QUEUE_PERCENTAGE        100
  43#define KFD_MAX_QUEUE_PRIORITY          15
  44
  45struct kfd_ioctl_create_queue_args {
  46        __u64 ring_base_address;        /* to KFD */
  47        __u64 write_pointer_address;    /* from KFD */
  48        __u64 read_pointer_address;     /* from KFD */
  49        __u64 doorbell_offset;  /* from KFD */
  50
  51        __u32 ring_size;                /* to KFD */
  52        __u32 gpu_id;           /* to KFD */
  53        __u32 queue_type;               /* to KFD */
  54        __u32 queue_percentage; /* to KFD */
  55        __u32 queue_priority;   /* to KFD */
  56        __u32 queue_id;         /* from KFD */
  57
  58        __u64 eop_buffer_address;       /* to KFD */
  59        __u64 eop_buffer_size;  /* to KFD */
  60        __u64 ctx_save_restore_address; /* to KFD */
  61        __u64 ctx_save_restore_size;    /* to KFD */
  62};
  63
  64struct kfd_ioctl_destroy_queue_args {
  65        __u32 queue_id;         /* to KFD */
  66        __u32 pad;
  67};
  68
  69struct kfd_ioctl_update_queue_args {
  70        __u64 ring_base_address;        /* to KFD */
  71
  72        __u32 queue_id;         /* to KFD */
  73        __u32 ring_size;                /* to KFD */
  74        __u32 queue_percentage; /* to KFD */
  75        __u32 queue_priority;   /* to KFD */
  76};
  77
  78/* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
  79#define KFD_IOC_CACHE_POLICY_COHERENT 0
  80#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
  81
  82struct kfd_ioctl_set_memory_policy_args {
  83        __u64 alternate_aperture_base;  /* to KFD */
  84        __u64 alternate_aperture_size;  /* to KFD */
  85
  86        __u32 gpu_id;                   /* to KFD */
  87        __u32 default_policy;           /* to KFD */
  88        __u32 alternate_policy;         /* to KFD */
  89        __u32 pad;
  90};
  91
  92/*
  93 * All counters are monotonic. They are used for profiling of compute jobs.
  94 * The profiling is done by userspace.
  95 *
  96 * In case of GPU reset, the counter should not be affected.
  97 */
  98
  99struct kfd_ioctl_get_clock_counters_args {
 100        __u64 gpu_clock_counter;        /* from KFD */
 101        __u64 cpu_clock_counter;        /* from KFD */
 102        __u64 system_clock_counter;     /* from KFD */
 103        __u64 system_clock_freq;        /* from KFD */
 104
 105        __u32 gpu_id;           /* to KFD */
 106        __u32 pad;
 107};
 108
 109#define NUM_OF_SUPPORTED_GPUS 7
 110
 111struct kfd_process_device_apertures {
 112        __u64 lds_base;         /* from KFD */
 113        __u64 lds_limit;                /* from KFD */
 114        __u64 scratch_base;             /* from KFD */
 115        __u64 scratch_limit;            /* from KFD */
 116        __u64 gpuvm_base;               /* from KFD */
 117        __u64 gpuvm_limit;              /* from KFD */
 118        __u32 gpu_id;           /* from KFD */
 119        __u32 pad;
 120};
 121
 122struct kfd_ioctl_get_process_apertures_args {
 123        struct kfd_process_device_apertures
 124                        process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
 125
 126        /* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
 127        __u32 num_of_nodes;
 128        __u32 pad;
 129};
 130
 131#define MAX_ALLOWED_NUM_POINTS    100
 132#define MAX_ALLOWED_AW_BUFF_SIZE 4096
 133#define MAX_ALLOWED_WAC_BUFF_SIZE  128
 134
 135struct kfd_ioctl_dbg_register_args {
 136        __u32 gpu_id;           /* to KFD */
 137        __u32 pad;
 138};
 139
 140struct kfd_ioctl_dbg_unregister_args {
 141        __u32 gpu_id;           /* to KFD */
 142        __u32 pad;
 143};
 144
 145struct kfd_ioctl_dbg_address_watch_args {
 146        __u64 content_ptr;              /* a pointer to the actual content */
 147        __u32 gpu_id;           /* to KFD */
 148        __u32 buf_size_in_bytes;        /*including gpu_id and buf_size */
 149};
 150
 151struct kfd_ioctl_dbg_wave_control_args {
 152        __u64 content_ptr;              /* a pointer to the actual content */
 153        __u32 gpu_id;           /* to KFD */
 154        __u32 buf_size_in_bytes;        /*including gpu_id and buf_size */
 155};
 156
 157/* Matching HSA_EVENTTYPE */
 158#define KFD_IOC_EVENT_SIGNAL                    0
 159#define KFD_IOC_EVENT_NODECHANGE                1
 160#define KFD_IOC_EVENT_DEVICESTATECHANGE         2
 161#define KFD_IOC_EVENT_HW_EXCEPTION              3
 162#define KFD_IOC_EVENT_SYSTEM_EVENT              4
 163#define KFD_IOC_EVENT_DEBUG_EVENT               5
 164#define KFD_IOC_EVENT_PROFILE_EVENT             6
 165#define KFD_IOC_EVENT_QUEUE_EVENT               7
 166#define KFD_IOC_EVENT_MEMORY                    8
 167
 168#define KFD_IOC_WAIT_RESULT_COMPLETE            0
 169#define KFD_IOC_WAIT_RESULT_TIMEOUT             1
 170#define KFD_IOC_WAIT_RESULT_FAIL                2
 171
 172#define KFD_SIGNAL_EVENT_LIMIT                  256
 173
 174struct kfd_ioctl_create_event_args {
 175        __u64 event_page_offset;        /* from KFD */
 176        __u32 event_trigger_data;       /* from KFD - signal events only */
 177        __u32 event_type;               /* to KFD */
 178        __u32 auto_reset;               /* to KFD */
 179        __u32 node_id;          /* to KFD - only valid for certain
 180                                                        event types */
 181        __u32 event_id;         /* from KFD */
 182        __u32 event_slot_index; /* from KFD */
 183};
 184
 185struct kfd_ioctl_destroy_event_args {
 186        __u32 event_id;         /* to KFD */
 187        __u32 pad;
 188};
 189
 190struct kfd_ioctl_set_event_args {
 191        __u32 event_id;         /* to KFD */
 192        __u32 pad;
 193};
 194
 195struct kfd_ioctl_reset_event_args {
 196        __u32 event_id;         /* to KFD */
 197        __u32 pad;
 198};
 199
 200struct kfd_memory_exception_failure {
 201        __u32 NotPresent;       /* Page not present or supervisor privilege */
 202        __u32 ReadOnly; /* Write access to a read-only page */
 203        __u32 NoExecute;        /* Execute access to a page marked NX */
 204        __u32 pad;
 205};
 206
 207/* memory exception data*/
 208struct kfd_hsa_memory_exception_data {
 209        struct kfd_memory_exception_failure failure;
 210        __u64 va;
 211        __u32 gpu_id;
 212        __u32 pad;
 213};
 214
 215/* Event data*/
 216struct kfd_event_data {
 217        union {
 218                struct kfd_hsa_memory_exception_data memory_exception_data;
 219        };                              /* From KFD */
 220        __u64 kfd_event_data_ext;       /* pointer to an extension structure
 221                                           for future exception types */
 222        __u32 event_id;         /* to KFD */
 223        __u32 pad;
 224};
 225
 226struct kfd_ioctl_wait_events_args {
 227        __u64 events_ptr;               /* pointed to struct
 228                                           kfd_event_data array, to KFD */
 229        __u32 num_events;               /* to KFD */
 230        __u32 wait_for_all;             /* to KFD */
 231        __u32 timeout;          /* to KFD */
 232        __u32 wait_result;              /* from KFD */
 233};
 234
 235struct kfd_ioctl_set_scratch_backing_va_args {
 236        uint64_t va_addr;       /* to KFD */
 237        uint32_t gpu_id;        /* to KFD */
 238        uint32_t pad;
 239};
 240
 241struct kfd_ioctl_get_tile_config_args {
 242        /* to KFD: pointer to tile array */
 243        uint64_t tile_config_ptr;
 244        /* to KFD: pointer to macro tile array */
 245        uint64_t macro_tile_config_ptr;
 246        /* to KFD: array size allocated by user mode
 247         * from KFD: array size filled by kernel
 248         */
 249        uint32_t num_tile_configs;
 250        /* to KFD: array size allocated by user mode
 251         * from KFD: array size filled by kernel
 252         */
 253        uint32_t num_macro_tile_configs;
 254
 255        uint32_t gpu_id;                /* to KFD */
 256        uint32_t gb_addr_config;        /* from KFD */
 257        uint32_t num_banks;             /* from KFD */
 258        uint32_t num_ranks;             /* from KFD */
 259        /* struct size can be extended later if needed
 260         * without breaking ABI compatibility
 261         */
 262};
 263
 264#define AMDKFD_IOCTL_BASE 'K'
 265#define AMDKFD_IO(nr)                   _IO(AMDKFD_IOCTL_BASE, nr)
 266#define AMDKFD_IOR(nr, type)            _IOR(AMDKFD_IOCTL_BASE, nr, type)
 267#define AMDKFD_IOW(nr, type)            _IOW(AMDKFD_IOCTL_BASE, nr, type)
 268#define AMDKFD_IOWR(nr, type)           _IOWR(AMDKFD_IOCTL_BASE, nr, type)
 269
 270#define AMDKFD_IOC_GET_VERSION                  \
 271                AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
 272
 273#define AMDKFD_IOC_CREATE_QUEUE                 \
 274                AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
 275
 276#define AMDKFD_IOC_DESTROY_QUEUE                \
 277                AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
 278
 279#define AMDKFD_IOC_SET_MEMORY_POLICY            \
 280                AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
 281
 282#define AMDKFD_IOC_GET_CLOCK_COUNTERS           \
 283                AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
 284
 285#define AMDKFD_IOC_GET_PROCESS_APERTURES        \
 286                AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
 287
 288#define AMDKFD_IOC_UPDATE_QUEUE                 \
 289                AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
 290
 291#define AMDKFD_IOC_CREATE_EVENT                 \
 292                AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
 293
 294#define AMDKFD_IOC_DESTROY_EVENT                \
 295                AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
 296
 297#define AMDKFD_IOC_SET_EVENT                    \
 298                AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
 299
 300#define AMDKFD_IOC_RESET_EVENT                  \
 301                AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
 302
 303#define AMDKFD_IOC_WAIT_EVENTS                  \
 304                AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
 305
 306#define AMDKFD_IOC_DBG_REGISTER                 \
 307                AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
 308
 309#define AMDKFD_IOC_DBG_UNREGISTER               \
 310                AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
 311
 312#define AMDKFD_IOC_DBG_ADDRESS_WATCH            \
 313                AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
 314
 315#define AMDKFD_IOC_DBG_WAVE_CONTROL             \
 316                AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
 317
 318#define AMDKFD_IOC_SET_SCRATCH_BACKING_VA       \
 319                AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
 320
 321#define AMDKFD_IOC_GET_TILE_CONFIG                                      \
 322                AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
 323
 324#define AMDKFD_COMMAND_START            0x01
 325#define AMDKFD_COMMAND_END              0x13
 326
 327#endif
 328