LXR linux/arch/arm/mach-exynos/common.h

   1/*
   2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   3 *              http://www.samsung.com
   4 *
   5 * Common Header for EXYNOS machines
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
  13#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
  14
  15#include <linux/platform_data/cpuidle-exynos.h>
  16
  17#define EXYNOS3250_SOC_ID       0xE3472000
  18#define EXYNOS3_SOC_MASK        0xFFFFF000
  19
  20#define EXYNOS4210_CPU_ID       0x43210000
  21#define EXYNOS4212_CPU_ID       0x43220000
  22#define EXYNOS4412_CPU_ID       0xE4412200
  23#define EXYNOS4_CPU_MASK        0xFFFE0000
  24
  25#define EXYNOS5250_SOC_ID       0x43520000
  26#define EXYNOS5410_SOC_ID       0xE5410000
  27#define EXYNOS5420_SOC_ID       0xE5420000
  28#define EXYNOS5440_SOC_ID       0xE5440000
  29#define EXYNOS5800_SOC_ID       0xE5422000
  30#define EXYNOS5_SOC_MASK        0xFFFFF000
  31
  32extern unsigned long samsung_cpu_id;
  33
  34#define IS_SAMSUNG_CPU(name, id, mask)          \
  35static inline int is_samsung_##name(void)       \
  36{                                               \
  37        return ((samsung_cpu_id & mask) == (id & mask));        \
  38}
  39
  40IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
  41IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
  42IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
  43IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
  44IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
  45IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
  46IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
  47IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
  48IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
  49
  50#if defined(CONFIG_SOC_EXYNOS3250)
  51# define soc_is_exynos3250()    is_samsung_exynos3250()
  52#else
  53# define soc_is_exynos3250()    0
  54#endif
  55
  56#if defined(CONFIG_CPU_EXYNOS4210)
  57# define soc_is_exynos4210()    is_samsung_exynos4210()
  58#else
  59# define soc_is_exynos4210()    0
  60#endif
  61
  62#if defined(CONFIG_SOC_EXYNOS4212)
  63# define soc_is_exynos4212()    is_samsung_exynos4212()
  64#else
  65# define soc_is_exynos4212()    0
  66#endif
  67
  68#if defined(CONFIG_SOC_EXYNOS4412)
  69# define soc_is_exynos4412()    is_samsung_exynos4412()
  70#else
  71# define soc_is_exynos4412()    0
  72#endif
  73
  74#define EXYNOS4210_REV_0        (0x0)
  75#define EXYNOS4210_REV_1_0      (0x10)
  76#define EXYNOS4210_REV_1_1      (0x11)
  77
  78#if defined(CONFIG_SOC_EXYNOS5250)
  79# define soc_is_exynos5250()    is_samsung_exynos5250()
  80#else
  81# define soc_is_exynos5250()    0
  82#endif
  83
  84#if defined(CONFIG_SOC_EXYNOS5410)
  85# define soc_is_exynos5410()    is_samsung_exynos5410()
  86#else
  87# define soc_is_exynos5410()    0
  88#endif
  89
  90#if defined(CONFIG_SOC_EXYNOS5420)
  91# define soc_is_exynos5420()    is_samsung_exynos5420()
  92#else
  93# define soc_is_exynos5420()    0
  94#endif
  95
  96#if defined(CONFIG_SOC_EXYNOS5440)
  97# define soc_is_exynos5440()    is_samsung_exynos5440()
  98#else
  99# define soc_is_exynos5440()    0
 100#endif
 101
 102#if defined(CONFIG_SOC_EXYNOS5800)
 103# define soc_is_exynos5800()    is_samsung_exynos5800()
 104#else
 105# define soc_is_exynos5800()    0
 106#endif
 107
 108#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
 109                          soc_is_exynos4412())
 110#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
 111                          soc_is_exynos5420() || soc_is_exynos5800())
 112
 113extern u32 cp15_save_diag;
 114extern u32 cp15_save_power;
 115
 116extern void __iomem *sysram_ns_base_addr;
 117extern void __iomem *sysram_base_addr;
 118extern void __iomem *pmu_base_addr;
 119void exynos_sysram_init(void);
 120
 121enum {
 122        FW_DO_IDLE_SLEEP,
 123        FW_DO_IDLE_AFTR,
 124};
 125
 126void exynos_firmware_init(void);
 127
 128/* CPU BOOT mode flag for Exynos3250 SoC bootloader */
 129#define C2_STATE        (1 << 3)
 130/*
 131 * Magic values for bootloader indicating chosen low power mode.
 132 * See also Documentation/arm/Samsung/Bootloader-interface.txt
 133 */
 134#define EXYNOS_SLEEP_MAGIC      0x00000bad
 135#define EXYNOS_AFTR_MAGIC       0xfcba0d10
 136
 137void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
 138void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);
 139
 140extern u32 exynos_get_eint_wake_mask(void);
 141
 142#ifdef CONFIG_PM_SLEEP
 143extern void __init exynos_pm_init(void);
 144#else
 145static inline void exynos_pm_init(void) {}
 146#endif
 147
 148extern void exynos_cpu_resume(void);
 149extern void exynos_cpu_resume_ns(void);
 150
 151extern const struct smp_operations exynos_smp_ops;
 152
 153extern void exynos_cpu_power_down(int cpu);
 154extern void exynos_cpu_power_up(int cpu);
 155extern int  exynos_cpu_power_state(int cpu);
 156extern void exynos_cluster_power_down(int cluster);
 157extern void exynos_cluster_power_up(int cluster);
 158extern int  exynos_cluster_power_state(int cluster);
 159extern void exynos_cpu_save_register(void);
 160extern void exynos_cpu_restore_register(void);
 161extern void exynos_pm_central_suspend(void);
 162extern int exynos_pm_central_resume(void);
 163extern void exynos_enter_aftr(void);
 164
 165extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
 166
 167extern void exynos_set_delayed_reset_assertion(bool enable);
 168
 169extern unsigned int samsung_rev(void);
 170extern void exynos_core_restart(u32 core_id);
 171extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);
 172extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);
 173
 174static inline void pmu_raw_writel(u32 val, u32 offset)
 175{
 176        writel_relaxed(val, pmu_base_addr + offset);
 177}
 178
 179static inline u32 pmu_raw_readl(u32 offset)
 180{
 181        return readl_relaxed(pmu_base_addr + offset);
 182}
 183
 184#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
 185