1
2#ifndef __iop_version_defs_asm_h
3#define __iop_version_defs_asm_h
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17
18#ifndef REG_FIELD
19#define REG_FIELD( scope, reg, field, value ) \
20 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
21#define REG_FIELD_X_( value, shift ) ((value) << shift)
22#endif
23
24#ifndef REG_STATE
25#define REG_STATE( scope, reg, field, symbolic_value ) \
26 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
27#define REG_STATE_X_( k, shift ) (k << shift)
28#endif
29
30#ifndef REG_MASK
31#define REG_MASK( scope, reg, field ) \
32 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
33#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
34#endif
35
36#ifndef REG_LSB
37#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
38#endif
39
40#ifndef REG_BIT
41#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
42#endif
43
44#ifndef REG_ADDR
45#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
46#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
47#endif
48
49#ifndef REG_ADDR_VECT
50#define REG_ADDR_VECT( scope, inst, reg, index ) \
51 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
52 STRIDE_##scope##_##reg )
53#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
54 ((inst) + offs + (index) * stride)
55#endif
56
57
58#define reg_iop_version_r_version___nr___lsb 0
59#define reg_iop_version_r_version___nr___width 8
60#define reg_iop_version_r_version_offset 0
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64#define regk_iop_version_v1_0 0x00000001
65#endif
66