linux/drivers/clk/bcm/clk-bcm2835-aux.c
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   1/*
   2 * Copyright (C) 2015 Broadcom
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 */
  14
  15#include <linux/clk.h>
  16#include <linux/clk-provider.h>
  17#include <linux/clk/bcm2835.h>
  18#include <linux/module.h>
  19#include <linux/platform_device.h>
  20#include <dt-bindings/clock/bcm2835-aux.h>
  21
  22#define BCM2835_AUXIRQ          0x00
  23#define BCM2835_AUXENB          0x04
  24
  25static int bcm2835_aux_clk_probe(struct platform_device *pdev)
  26{
  27        struct device *dev = &pdev->dev;
  28        struct clk_hw_onecell_data *onecell;
  29        const char *parent;
  30        struct clk *parent_clk;
  31        struct resource *res;
  32        void __iomem *reg, *gate;
  33
  34        parent_clk = devm_clk_get(dev, NULL);
  35        if (IS_ERR(parent_clk))
  36                return PTR_ERR(parent_clk);
  37        parent = __clk_get_name(parent_clk);
  38
  39        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  40        reg = devm_ioremap_resource(dev, res);
  41        if (IS_ERR(reg))
  42                return PTR_ERR(reg);
  43
  44        onecell = devm_kmalloc(dev, sizeof(*onecell) + sizeof(*onecell->hws) *
  45                               BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
  46        if (!onecell)
  47                return -ENOMEM;
  48        onecell->num = BCM2835_AUX_CLOCK_COUNT;
  49
  50        gate = reg + BCM2835_AUXENB;
  51        onecell->hws[BCM2835_AUX_CLOCK_UART] =
  52                clk_hw_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
  53
  54        onecell->hws[BCM2835_AUX_CLOCK_SPI1] =
  55                clk_hw_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
  56
  57        onecell->hws[BCM2835_AUX_CLOCK_SPI2] =
  58                clk_hw_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
  59
  60        return of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
  61                                      onecell);
  62}
  63
  64static const struct of_device_id bcm2835_aux_clk_of_match[] = {
  65        { .compatible = "brcm,bcm2835-aux", },
  66        {},
  67};
  68MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match);
  69
  70static struct platform_driver bcm2835_aux_clk_driver = {
  71        .driver = {
  72                .name = "bcm2835-aux-clk",
  73                .of_match_table = bcm2835_aux_clk_of_match,
  74        },
  75        .probe          = bcm2835_aux_clk_probe,
  76};
  77builtin_platform_driver(bcm2835_aux_clk_driver);
  78
  79MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
  80MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver");
  81MODULE_LICENSE("GPL v2");
  82