LXR linux/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h

   1/*******************************************************************************
   2
   3  Intel 82599 Virtual Function driver
   4  Copyright(c) 1999 - 2015 Intel Corporation.
   5
   6  This program is free software; you can redistribute it and/or modify it
   7  under the terms and conditions of the GNU General Public License,
   8  version 2, as published by the Free Software Foundation.
   9
  10  This program is distributed in the hope it will be useful, but WITHOUT
  11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  more details.
  14
  15  You should have received a copy of the GNU General Public License along with
  16  this program; if not, see <http://www.gnu.org/licenses/>.
  17
  18  The full GNU General Public License is included in this distribution in
  19  the file called "COPYING".
  20
  21  Contact Information:
  22  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24
  25*******************************************************************************/
  26
  27#ifndef _IXGBEVF_H_
  28#define _IXGBEVF_H_
  29
  30#include <linux/types.h>
  31#include <linux/bitops.h>
  32#include <linux/timer.h>
  33#include <linux/io.h>
  34#include <linux/netdevice.h>
  35#include <linux/if_vlan.h>
  36#include <linux/u64_stats_sync.h>
  37
  38#include "vf.h"
  39
  40#define IXGBE_MAX_TXD_PWR       14
  41#define IXGBE_MAX_DATA_PER_TXD  BIT(IXGBE_MAX_TXD_PWR)
  42
  43/* Tx Descriptors needed, worst case */
  44#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
  45#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
  46
  47/* wrapper around a pointer to a socket buffer,
  48 * so a DMA handle can be stored along with the buffer
  49 */
  50struct ixgbevf_tx_buffer {
  51        union ixgbe_adv_tx_desc *next_to_watch;
  52        unsigned long time_stamp;
  53        struct sk_buff *skb;
  54        unsigned int bytecount;
  55        unsigned short gso_segs;
  56        __be16 protocol;
  57        DEFINE_DMA_UNMAP_ADDR(dma);
  58        DEFINE_DMA_UNMAP_LEN(len);
  59        u32 tx_flags;
  60};
  61
  62struct ixgbevf_rx_buffer {
  63        dma_addr_t dma;
  64        struct page *page;
  65        unsigned int page_offset;
  66};
  67
  68struct ixgbevf_stats {
  69        u64 packets;
  70        u64 bytes;
  71};
  72
  73struct ixgbevf_tx_queue_stats {
  74        u64 restart_queue;
  75        u64 tx_busy;
  76        u64 tx_done_old;
  77};
  78
  79struct ixgbevf_rx_queue_stats {
  80        u64 alloc_rx_page_failed;
  81        u64 alloc_rx_buff_failed;
  82        u64 csum_err;
  83};
  84
  85enum ixgbevf_ring_state_t {
  86        __IXGBEVF_TX_DETECT_HANG,
  87        __IXGBEVF_HANG_CHECK_ARMED,
  88};
  89
  90#define check_for_tx_hang(ring) \
  91        test_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
  92#define set_check_for_tx_hang(ring) \
  93        set_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
  94#define clear_check_for_tx_hang(ring) \
  95        clear_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
  96
  97struct ixgbevf_ring {
  98        struct ixgbevf_ring *next;
  99        struct net_device *netdev;
 100        struct device *dev;
 101        void *desc;                     /* descriptor ring memory */
 102        dma_addr_t dma;                 /* phys. address of descriptor ring */
 103        unsigned int size;              /* length in bytes */
 104        u16 count;                      /* amount of descriptors */
 105        u16 next_to_use;
 106        u16 next_to_clean;
 107        u16 next_to_alloc;
 108
 109        union {
 110                struct ixgbevf_tx_buffer *tx_buffer_info;
 111                struct ixgbevf_rx_buffer *rx_buffer_info;
 112        };
 113        unsigned long state;
 114        struct ixgbevf_stats stats;
 115        struct u64_stats_sync syncp;
 116        union {
 117                struct ixgbevf_tx_queue_stats tx_stats;
 118                struct ixgbevf_rx_queue_stats rx_stats;
 119        };
 120
 121        u64 hw_csum_rx_error;
 122        u8 __iomem *tail;
 123        struct sk_buff *skb;
 124
 125        /* holds the special value that gets the hardware register offset
 126         * associated with this ring, which is different for DCB and RSS modes
 127         */
 128        u16 reg_idx;
 129        int queue_index; /* needed for multiqueue queue management */
 130};
 131
 132/* How many Rx Buffers do we bundle into one write to the hardware ? */
 133#define IXGBEVF_RX_BUFFER_WRITE 16      /* Must be power of 2 */
 134
 135#define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES
 136#define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES
 137#define IXGBEVF_MAX_RSS_QUEUES          2
 138#define IXGBEVF_82599_RETA_SIZE         128     /* 128 entries */
 139#define IXGBEVF_X550_VFRETA_SIZE        64      /* 64 entries */
 140#define IXGBEVF_RSS_HASH_KEY_SIZE       40
 141#define IXGBEVF_VFRSSRK_REGS            10      /* 10 registers for RSS key */
 142
 143#define IXGBEVF_DEFAULT_TXD     1024
 144#define IXGBEVF_DEFAULT_RXD     512
 145#define IXGBEVF_MAX_TXD         4096
 146#define IXGBEVF_MIN_TXD         64
 147#define IXGBEVF_MAX_RXD         4096
 148#define IXGBEVF_MIN_RXD         64
 149
 150/* Supported Rx Buffer Sizes */
 151#define IXGBEVF_RXBUFFER_256    256    /* Used for packet split */
 152#define IXGBEVF_RXBUFFER_2048   2048
 153
 154#define IXGBEVF_RX_HDR_SIZE     IXGBEVF_RXBUFFER_256
 155#define IXGBEVF_RX_BUFSZ        IXGBEVF_RXBUFFER_2048
 156
 157#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
 158
 159#define IXGBE_TX_FLAGS_CSUM             BIT(0)
 160#define IXGBE_TX_FLAGS_VLAN             BIT(1)
 161#define IXGBE_TX_FLAGS_TSO              BIT(2)
 162#define IXGBE_TX_FLAGS_IPV4             BIT(3)
 163#define IXGBE_TX_FLAGS_VLAN_MASK        0xffff0000
 164#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK   0x0000e000
 165#define IXGBE_TX_FLAGS_VLAN_SHIFT       16
 166
 167struct ixgbevf_ring_container {
 168        struct ixgbevf_ring *ring;      /* pointer to linked list of rings */
 169        unsigned int total_bytes;       /* total bytes processed this int */
 170        unsigned int total_packets;     /* total packets processed this int */
 171        u8 count;                       /* total number of rings in vector */
 172        u8 itr;                         /* current ITR setting for ring */
 173};
 174
 175/* iterator for handling rings in ring container */
 176#define ixgbevf_for_each_ring(pos, head) \
 177        for (pos = (head).ring; pos != NULL; pos = pos->next)
 178
 179/* MAX_MSIX_Q_VECTORS of these are allocated,
 180 * but we only use one per queue-specific vector.
 181 */
 182struct ixgbevf_q_vector {
 183        struct ixgbevf_adapter *adapter;
 184        /* index of q_vector within array, also used for finding the bit in
 185         * EICR and friends that represents the vector for this ring
 186         */
 187        u16 v_idx;
 188        u16 itr; /* Interrupt throttle rate written to EITR */
 189        struct napi_struct napi;
 190        struct ixgbevf_ring_container rx, tx;
 191        char name[IFNAMSIZ + 9];
 192#ifdef CONFIG_NET_RX_BUSY_POLL
 193        unsigned int state;
 194#define IXGBEVF_QV_STATE_IDLE           0
 195#define IXGBEVF_QV_STATE_NAPI           1    /* NAPI owns this QV */
 196#define IXGBEVF_QV_STATE_POLL           2    /* poll owns this QV */
 197#define IXGBEVF_QV_STATE_DISABLED       4    /* QV is disabled */
 198#define IXGBEVF_QV_OWNED        (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL)
 199#define IXGBEVF_QV_LOCKED       (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED)
 200#define IXGBEVF_QV_STATE_NAPI_YIELD     8    /* NAPI yielded this QV */
 201#define IXGBEVF_QV_STATE_POLL_YIELD     16   /* poll yielded this QV */
 202#define IXGBEVF_QV_YIELD        (IXGBEVF_QV_STATE_NAPI_YIELD | \
 203                                 IXGBEVF_QV_STATE_POLL_YIELD)
 204#define IXGBEVF_QV_USER_PEND    (IXGBEVF_QV_STATE_POLL | \
 205                                 IXGBEVF_QV_STATE_POLL_YIELD)
 206        spinlock_t lock;
 207#endif /* CONFIG_NET_RX_BUSY_POLL */
 208};
 209
 210/* microsecond values for various ITR rates shifted by 2 to fit itr register
 211 * with the first 3 bits reserved 0
 212 */
 213#define IXGBE_MIN_RSC_ITR       24
 214#define IXGBE_100K_ITR          40
 215#define IXGBE_20K_ITR           200
 216#define IXGBE_12K_ITR           336
 217
 218/* Helper macros to switch between ints/sec and what the register uses.
 219 * And yes, it's the same math going both ways.  The lowest value
 220 * supported by all of the ixgbe hardware is 8.
 221 */
 222#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
 223        ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
 224#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
 225
 226/* ixgbevf_test_staterr - tests bits in Rx descriptor status and error fields */
 227static inline __le32 ixgbevf_test_staterr(union ixgbe_adv_rx_desc *rx_desc,
 228                                          const u32 stat_err_bits)
 229{
 230        return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
 231}
 232
 233static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring)
 234{
 235        u16 ntc = ring->next_to_clean;
 236        u16 ntu = ring->next_to_use;
 237
 238        return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
 239}
 240
 241static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value)
 242{
 243        writel(value, ring->tail);
 244}
 245
 246#define IXGBEVF_RX_DESC(R, i)   \
 247        (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
 248#define IXGBEVF_TX_DESC(R, i)   \
 249        (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
 250#define IXGBEVF_TX_CTXTDESC(R, i)       \
 251        (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
 252
 253#define IXGBE_MAX_JUMBO_FRAME_SIZE      9728 /* Maximum Supported Size 9.5KB */
 254
 255#define OTHER_VECTOR    1
 256#define NON_Q_VECTORS   (OTHER_VECTOR)
 257
 258#define MAX_MSIX_Q_VECTORS      2
 259
 260#define MIN_MSIX_Q_VECTORS      1
 261#define MIN_MSIX_COUNT          (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
 262
 263/* board specific private data structure */
 264struct ixgbevf_adapter {
 265        /* this field must be first, see ixgbevf_process_skb_fields */
 266        unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 267
 268        struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
 269
 270        /* Interrupt Throttle Rate */
 271        u16 rx_itr_setting;
 272        u16 tx_itr_setting;
 273
 274        /* interrupt masks */
 275        u32 eims_enable_mask;
 276        u32 eims_other;
 277
 278        /* TX */
 279        int num_tx_queues;
 280        struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */
 281        u64 restart_queue;
 282        u32 tx_timeout_count;
 283
 284        /* RX */
 285        int num_rx_queues;
 286        struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */
 287        u64 hw_csum_rx_error;
 288        u64 hw_rx_no_dma_resources;
 289        int num_msix_vectors;
 290        u32 alloc_rx_page_failed;
 291        u32 alloc_rx_buff_failed;
 292
 293        struct msix_entry *msix_entries;
 294
 295        /* OS defined structs */
 296        struct net_device *netdev;
 297        struct pci_dev *pdev;
 298
 299        /* structs defined in ixgbe_vf.h */
 300        struct ixgbe_hw hw;
 301        u16 msg_enable;
 302        /* Interrupt Throttle Rate */
 303        u32 eitr_param;
 304
 305        struct ixgbevf_hw_stats stats;
 306
 307        unsigned long state;
 308        u64 tx_busy;
 309        unsigned int tx_ring_count;
 310        unsigned int rx_ring_count;
 311
 312        u8 __iomem *io_addr; /* Mainly for iounmap use */
 313        u32 link_speed;
 314        bool link_up;
 315
 316        struct timer_list service_timer;
 317        struct work_struct service_task;
 318
 319        spinlock_t mbx_lock;
 320        unsigned long last_reset;
 321
 322        u32 *rss_key;
 323        u8 rss_indir_tbl[IXGBEVF_X550_VFRETA_SIZE];
 324};
 325
 326enum ixbgevf_state_t {
 327        __IXGBEVF_TESTING,
 328        __IXGBEVF_RESETTING,
 329        __IXGBEVF_DOWN,
 330        __IXGBEVF_DISABLED,
 331        __IXGBEVF_REMOVING,
 332        __IXGBEVF_SERVICE_SCHED,
 333        __IXGBEVF_SERVICE_INITED,
 334        __IXGBEVF_RESET_REQUESTED,
 335        __IXGBEVF_QUEUE_RESET_REQUESTED,
 336};
 337
 338enum ixgbevf_boards {
 339        board_82599_vf,
 340        board_82599_vf_hv,
 341        board_X540_vf,
 342        board_X540_vf_hv,
 343        board_X550_vf,
 344        board_X550_vf_hv,
 345        board_X550EM_x_vf,
 346        board_X550EM_x_vf_hv,
 347        board_x550em_a_vf,
 348};
 349
 350enum ixgbevf_xcast_modes {
 351        IXGBEVF_XCAST_MODE_NONE = 0,
 352        IXGBEVF_XCAST_MODE_MULTI,
 353        IXGBEVF_XCAST_MODE_ALLMULTI,
 354        IXGBEVF_XCAST_MODE_PROMISC,
 355};
 356
 357extern const struct ixgbevf_info ixgbevf_82599_vf_info;
 358extern const struct ixgbevf_info ixgbevf_X540_vf_info;
 359extern const struct ixgbevf_info ixgbevf_X550_vf_info;
 360extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info;
 361extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
 362extern const struct ixgbevf_info ixgbevf_x550em_a_vf_info;
 363
 364extern const struct ixgbevf_info ixgbevf_82599_vf_hv_info;
 365extern const struct ixgbevf_info ixgbevf_X540_vf_hv_info;
 366extern const struct ixgbevf_info ixgbevf_X550_vf_hv_info;
 367extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info;
 368extern const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops;
 369
 370/* needed by ethtool.c */
 371extern const char ixgbevf_driver_name[];
 372extern const char ixgbevf_driver_version[];
 373
 374int ixgbevf_open(struct net_device *netdev);
 375int ixgbevf_close(struct net_device *netdev);
 376void ixgbevf_up(struct ixgbevf_adapter *adapter);
 377void ixgbevf_down(struct ixgbevf_adapter *adapter);
 378void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
 379void ixgbevf_reset(struct ixgbevf_adapter *adapter);
 380void ixgbevf_set_ethtool_ops(struct net_device *netdev);
 381int ixgbevf_setup_rx_resources(struct ixgbevf_ring *);
 382int ixgbevf_setup_tx_resources(struct ixgbevf_ring *);
 383void ixgbevf_free_rx_resources(struct ixgbevf_ring *);
 384void ixgbevf_free_tx_resources(struct ixgbevf_ring *);
 385void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
 386int ethtool_ioctl(struct ifreq *ifr);
 387
 388extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector);
 389
 390void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
 391void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
 392
 393#define ixgbevf_hw_to_netdev(hw) \
 394        (((struct ixgbevf_adapter *)(hw)->back)->netdev)
 395
 396#define hw_dbg(hw, format, arg...) \
 397        netdev_dbg(ixgbevf_hw_to_netdev(hw), format, ## arg)
 398#endif /* _IXGBEVF_H_ */
 399