1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34#include <linux/bpf.h>
35#include <linux/etherdevice.h>
36#include <linux/tcp.h>
37#include <linux/if_vlan.h>
38#include <linux/delay.h>
39#include <linux/slab.h>
40#include <linux/hash.h>
41#include <net/ip.h>
42#include <net/busy_poll.h>
43#include <net/vxlan.h>
44#include <net/devlink.h>
45
46#include <linux/mlx4/driver.h>
47#include <linux/mlx4/device.h>
48#include <linux/mlx4/cmd.h>
49#include <linux/mlx4/cq.h>
50
51#include "mlx4_en.h"
52#include "en_port.h"
53
54#define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
55 XDP_PACKET_HEADROOM))
56
57int mlx4_en_setup_tc(struct net_device *dev, u8 up)
58{
59 struct mlx4_en_priv *priv = netdev_priv(dev);
60 int i;
61 unsigned int offset = 0;
62
63 if (up && up != MLX4_EN_NUM_UP_HIGH)
64 return -EINVAL;
65
66 netdev_set_num_tc(dev, up);
67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
68
69 for (i = 0; i < up; i++) {
70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
71 offset += priv->num_tx_rings_p_up;
72 }
73
74#ifdef CONFIG_MLX4_EN_DCB
75 if (!mlx4_is_slave(priv->mdev->dev)) {
76 if (up) {
77 if (priv->dcbx_cap)
78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
79 } else {
80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
81 priv->cee_config.pfc_state = false;
82 }
83 }
84#endif
85
86 return 0;
87}
88
89int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)
90{
91 struct mlx4_en_priv *priv = netdev_priv(dev);
92 struct mlx4_en_dev *mdev = priv->mdev;
93 struct mlx4_en_port_profile new_prof;
94 struct mlx4_en_priv *tmp;
95 int port_up = 0;
96 int err = 0;
97
98 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
99 if (!tmp)
100 return -ENOMEM;
101
102 mutex_lock(&mdev->state_lock);
103 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
104 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :
105 MLX4_EN_NUM_UP_HIGH;
106 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *
107 new_prof.num_up;
108 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
109 if (err)
110 goto out;
111
112 if (priv->port_up) {
113 port_up = 1;
114 mlx4_en_stop_port(dev, 1);
115 }
116
117 mlx4_en_safe_replace_resources(priv, tmp);
118 if (port_up) {
119 err = mlx4_en_start_port(dev);
120 if (err) {
121 en_err(priv, "Failed starting port for setup TC\n");
122 goto out;
123 }
124 }
125
126 err = mlx4_en_setup_tc(dev, tc);
127out:
128 mutex_unlock(&mdev->state_lock);
129 kfree(tmp);
130 return err;
131}
132
133static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,
134 void *type_data)
135{
136 struct tc_mqprio_qopt *mqprio = type_data;
137
138 if (type != TC_SETUP_MQPRIO)
139 return -EOPNOTSUPP;
140
141 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)
142 return -EINVAL;
143
144 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
145
146 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);
147}
148
149#ifdef CONFIG_RFS_ACCEL
150
151struct mlx4_en_filter {
152 struct list_head next;
153 struct work_struct work;
154
155 u8 ip_proto;
156 __be32 src_ip;
157 __be32 dst_ip;
158 __be16 src_port;
159 __be16 dst_port;
160
161 int rxq_index;
162 struct mlx4_en_priv *priv;
163 u32 flow_id;
164 int id;
165 u64 reg_id;
166 u8 activated;
167
168
169 struct hlist_node filter_chain;
170};
171
172static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
173
174static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
175{
176 switch (ip_proto) {
177 case IPPROTO_UDP:
178 return MLX4_NET_TRANS_RULE_ID_UDP;
179 case IPPROTO_TCP:
180 return MLX4_NET_TRANS_RULE_ID_TCP;
181 default:
182 return MLX4_NET_TRANS_RULE_NUM;
183 }
184};
185
186
187
188
189static void mlx4_en_filter_work(struct work_struct *work)
190{
191 struct mlx4_en_filter *filter = container_of(work,
192 struct mlx4_en_filter,
193 work);
194 struct mlx4_en_priv *priv = filter->priv;
195 struct mlx4_spec_list spec_tcp_udp = {
196 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
197 {
198 .tcp_udp = {
199 .dst_port = filter->dst_port,
200 .dst_port_msk = (__force __be16)-1,
201 .src_port = filter->src_port,
202 .src_port_msk = (__force __be16)-1,
203 },
204 },
205 };
206 struct mlx4_spec_list spec_ip = {
207 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
208 {
209 .ipv4 = {
210 .dst_ip = filter->dst_ip,
211 .dst_ip_msk = (__force __be32)-1,
212 .src_ip = filter->src_ip,
213 .src_ip_msk = (__force __be32)-1,
214 },
215 },
216 };
217 struct mlx4_spec_list spec_eth = {
218 .id = MLX4_NET_TRANS_RULE_ID_ETH,
219 };
220 struct mlx4_net_trans_rule rule = {
221 .list = LIST_HEAD_INIT(rule.list),
222 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
223 .exclusive = 1,
224 .allow_loopback = 1,
225 .promisc_mode = MLX4_FS_REGULAR,
226 .port = priv->port,
227 .priority = MLX4_DOMAIN_RFS,
228 };
229 int rc;
230 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
231
232 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
233 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
234 filter->ip_proto);
235 goto ignore;
236 }
237 list_add_tail(&spec_eth.list, &rule.list);
238 list_add_tail(&spec_ip.list, &rule.list);
239 list_add_tail(&spec_tcp_udp.list, &rule.list);
240
241 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
242 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
243 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
244
245 filter->activated = 0;
246
247 if (filter->reg_id) {
248 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
249 if (rc && rc != -ENOENT)
250 en_err(priv, "Error detaching flow. rc = %d\n", rc);
251 }
252
253 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
254 if (rc)
255 en_err(priv, "Error attaching flow. err = %d\n", rc);
256
257ignore:
258 mlx4_en_filter_rfs_expire(priv);
259
260 filter->activated = 1;
261}
262
263static inline struct hlist_head *
264filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
265 __be16 src_port, __be16 dst_port)
266{
267 unsigned long l;
268 int bucket_idx;
269
270 l = (__force unsigned long)src_port |
271 ((__force unsigned long)dst_port << 2);
272 l ^= (__force unsigned long)(src_ip ^ dst_ip);
273
274 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
275
276 return &priv->filter_hash[bucket_idx];
277}
278
279static struct mlx4_en_filter *
280mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
281 __be32 dst_ip, u8 ip_proto, __be16 src_port,
282 __be16 dst_port, u32 flow_id)
283{
284 struct mlx4_en_filter *filter = NULL;
285
286 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
287 if (!filter)
288 return NULL;
289
290 filter->priv = priv;
291 filter->rxq_index = rxq_index;
292 INIT_WORK(&filter->work, mlx4_en_filter_work);
293
294 filter->src_ip = src_ip;
295 filter->dst_ip = dst_ip;
296 filter->ip_proto = ip_proto;
297 filter->src_port = src_port;
298 filter->dst_port = dst_port;
299
300 filter->flow_id = flow_id;
301
302 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
303
304 list_add_tail(&filter->next, &priv->filters);
305 hlist_add_head(&filter->filter_chain,
306 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
307 dst_port));
308
309 return filter;
310}
311
312static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
313{
314 struct mlx4_en_priv *priv = filter->priv;
315 int rc;
316
317 list_del(&filter->next);
318
319 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
320 if (rc && rc != -ENOENT)
321 en_err(priv, "Error detaching flow. rc = %d\n", rc);
322
323 kfree(filter);
324}
325
326static inline struct mlx4_en_filter *
327mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
328 u8 ip_proto, __be16 src_port, __be16 dst_port)
329{
330 struct mlx4_en_filter *filter;
331 struct mlx4_en_filter *ret = NULL;
332
333 hlist_for_each_entry(filter,
334 filter_hash_bucket(priv, src_ip, dst_ip,
335 src_port, dst_port),
336 filter_chain) {
337 if (filter->src_ip == src_ip &&
338 filter->dst_ip == dst_ip &&
339 filter->ip_proto == ip_proto &&
340 filter->src_port == src_port &&
341 filter->dst_port == dst_port) {
342 ret = filter;
343 break;
344 }
345 }
346
347 return ret;
348}
349
350static int
351mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
352 u16 rxq_index, u32 flow_id)
353{
354 struct mlx4_en_priv *priv = netdev_priv(net_dev);
355 struct mlx4_en_filter *filter;
356 const struct iphdr *ip;
357 const __be16 *ports;
358 u8 ip_proto;
359 __be32 src_ip;
360 __be32 dst_ip;
361 __be16 src_port;
362 __be16 dst_port;
363 int nhoff = skb_network_offset(skb);
364 int ret = 0;
365
366 if (skb->protocol != htons(ETH_P_IP))
367 return -EPROTONOSUPPORT;
368
369 ip = (const struct iphdr *)(skb->data + nhoff);
370 if (ip_is_fragment(ip))
371 return -EPROTONOSUPPORT;
372
373 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
374 return -EPROTONOSUPPORT;
375 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
376
377 ip_proto = ip->protocol;
378 src_ip = ip->saddr;
379 dst_ip = ip->daddr;
380 src_port = ports[0];
381 dst_port = ports[1];
382
383 spin_lock_bh(&priv->filters_lock);
384 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
385 src_port, dst_port);
386 if (filter) {
387 if (filter->rxq_index == rxq_index)
388 goto out;
389
390 filter->rxq_index = rxq_index;
391 } else {
392 filter = mlx4_en_filter_alloc(priv, rxq_index,
393 src_ip, dst_ip, ip_proto,
394 src_port, dst_port, flow_id);
395 if (!filter) {
396 ret = -ENOMEM;
397 goto err;
398 }
399 }
400
401 queue_work(priv->mdev->workqueue, &filter->work);
402
403out:
404 ret = filter->id;
405err:
406 spin_unlock_bh(&priv->filters_lock);
407
408 return ret;
409}
410
411void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
412{
413 struct mlx4_en_filter *filter, *tmp;
414 LIST_HEAD(del_list);
415
416 spin_lock_bh(&priv->filters_lock);
417 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
418 list_move(&filter->next, &del_list);
419 hlist_del(&filter->filter_chain);
420 }
421 spin_unlock_bh(&priv->filters_lock);
422
423 list_for_each_entry_safe(filter, tmp, &del_list, next) {
424 cancel_work_sync(&filter->work);
425 mlx4_en_filter_free(filter);
426 }
427}
428
429static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
430{
431 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
432 LIST_HEAD(del_list);
433 int i = 0;
434
435 spin_lock_bh(&priv->filters_lock);
436 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
437 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
438 break;
439
440 if (filter->activated &&
441 !work_pending(&filter->work) &&
442 rps_may_expire_flow(priv->dev,
443 filter->rxq_index, filter->flow_id,
444 filter->id)) {
445 list_move(&filter->next, &del_list);
446 hlist_del(&filter->filter_chain);
447 } else
448 last_filter = filter;
449
450 i++;
451 }
452
453 if (last_filter && (&last_filter->next != priv->filters.next))
454 list_move(&priv->filters, &last_filter->next);
455
456 spin_unlock_bh(&priv->filters_lock);
457
458 list_for_each_entry_safe(filter, tmp, &del_list, next)
459 mlx4_en_filter_free(filter);
460}
461#endif
462
463static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
464 __be16 proto, u16 vid)
465{
466 struct mlx4_en_priv *priv = netdev_priv(dev);
467 struct mlx4_en_dev *mdev = priv->mdev;
468 int err;
469 int idx;
470
471 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
472
473 set_bit(vid, priv->active_vlans);
474
475
476 mutex_lock(&mdev->state_lock);
477 if (mdev->device_up && priv->port_up) {
478 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
479 if (err) {
480 en_err(priv, "Failed configuring VLAN filter\n");
481 goto out;
482 }
483 }
484 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
485 if (err)
486 en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
487
488out:
489 mutex_unlock(&mdev->state_lock);
490 return err;
491}
492
493static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
494 __be16 proto, u16 vid)
495{
496 struct mlx4_en_priv *priv = netdev_priv(dev);
497 struct mlx4_en_dev *mdev = priv->mdev;
498 int err = 0;
499
500 en_dbg(HW, priv, "Killing VID:%d\n", vid);
501
502 clear_bit(vid, priv->active_vlans);
503
504
505 mutex_lock(&mdev->state_lock);
506 mlx4_unregister_vlan(mdev->dev, priv->port, vid);
507
508 if (mdev->device_up && priv->port_up) {
509 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
510 if (err)
511 en_err(priv, "Failed configuring VLAN filter\n");
512 }
513 mutex_unlock(&mdev->state_lock);
514
515 return err;
516}
517
518static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
519{
520 int i;
521 for (i = ETH_ALEN - 1; i >= 0; --i) {
522 dst_mac[i] = src_mac & 0xff;
523 src_mac >>= 8;
524 }
525 memset(&dst_mac[ETH_ALEN], 0, 2);
526}
527
528
529static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
530 int qpn, u64 *reg_id)
531{
532 int err;
533
534 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
535 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
536 return 0;
537
538 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
539 MLX4_DOMAIN_NIC, reg_id);
540 if (err) {
541 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
542 return err;
543 }
544 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
545 return 0;
546}
547
548
549static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
550 unsigned char *mac, int *qpn, u64 *reg_id)
551{
552 struct mlx4_en_dev *mdev = priv->mdev;
553 struct mlx4_dev *dev = mdev->dev;
554 int err;
555
556 switch (dev->caps.steering_mode) {
557 case MLX4_STEERING_MODE_B0: {
558 struct mlx4_qp qp;
559 u8 gid[16] = {0};
560
561 qp.qpn = *qpn;
562 memcpy(&gid[10], mac, ETH_ALEN);
563 gid[5] = priv->port;
564
565 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
566 break;
567 }
568 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
569 struct mlx4_spec_list spec_eth = { {NULL} };
570 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
571
572 struct mlx4_net_trans_rule rule = {
573 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
574 .exclusive = 0,
575 .allow_loopback = 1,
576 .promisc_mode = MLX4_FS_REGULAR,
577 .priority = MLX4_DOMAIN_NIC,
578 };
579
580 rule.port = priv->port;
581 rule.qpn = *qpn;
582 INIT_LIST_HEAD(&rule.list);
583
584 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
585 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
586 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
587 list_add_tail(&spec_eth.list, &rule.list);
588
589 err = mlx4_flow_attach(dev, &rule, reg_id);
590 break;
591 }
592 default:
593 return -EINVAL;
594 }
595 if (err)
596 en_warn(priv, "Failed Attaching Unicast\n");
597
598 return err;
599}
600
601static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
602 unsigned char *mac, int qpn, u64 reg_id)
603{
604 struct mlx4_en_dev *mdev = priv->mdev;
605 struct mlx4_dev *dev = mdev->dev;
606
607 switch (dev->caps.steering_mode) {
608 case MLX4_STEERING_MODE_B0: {
609 struct mlx4_qp qp;
610 u8 gid[16] = {0};
611
612 qp.qpn = qpn;
613 memcpy(&gid[10], mac, ETH_ALEN);
614 gid[5] = priv->port;
615
616 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
617 break;
618 }
619 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
620 mlx4_flow_detach(dev, reg_id);
621 break;
622 }
623 default:
624 en_err(priv, "Invalid steering mode.\n");
625 }
626}
627
628static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
629{
630 struct mlx4_en_dev *mdev = priv->mdev;
631 struct mlx4_dev *dev = mdev->dev;
632 int index = 0;
633 int err = 0;
634 int *qpn = &priv->base_qpn;
635 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
636
637 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
638 priv->dev->dev_addr);
639 index = mlx4_register_mac(dev, priv->port, mac);
640 if (index < 0) {
641 err = index;
642 en_err(priv, "Failed adding MAC: %pM\n",
643 priv->dev->dev_addr);
644 return err;
645 }
646
647 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);
648
649 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
650 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
651 *qpn = base_qpn + index;
652 return 0;
653 }
654
655 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,
656 MLX4_RES_USAGE_DRIVER);
657 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
658 if (err) {
659 en_err(priv, "Failed to reserve qp for mac registration\n");
660 mlx4_unregister_mac(dev, priv->port, mac);
661 return err;
662 }
663
664 return 0;
665}
666
667static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
668{
669 struct mlx4_en_dev *mdev = priv->mdev;
670 struct mlx4_dev *dev = mdev->dev;
671 int qpn = priv->base_qpn;
672
673 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
674 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
675 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
676 priv->dev->dev_addr);
677 mlx4_unregister_mac(dev, priv->port, mac);
678 } else {
679 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
680 priv->port, qpn);
681 mlx4_qp_release_range(dev, qpn, 1);
682 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
683 }
684}
685
686static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
687 unsigned char *new_mac, unsigned char *prev_mac)
688{
689 struct mlx4_en_dev *mdev = priv->mdev;
690 struct mlx4_dev *dev = mdev->dev;
691 int err = 0;
692 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
693
694 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
695 struct hlist_head *bucket;
696 unsigned int mac_hash;
697 struct mlx4_mac_entry *entry;
698 struct hlist_node *tmp;
699 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
700
701 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
702 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
703 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
704 mlx4_en_uc_steer_release(priv, entry->mac,
705 qpn, entry->reg_id);
706 mlx4_unregister_mac(dev, priv->port,
707 prev_mac_u64);
708 hlist_del_rcu(&entry->hlist);
709 synchronize_rcu();
710 memcpy(entry->mac, new_mac, ETH_ALEN);
711 entry->reg_id = 0;
712 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
713 hlist_add_head_rcu(&entry->hlist,
714 &priv->mac_hash[mac_hash]);
715 mlx4_register_mac(dev, priv->port, new_mac_u64);
716 err = mlx4_en_uc_steer_add(priv, new_mac,
717 &qpn,
718 &entry->reg_id);
719 if (err)
720 return err;
721 if (priv->tunnel_reg_id) {
722 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
723 priv->tunnel_reg_id = 0;
724 }
725 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
726 &priv->tunnel_reg_id);
727 return err;
728 }
729 }
730 return -EINVAL;
731 }
732
733 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
734}
735
736static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,
737 unsigned char new_mac[ETH_ALEN + 2])
738{
739 struct mlx4_en_dev *mdev = priv->mdev;
740 int err;
741
742 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))
743 return;
744
745 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);
746 if (err)
747 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",
748 new_mac, priv->port, err);
749}
750
751static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
752 unsigned char new_mac[ETH_ALEN + 2])
753{
754 int err = 0;
755
756 if (priv->port_up) {
757
758 err = mlx4_en_replace_mac(priv, priv->base_qpn,
759 new_mac, priv->current_mac);
760 if (err)
761 en_err(priv, "Failed changing HW MAC address\n");
762 } else
763 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
764
765 if (!err)
766 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
767
768 return err;
769}
770
771static int mlx4_en_set_mac(struct net_device *dev, void *addr)
772{
773 struct mlx4_en_priv *priv = netdev_priv(dev);
774 struct mlx4_en_dev *mdev = priv->mdev;
775 struct sockaddr *saddr = addr;
776 unsigned char new_mac[ETH_ALEN + 2];
777 int err;
778
779 if (!is_valid_ether_addr(saddr->sa_data))
780 return -EADDRNOTAVAIL;
781
782 mutex_lock(&mdev->state_lock);
783 memcpy(new_mac, saddr->sa_data, ETH_ALEN);
784 err = mlx4_en_do_set_mac(priv, new_mac);
785 if (err)
786 goto out;
787
788 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
789 mlx4_en_update_user_mac(priv, new_mac);
790out:
791 mutex_unlock(&mdev->state_lock);
792
793 return err;
794}
795
796static void mlx4_en_clear_list(struct net_device *dev)
797{
798 struct mlx4_en_priv *priv = netdev_priv(dev);
799 struct mlx4_en_mc_list *tmp, *mc_to_del;
800
801 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
802 list_del(&mc_to_del->list);
803 kfree(mc_to_del);
804 }
805}
806
807static void mlx4_en_cache_mclist(struct net_device *dev)
808{
809 struct mlx4_en_priv *priv = netdev_priv(dev);
810 struct netdev_hw_addr *ha;
811 struct mlx4_en_mc_list *tmp;
812
813 mlx4_en_clear_list(dev);
814 netdev_for_each_mc_addr(ha, dev) {
815 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
816 if (!tmp) {
817 mlx4_en_clear_list(dev);
818 return;
819 }
820 memcpy(tmp->addr, ha->addr, ETH_ALEN);
821 list_add_tail(&tmp->list, &priv->mc_list);
822 }
823}
824
825static void update_mclist_flags(struct mlx4_en_priv *priv,
826 struct list_head *dst,
827 struct list_head *src)
828{
829 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
830 bool found;
831
832
833
834
835 list_for_each_entry(dst_tmp, dst, list) {
836 found = false;
837 list_for_each_entry(src_tmp, src, list) {
838 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
839 found = true;
840 break;
841 }
842 }
843 if (!found)
844 dst_tmp->action = MCLIST_REM;
845 }
846
847
848
849
850 list_for_each_entry(src_tmp, src, list) {
851 found = false;
852 list_for_each_entry(dst_tmp, dst, list) {
853 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
854 dst_tmp->action = MCLIST_NONE;
855 found = true;
856 break;
857 }
858 }
859 if (!found) {
860 new_mc = kmemdup(src_tmp,
861 sizeof(struct mlx4_en_mc_list),
862 GFP_KERNEL);
863 if (!new_mc)
864 return;
865
866 new_mc->action = MCLIST_ADD;
867 list_add_tail(&new_mc->list, dst);
868 }
869 }
870}
871
872static void mlx4_en_set_rx_mode(struct net_device *dev)
873{
874 struct mlx4_en_priv *priv = netdev_priv(dev);
875
876 if (!priv->port_up)
877 return;
878
879 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
880}
881
882static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
883 struct mlx4_en_dev *mdev)
884{
885 int err = 0;
886
887 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
888 if (netif_msg_rx_status(priv))
889 en_warn(priv, "Entering promiscuous mode\n");
890 priv->flags |= MLX4_EN_FLAG_PROMISC;
891
892
893 switch (mdev->dev->caps.steering_mode) {
894 case MLX4_STEERING_MODE_DEVICE_MANAGED:
895 err = mlx4_flow_steer_promisc_add(mdev->dev,
896 priv->port,
897 priv->base_qpn,
898 MLX4_FS_ALL_DEFAULT);
899 if (err)
900 en_err(priv, "Failed enabling promiscuous mode\n");
901 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
902 break;
903
904 case MLX4_STEERING_MODE_B0:
905 err = mlx4_unicast_promisc_add(mdev->dev,
906 priv->base_qpn,
907 priv->port);
908 if (err)
909 en_err(priv, "Failed enabling unicast promiscuous mode\n");
910
911
912
913
914 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
915 err = mlx4_multicast_promisc_add(mdev->dev,
916 priv->base_qpn,
917 priv->port);
918 if (err)
919 en_err(priv, "Failed enabling multicast promiscuous mode\n");
920 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
921 }
922 break;
923
924 case MLX4_STEERING_MODE_A0:
925 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
926 priv->port,
927 priv->base_qpn,
928 1);
929 if (err)
930 en_err(priv, "Failed enabling promiscuous mode\n");
931 break;
932 }
933
934
935 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
936 0, MLX4_MCAST_DISABLE);
937 if (err)
938 en_err(priv, "Failed disabling multicast filter\n");
939 }
940}
941
942static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
943 struct mlx4_en_dev *mdev)
944{
945 int err = 0;
946
947 if (netif_msg_rx_status(priv))
948 en_warn(priv, "Leaving promiscuous mode\n");
949 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
950
951
952 switch (mdev->dev->caps.steering_mode) {
953 case MLX4_STEERING_MODE_DEVICE_MANAGED:
954 err = mlx4_flow_steer_promisc_remove(mdev->dev,
955 priv->port,
956 MLX4_FS_ALL_DEFAULT);
957 if (err)
958 en_err(priv, "Failed disabling promiscuous mode\n");
959 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
960 break;
961
962 case MLX4_STEERING_MODE_B0:
963 err = mlx4_unicast_promisc_remove(mdev->dev,
964 priv->base_qpn,
965 priv->port);
966 if (err)
967 en_err(priv, "Failed disabling unicast promiscuous mode\n");
968
969 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
970 err = mlx4_multicast_promisc_remove(mdev->dev,
971 priv->base_qpn,
972 priv->port);
973 if (err)
974 en_err(priv, "Failed disabling multicast promiscuous mode\n");
975 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
976 }
977 break;
978
979 case MLX4_STEERING_MODE_A0:
980 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
981 priv->port,
982 priv->base_qpn, 0);
983 if (err)
984 en_err(priv, "Failed disabling promiscuous mode\n");
985 break;
986 }
987}
988
989static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
990 struct net_device *dev,
991 struct mlx4_en_dev *mdev)
992{
993 struct mlx4_en_mc_list *mclist, *tmp;
994 u64 mcast_addr = 0;
995 u8 mc_list[16] = {0};
996 int err = 0;
997
998
999 if (dev->flags & IFF_ALLMULTI) {
1000 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1001 0, MLX4_MCAST_DISABLE);
1002 if (err)
1003 en_err(priv, "Failed disabling multicast filter\n");
1004
1005
1006 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
1007 switch (mdev->dev->caps.steering_mode) {
1008 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1009 err = mlx4_flow_steer_promisc_add(mdev->dev,
1010 priv->port,
1011 priv->base_qpn,
1012 MLX4_FS_MC_DEFAULT);
1013 break;
1014
1015 case MLX4_STEERING_MODE_B0:
1016 err = mlx4_multicast_promisc_add(mdev->dev,
1017 priv->base_qpn,
1018 priv->port);
1019 break;
1020
1021 case MLX4_STEERING_MODE_A0:
1022 break;
1023 }
1024 if (err)
1025 en_err(priv, "Failed entering multicast promisc mode\n");
1026 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
1027 }
1028 } else {
1029
1030 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1031 switch (mdev->dev->caps.steering_mode) {
1032 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1033 err = mlx4_flow_steer_promisc_remove(mdev->dev,
1034 priv->port,
1035 MLX4_FS_MC_DEFAULT);
1036 break;
1037
1038 case MLX4_STEERING_MODE_B0:
1039 err = mlx4_multicast_promisc_remove(mdev->dev,
1040 priv->base_qpn,
1041 priv->port);
1042 break;
1043
1044 case MLX4_STEERING_MODE_A0:
1045 break;
1046 }
1047 if (err)
1048 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1049 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1050 }
1051
1052 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1053 0, MLX4_MCAST_DISABLE);
1054 if (err)
1055 en_err(priv, "Failed disabling multicast filter\n");
1056
1057
1058 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
1059 1, MLX4_MCAST_CONFIG);
1060
1061
1062
1063 netif_addr_lock_bh(dev);
1064 mlx4_en_cache_mclist(dev);
1065 netif_addr_unlock_bh(dev);
1066 list_for_each_entry(mclist, &priv->mc_list, list) {
1067 mcast_addr = mlx4_mac_to_u64(mclist->addr);
1068 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
1069 mcast_addr, 0, MLX4_MCAST_CONFIG);
1070 }
1071 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1072 0, MLX4_MCAST_ENABLE);
1073 if (err)
1074 en_err(priv, "Failed enabling multicast filter\n");
1075
1076 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
1077 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1078 if (mclist->action == MCLIST_REM) {
1079
1080 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1081 mc_list[5] = priv->port;
1082 err = mlx4_multicast_detach(mdev->dev,
1083 priv->rss_map.indir_qp,
1084 mc_list,
1085 MLX4_PROT_ETH,
1086 mclist->reg_id);
1087 if (err)
1088 en_err(priv, "Fail to detach multicast address\n");
1089
1090 if (mclist->tunnel_reg_id) {
1091 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
1092 if (err)
1093 en_err(priv, "Failed to detach multicast address\n");
1094 }
1095
1096
1097 list_del(&mclist->list);
1098 kfree(mclist);
1099 } else if (mclist->action == MCLIST_ADD) {
1100
1101 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1102
1103 mc_list[5] = priv->port;
1104 err = mlx4_multicast_attach(mdev->dev,
1105 priv->rss_map.indir_qp,
1106 mc_list,
1107 priv->port, 0,
1108 MLX4_PROT_ETH,
1109 &mclist->reg_id);
1110 if (err)
1111 en_err(priv, "Fail to attach multicast address\n");
1112
1113 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1114 &mclist->tunnel_reg_id);
1115 if (err)
1116 en_err(priv, "Failed to attach multicast address\n");
1117 }
1118 }
1119 }
1120}
1121
1122static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1123 struct net_device *dev,
1124 struct mlx4_en_dev *mdev)
1125{
1126 struct netdev_hw_addr *ha;
1127 struct mlx4_mac_entry *entry;
1128 struct hlist_node *tmp;
1129 bool found;
1130 u64 mac;
1131 int err = 0;
1132 struct hlist_head *bucket;
1133 unsigned int i;
1134 int removed = 0;
1135 u32 prev_flags;
1136
1137
1138
1139
1140
1141
1142 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1143 bucket = &priv->mac_hash[i];
1144 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1145 found = false;
1146 netdev_for_each_uc_addr(ha, dev) {
1147 if (ether_addr_equal_64bits(entry->mac,
1148 ha->addr)) {
1149 found = true;
1150 break;
1151 }
1152 }
1153
1154
1155 if (ether_addr_equal_64bits(entry->mac,
1156 priv->current_mac))
1157 found = true;
1158
1159 if (!found) {
1160 mac = mlx4_mac_to_u64(entry->mac);
1161 mlx4_en_uc_steer_release(priv, entry->mac,
1162 priv->base_qpn,
1163 entry->reg_id);
1164 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1165
1166 hlist_del_rcu(&entry->hlist);
1167 kfree_rcu(entry, rcu);
1168 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1169 entry->mac, priv->port);
1170 ++removed;
1171 }
1172 }
1173 }
1174
1175
1176
1177
1178 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1179 return;
1180
1181 prev_flags = priv->flags;
1182 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1183
1184
1185 netdev_for_each_uc_addr(ha, dev) {
1186 found = false;
1187 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1188 hlist_for_each_entry(entry, bucket, hlist) {
1189 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1190 found = true;
1191 break;
1192 }
1193 }
1194
1195 if (!found) {
1196 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1197 if (!entry) {
1198 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1199 ha->addr, priv->port);
1200 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1201 break;
1202 }
1203 mac = mlx4_mac_to_u64(ha->addr);
1204 memcpy(entry->mac, ha->addr, ETH_ALEN);
1205 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1206 if (err < 0) {
1207 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1208 ha->addr, priv->port, err);
1209 kfree(entry);
1210 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1211 break;
1212 }
1213 err = mlx4_en_uc_steer_add(priv, ha->addr,
1214 &priv->base_qpn,
1215 &entry->reg_id);
1216 if (err) {
1217 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1218 ha->addr, priv->port, err);
1219 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1220 kfree(entry);
1221 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1222 break;
1223 } else {
1224 unsigned int mac_hash;
1225 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1226 ha->addr, priv->port);
1227 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1228 bucket = &priv->mac_hash[mac_hash];
1229 hlist_add_head_rcu(&entry->hlist, bucket);
1230 }
1231 }
1232 }
1233
1234 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1235 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1236 priv->port);
1237 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1238 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1239 priv->port);
1240 }
1241}
1242
1243static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1244{
1245 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1246 rx_mode_task);
1247 struct mlx4_en_dev *mdev = priv->mdev;
1248 struct net_device *dev = priv->dev;
1249
1250 mutex_lock(&mdev->state_lock);
1251 if (!mdev->device_up) {
1252 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1253 goto out;
1254 }
1255 if (!priv->port_up) {
1256 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1257 goto out;
1258 }
1259
1260 if (!netif_carrier_ok(dev)) {
1261 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1262 if (priv->port_state.link_state) {
1263 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1264 netif_carrier_on(dev);
1265 en_dbg(LINK, priv, "Link Up\n");
1266 }
1267 }
1268 }
1269
1270 if (dev->priv_flags & IFF_UNICAST_FLT)
1271 mlx4_en_do_uc_filter(priv, dev, mdev);
1272
1273
1274 if ((dev->flags & IFF_PROMISC) ||
1275 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1276 mlx4_en_set_promisc_mode(priv, mdev);
1277 goto out;
1278 }
1279
1280
1281 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1282 mlx4_en_clear_promisc_mode(priv, mdev);
1283
1284 mlx4_en_do_multicast(priv, dev, mdev);
1285out:
1286 mutex_unlock(&mdev->state_lock);
1287}
1288
1289#ifdef CONFIG_NET_POLL_CONTROLLER
1290static void mlx4_en_netpoll(struct net_device *dev)
1291{
1292 struct mlx4_en_priv *priv = netdev_priv(dev);
1293 struct mlx4_en_cq *cq;
1294 int i;
1295
1296 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
1297 cq = priv->tx_cq[TX][i];
1298 napi_schedule(&cq->napi);
1299 }
1300}
1301#endif
1302
1303static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1304{
1305 u64 reg_id;
1306 int err = 0;
1307 int *qpn = &priv->base_qpn;
1308 struct mlx4_mac_entry *entry;
1309
1310 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);
1311 if (err)
1312 return err;
1313
1314 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
1315 &priv->tunnel_reg_id);
1316 if (err)
1317 goto tunnel_err;
1318
1319 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1320 if (!entry) {
1321 err = -ENOMEM;
1322 goto alloc_err;
1323 }
1324
1325 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
1326 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
1327 entry->reg_id = reg_id;
1328 hlist_add_head_rcu(&entry->hlist,
1329 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
1330
1331 return 0;
1332
1333alloc_err:
1334 if (priv->tunnel_reg_id)
1335 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1336
1337tunnel_err:
1338 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
1339 return err;
1340}
1341
1342static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
1343{
1344 u64 mac;
1345 unsigned int i;
1346 int qpn = priv->base_qpn;
1347 struct hlist_head *bucket;
1348 struct hlist_node *tmp;
1349 struct mlx4_mac_entry *entry;
1350
1351 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1352 bucket = &priv->mac_hash[i];
1353 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1354 mac = mlx4_mac_to_u64(entry->mac);
1355 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
1356 entry->mac);
1357 mlx4_en_uc_steer_release(priv, entry->mac,
1358 qpn, entry->reg_id);
1359
1360 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
1361 hlist_del_rcu(&entry->hlist);
1362 kfree_rcu(entry, rcu);
1363 }
1364 }
1365
1366 if (priv->tunnel_reg_id) {
1367 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1368 priv->tunnel_reg_id = 0;
1369 }
1370}
1371
1372static void mlx4_en_tx_timeout(struct net_device *dev)
1373{
1374 struct mlx4_en_priv *priv = netdev_priv(dev);
1375 struct mlx4_en_dev *mdev = priv->mdev;
1376 int i;
1377
1378 if (netif_msg_timer(priv))
1379 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1380
1381 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
1382 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i];
1383
1384 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
1385 continue;
1386 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1387 i, tx_ring->qpn, tx_ring->sp_cqn,
1388 tx_ring->cons, tx_ring->prod);
1389 }
1390
1391 priv->port_stats.tx_timeout++;
1392 en_dbg(DRV, priv, "Scheduling watchdog\n");
1393 queue_work(mdev->workqueue, &priv->watchdog_task);
1394}
1395
1396
1397static void
1398mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
1399{
1400 struct mlx4_en_priv *priv = netdev_priv(dev);
1401
1402 spin_lock_bh(&priv->stats_lock);
1403 mlx4_en_fold_software_stats(dev);
1404 netdev_stats_to_stats64(stats, &dev->stats);
1405 spin_unlock_bh(&priv->stats_lock);
1406}
1407
1408static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1409{
1410 struct mlx4_en_cq *cq;
1411 int i, t;
1412
1413
1414
1415
1416
1417
1418
1419 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1420 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1421 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1422 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1423 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1424 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1425
1426
1427 for (i = 0; i < priv->rx_ring_num; i++) {
1428 cq = priv->rx_cq[i];
1429 cq->moder_cnt = priv->rx_frames;
1430 cq->moder_time = priv->rx_usecs;
1431 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1432 priv->last_moder_packets[i] = 0;
1433 priv->last_moder_bytes[i] = 0;
1434 }
1435
1436 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1437 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1438 cq = priv->tx_cq[t][i];
1439 cq->moder_cnt = priv->tx_frames;
1440 cq->moder_time = priv->tx_usecs;
1441 }
1442 }
1443
1444
1445 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1446 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1447 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1448 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1449 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1450 priv->adaptive_rx_coal = 1;
1451 priv->last_moder_jiffies = 0;
1452 priv->last_moder_tx_packets = 0;
1453}
1454
1455static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1456{
1457 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1458 u32 pkt_rate_high, pkt_rate_low;
1459 struct mlx4_en_cq *cq;
1460 unsigned long packets;
1461 unsigned long rate;
1462 unsigned long avg_pkt_size;
1463 unsigned long rx_packets;
1464 unsigned long rx_bytes;
1465 unsigned long rx_pkt_diff;
1466 int moder_time;
1467 int ring, err;
1468
1469 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1470 return;
1471
1472 pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
1473 pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
1474
1475 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1476 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
1477 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
1478
1479 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
1480 packets = rx_pkt_diff;
1481 rate = packets * HZ / period;
1482 avg_pkt_size = packets ? (rx_bytes -
1483 priv->last_moder_bytes[ring]) / packets : 0;
1484
1485
1486
1487 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1488 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1489 if (rate <= pkt_rate_low)
1490 moder_time = priv->rx_usecs_low;
1491 else if (rate >= pkt_rate_high)
1492 moder_time = priv->rx_usecs_high;
1493 else
1494 moder_time = (rate - pkt_rate_low) *
1495 (priv->rx_usecs_high - priv->rx_usecs_low) /
1496 (pkt_rate_high - pkt_rate_low) +
1497 priv->rx_usecs_low;
1498 } else {
1499 moder_time = priv->rx_usecs_low;
1500 }
1501
1502 cq = priv->rx_cq[ring];
1503 if (moder_time != priv->last_moder_time[ring] ||
1504 cq->moder_cnt != priv->rx_frames) {
1505 priv->last_moder_time[ring] = moder_time;
1506 cq->moder_time = moder_time;
1507 cq->moder_cnt = priv->rx_frames;
1508 err = mlx4_en_set_cq_moder(priv, cq);
1509 if (err)
1510 en_err(priv, "Failed modifying moderation for cq:%d\n",
1511 ring);
1512 }
1513 priv->last_moder_packets[ring] = rx_packets;
1514 priv->last_moder_bytes[ring] = rx_bytes;
1515 }
1516
1517 priv->last_moder_jiffies = jiffies;
1518}
1519
1520static void mlx4_en_do_get_stats(struct work_struct *work)
1521{
1522 struct delayed_work *delay = to_delayed_work(work);
1523 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1524 stats_task);
1525 struct mlx4_en_dev *mdev = priv->mdev;
1526 int err;
1527
1528 mutex_lock(&mdev->state_lock);
1529 if (mdev->device_up) {
1530 if (priv->port_up) {
1531 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1532 if (err)
1533 en_dbg(HW, priv, "Could not update stats\n");
1534
1535 mlx4_en_auto_moderation(priv);
1536 }
1537
1538 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1539 }
1540 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1541 mlx4_en_do_set_mac(priv, priv->current_mac);
1542 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1543 }
1544 mutex_unlock(&mdev->state_lock);
1545}
1546
1547
1548
1549
1550static void mlx4_en_service_task(struct work_struct *work)
1551{
1552 struct delayed_work *delay = to_delayed_work(work);
1553 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1554 service_task);
1555 struct mlx4_en_dev *mdev = priv->mdev;
1556
1557 mutex_lock(&mdev->state_lock);
1558 if (mdev->device_up) {
1559 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1560 mlx4_en_ptp_overflow_check(mdev);
1561
1562 mlx4_en_recover_from_oom(priv);
1563 queue_delayed_work(mdev->workqueue, &priv->service_task,
1564 SERVICE_TASK_DELAY);
1565 }
1566 mutex_unlock(&mdev->state_lock);
1567}
1568
1569static void mlx4_en_linkstate(struct work_struct *work)
1570{
1571 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1572 linkstate_task);
1573 struct mlx4_en_dev *mdev = priv->mdev;
1574 int linkstate = priv->link_state;
1575
1576 mutex_lock(&mdev->state_lock);
1577
1578
1579 if (priv->last_link_state != linkstate) {
1580 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
1581 en_info(priv, "Link Down\n");
1582 netif_carrier_off(priv->dev);
1583 } else {
1584 en_info(priv, "Link Up\n");
1585 netif_carrier_on(priv->dev);
1586 }
1587 }
1588 priv->last_link_state = linkstate;
1589 mutex_unlock(&mdev->state_lock);
1590}
1591
1592static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1593{
1594 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1595 int numa_node = priv->mdev->dev->numa_node;
1596
1597 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
1598 return -ENOMEM;
1599
1600 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1601 ring->affinity_mask);
1602 return 0;
1603}
1604
1605static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1606{
1607 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1608}
1609
1610static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
1611 int tx_ring_idx)
1612{
1613 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
1614 int rr_index = tx_ring_idx;
1615
1616 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
1617 tx_ring->recycle_ring = priv->rx_ring[rr_index];
1618 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
1619 TX_XDP, tx_ring_idx, rr_index);
1620}
1621
1622int mlx4_en_start_port(struct net_device *dev)
1623{
1624 struct mlx4_en_priv *priv = netdev_priv(dev);
1625 struct mlx4_en_dev *mdev = priv->mdev;
1626 struct mlx4_en_cq *cq;
1627 struct mlx4_en_tx_ring *tx_ring;
1628 int rx_index = 0;
1629 int err = 0;
1630 int i, t;
1631 int j;
1632 u8 mc_list[16] = {0};
1633
1634 if (priv->port_up) {
1635 en_dbg(DRV, priv, "start port called while port already up\n");
1636 return 0;
1637 }
1638
1639 INIT_LIST_HEAD(&priv->mc_list);
1640 INIT_LIST_HEAD(&priv->curr_list);
1641 INIT_LIST_HEAD(&priv->ethtool_list);
1642 memset(&priv->ethtool_rules[0], 0,
1643 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1644
1645
1646 dev->mtu = min(dev->mtu, priv->max_mtu);
1647 mlx4_en_calc_rx_buf(dev);
1648 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1649
1650
1651 err = mlx4_en_activate_rx_rings(priv);
1652 if (err) {
1653 en_err(priv, "Failed to activate RX rings\n");
1654 return err;
1655 }
1656 for (i = 0; i < priv->rx_ring_num; i++) {
1657 cq = priv->rx_cq[i];
1658
1659 err = mlx4_en_init_affinity_hint(priv, i);
1660 if (err) {
1661 en_err(priv, "Failed preparing IRQ affinity hint\n");
1662 goto cq_err;
1663 }
1664
1665 err = mlx4_en_activate_cq(priv, cq, i);
1666 if (err) {
1667 en_err(priv, "Failed activating Rx CQ\n");
1668 mlx4_en_free_affinity_hint(priv, i);
1669 goto cq_err;
1670 }
1671
1672 for (j = 0; j < cq->size; j++) {
1673 struct mlx4_cqe *cqe = NULL;
1674
1675 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1676 priv->cqe_factor;
1677 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1678 }
1679
1680 err = mlx4_en_set_cq_moder(priv, cq);
1681 if (err) {
1682 en_err(priv, "Failed setting cq moderation parameters\n");
1683 mlx4_en_deactivate_cq(priv, cq);
1684 mlx4_en_free_affinity_hint(priv, i);
1685 goto cq_err;
1686 }
1687 mlx4_en_arm_cq(priv, cq);
1688 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1689 ++rx_index;
1690 }
1691
1692
1693 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1694 err = mlx4_en_get_qp(priv);
1695 if (err) {
1696 en_err(priv, "Failed getting eth qp\n");
1697 goto cq_err;
1698 }
1699 mdev->mac_removed[priv->port] = 0;
1700
1701 priv->counter_index =
1702 mlx4_get_default_counter_index(mdev->dev, priv->port);
1703
1704 err = mlx4_en_config_rss_steer(priv);
1705 if (err) {
1706 en_err(priv, "Failed configuring rss steering\n");
1707 goto mac_err;
1708 }
1709
1710 err = mlx4_en_create_drop_qp(priv);
1711 if (err)
1712 goto rss_err;
1713
1714
1715 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1716 u8 num_tx_rings_p_up = t == TX ?
1717 priv->num_tx_rings_p_up : priv->tx_ring_num[t];
1718
1719 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1720
1721 cq = priv->tx_cq[t][i];
1722 err = mlx4_en_activate_cq(priv, cq, i);
1723 if (err) {
1724 en_err(priv, "Failed allocating Tx CQ\n");
1725 goto tx_err;
1726 }
1727 err = mlx4_en_set_cq_moder(priv, cq);
1728 if (err) {
1729 en_err(priv, "Failed setting cq moderation parameters\n");
1730 mlx4_en_deactivate_cq(priv, cq);
1731 goto tx_err;
1732 }
1733 en_dbg(DRV, priv,
1734 "Resetting index of collapsed CQ:%d to -1\n", i);
1735 cq->buf->wqe_index = cpu_to_be16(0xffff);
1736
1737
1738 tx_ring = priv->tx_ring[t][i];
1739 err = mlx4_en_activate_tx_ring(priv, tx_ring,
1740 cq->mcq.cqn,
1741 i / num_tx_rings_p_up);
1742 if (err) {
1743 en_err(priv, "Failed allocating Tx ring\n");
1744 mlx4_en_deactivate_cq(priv, cq);
1745 goto tx_err;
1746 }
1747 if (t != TX_XDP) {
1748 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1749 tx_ring->recycle_ring = NULL;
1750
1751
1752 mlx4_en_arm_cq(priv, cq);
1753
1754 } else {
1755 mlx4_en_init_recycle_ring(priv, i);
1756
1757 }
1758
1759
1760 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1761 *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
1762 }
1763 }
1764
1765
1766 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1767 priv->rx_skb_size + ETH_FCS_LEN,
1768 priv->prof->tx_pause,
1769 priv->prof->tx_ppp,
1770 priv->prof->rx_pause,
1771 priv->prof->rx_ppp);
1772 if (err) {
1773 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1774 priv->port, err);
1775 goto tx_err;
1776 }
1777
1778 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
1779 if (err) {
1780 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
1781 dev->mtu, priv->port, err);
1782 goto tx_err;
1783 }
1784
1785
1786 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1787 if (err) {
1788 en_err(priv, "Failed setting default qp numbers\n");
1789 goto tx_err;
1790 }
1791
1792 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1793 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1794 if (err) {
1795 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1796 err);
1797 goto tx_err;
1798 }
1799 }
1800
1801
1802 en_dbg(HW, priv, "Initializing port\n");
1803 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1804 if (err) {
1805 en_err(priv, "Failed Initializing port\n");
1806 goto tx_err;
1807 }
1808
1809
1810 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
1811 mlx4_en_set_rss_steer_rules(priv))
1812 mlx4_warn(mdev, "Failed setting steering rules\n");
1813
1814
1815 eth_broadcast_addr(&mc_list[10]);
1816 mc_list[5] = priv->port;
1817 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1818 priv->port, 0, MLX4_PROT_ETH,
1819 &priv->broadcast_id))
1820 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1821
1822
1823 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1824
1825
1826 queue_work(mdev->workqueue, &priv->rx_mode_task);
1827
1828 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1829 udp_tunnel_get_rx_info(dev);
1830
1831 priv->port_up = true;
1832
1833
1834
1835
1836 for (i = 0; i < priv->rx_ring_num; i++) {
1837 local_bh_disable();
1838 napi_schedule(&priv->rx_cq[i]->napi);
1839 local_bh_enable();
1840 }
1841
1842 netif_tx_start_all_queues(dev);
1843 netif_device_attach(dev);
1844
1845 return 0;
1846
1847tx_err:
1848 if (t == MLX4_EN_NUM_TX_TYPES) {
1849 t--;
1850 i = priv->tx_ring_num[t];
1851 }
1852 while (t >= 0) {
1853 while (i--) {
1854 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1855 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1856 }
1857 if (!t--)
1858 break;
1859 i = priv->tx_ring_num[t];
1860 }
1861 mlx4_en_destroy_drop_qp(priv);
1862rss_err:
1863 mlx4_en_release_rss_steer(priv);
1864mac_err:
1865 mlx4_en_put_qp(priv);
1866cq_err:
1867 while (rx_index--) {
1868 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1869 mlx4_en_free_affinity_hint(priv, rx_index);
1870 }
1871 for (i = 0; i < priv->rx_ring_num; i++)
1872 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1873
1874 return err;
1875}
1876
1877
1878void mlx4_en_stop_port(struct net_device *dev, int detach)
1879{
1880 struct mlx4_en_priv *priv = netdev_priv(dev);
1881 struct mlx4_en_dev *mdev = priv->mdev;
1882 struct mlx4_en_mc_list *mclist, *tmp;
1883 struct ethtool_flow_id *flow, *tmp_flow;
1884 int i, t;
1885 u8 mc_list[16] = {0};
1886
1887 if (!priv->port_up) {
1888 en_dbg(DRV, priv, "stop port called while port already down\n");
1889 return;
1890 }
1891
1892
1893 mlx4_CLOSE_PORT(mdev->dev, priv->port);
1894
1895
1896 netif_tx_lock_bh(dev);
1897 if (detach)
1898 netif_device_detach(dev);
1899 netif_tx_stop_all_queues(dev);
1900 netif_tx_unlock_bh(dev);
1901
1902 netif_tx_disable(dev);
1903
1904 spin_lock_bh(&priv->stats_lock);
1905 mlx4_en_fold_software_stats(dev);
1906
1907 priv->port_up = false;
1908 spin_unlock_bh(&priv->stats_lock);
1909
1910 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
1911
1912
1913 if (mdev->dev->caps.steering_mode ==
1914 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1915 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1916 MLX4_EN_FLAG_MC_PROMISC);
1917 mlx4_flow_steer_promisc_remove(mdev->dev,
1918 priv->port,
1919 MLX4_FS_ALL_DEFAULT);
1920 mlx4_flow_steer_promisc_remove(mdev->dev,
1921 priv->port,
1922 MLX4_FS_MC_DEFAULT);
1923 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1924 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1925
1926
1927 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1928 priv->port);
1929
1930
1931 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1932 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1933 priv->port);
1934 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1935 }
1936 }
1937
1938
1939 eth_broadcast_addr(&mc_list[10]);
1940 mc_list[5] = priv->port;
1941 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1942 MLX4_PROT_ETH, priv->broadcast_id);
1943 list_for_each_entry(mclist, &priv->curr_list, list) {
1944 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1945 mc_list[5] = priv->port;
1946 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,
1947 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1948 if (mclist->tunnel_reg_id)
1949 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1950 }
1951 mlx4_en_clear_list(dev);
1952 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1953 list_del(&mclist->list);
1954 kfree(mclist);
1955 }
1956
1957
1958 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1959
1960
1961 if (mdev->dev->caps.steering_mode ==
1962 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1963 ASSERT_RTNL();
1964 list_for_each_entry_safe(flow, tmp_flow,
1965 &priv->ethtool_list, list) {
1966 mlx4_flow_detach(mdev->dev, flow->id);
1967 list_del(&flow->list);
1968 }
1969 }
1970
1971 mlx4_en_destroy_drop_qp(priv);
1972
1973
1974 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
1975 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1976 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1977 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1978 }
1979 }
1980 msleep(10);
1981
1982 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1983 for (i = 0; i < priv->tx_ring_num[t]; i++)
1984 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
1985
1986 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
1987 mlx4_en_delete_rss_steer_rules(priv);
1988
1989
1990 mlx4_en_release_rss_steer(priv);
1991
1992
1993 mlx4_en_put_qp(priv);
1994 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
1995 mdev->mac_removed[priv->port] = 1;
1996
1997
1998 for (i = 0; i < priv->rx_ring_num; i++) {
1999 struct mlx4_en_cq *cq = priv->rx_cq[i];
2000
2001 napi_synchronize(&cq->napi);
2002 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
2003 mlx4_en_deactivate_cq(priv, cq);
2004
2005 mlx4_en_free_affinity_hint(priv, i);
2006 }
2007}
2008
2009static void mlx4_en_restart(struct work_struct *work)
2010{
2011 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2012 watchdog_task);
2013 struct mlx4_en_dev *mdev = priv->mdev;
2014 struct net_device *dev = priv->dev;
2015
2016 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
2017
2018 rtnl_lock();
2019 mutex_lock(&mdev->state_lock);
2020 if (priv->port_up) {
2021 mlx4_en_stop_port(dev, 1);
2022 if (mlx4_en_start_port(dev))
2023 en_err(priv, "Failed restarting port %d\n", priv->port);
2024 }
2025 mutex_unlock(&mdev->state_lock);
2026 rtnl_unlock();
2027}
2028
2029static void mlx4_en_clear_stats(struct net_device *dev)
2030{
2031 struct mlx4_en_priv *priv = netdev_priv(dev);
2032 struct mlx4_en_dev *mdev = priv->mdev;
2033 struct mlx4_en_tx_ring **tx_ring;
2034 int i;
2035
2036 if (!mlx4_is_slave(mdev->dev))
2037 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
2038 en_dbg(HW, priv, "Failed dumping statistics\n");
2039
2040 memset(&priv->pstats, 0, sizeof(priv->pstats));
2041 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
2042 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
2043 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
2044 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
2045 memset(&priv->rx_priority_flowstats, 0,
2046 sizeof(priv->rx_priority_flowstats));
2047 memset(&priv->tx_priority_flowstats, 0,
2048 sizeof(priv->tx_priority_flowstats));
2049 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
2050
2051 tx_ring = priv->tx_ring[TX];
2052 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
2053 tx_ring[i]->bytes = 0;
2054 tx_ring[i]->packets = 0;
2055 tx_ring[i]->tx_csum = 0;
2056 tx_ring[i]->tx_dropped = 0;
2057 tx_ring[i]->queue_stopped = 0;
2058 tx_ring[i]->wake_queue = 0;
2059 tx_ring[i]->tso_packets = 0;
2060 tx_ring[i]->xmit_more = 0;
2061 }
2062 for (i = 0; i < priv->rx_ring_num; i++) {
2063 priv->rx_ring[i]->bytes = 0;
2064 priv->rx_ring[i]->packets = 0;
2065 priv->rx_ring[i]->csum_ok = 0;
2066 priv->rx_ring[i]->csum_none = 0;
2067 priv->rx_ring[i]->csum_complete = 0;
2068 }
2069}
2070
2071static int mlx4_en_open(struct net_device *dev)
2072{
2073 struct mlx4_en_priv *priv = netdev_priv(dev);
2074 struct mlx4_en_dev *mdev = priv->mdev;
2075 int err = 0;
2076
2077 mutex_lock(&mdev->state_lock);
2078
2079 if (!mdev->device_up) {
2080 en_err(priv, "Cannot open - device down/disabled\n");
2081 err = -EBUSY;
2082 goto out;
2083 }
2084
2085
2086 mlx4_en_clear_stats(dev);
2087
2088 err = mlx4_en_start_port(dev);
2089 if (err)
2090 en_err(priv, "Failed starting port:%d\n", priv->port);
2091
2092out:
2093 mutex_unlock(&mdev->state_lock);
2094 return err;
2095}
2096
2097
2098static int mlx4_en_close(struct net_device *dev)
2099{
2100 struct mlx4_en_priv *priv = netdev_priv(dev);
2101 struct mlx4_en_dev *mdev = priv->mdev;
2102
2103 en_dbg(IFDOWN, priv, "Close port called\n");
2104
2105 mutex_lock(&mdev->state_lock);
2106
2107 mlx4_en_stop_port(dev, 0);
2108 netif_carrier_off(dev);
2109
2110 mutex_unlock(&mdev->state_lock);
2111 return 0;
2112}
2113
2114static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
2115{
2116 int i, t;
2117
2118#ifdef CONFIG_RFS_ACCEL
2119 priv->dev->rx_cpu_rmap = NULL;
2120#endif
2121
2122 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2123 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2124 if (priv->tx_ring[t] && priv->tx_ring[t][i])
2125 mlx4_en_destroy_tx_ring(priv,
2126 &priv->tx_ring[t][i]);
2127 if (priv->tx_cq[t] && priv->tx_cq[t][i])
2128 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2129 }
2130 kfree(priv->tx_ring[t]);
2131 kfree(priv->tx_cq[t]);
2132 }
2133
2134 for (i = 0; i < priv->rx_ring_num; i++) {
2135 if (priv->rx_ring[i])
2136 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2137 priv->prof->rx_ring_size, priv->stride);
2138 if (priv->rx_cq[i])
2139 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2140 }
2141
2142}
2143
2144static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
2145{
2146 struct mlx4_en_port_profile *prof = priv->prof;
2147 int i, t;
2148 int node;
2149
2150
2151 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2152 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2153 node = cpu_to_node(i % num_online_cpus());
2154 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
2155 prof->tx_ring_size, i, t, node))
2156 goto err;
2157
2158 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
2159 prof->tx_ring_size,
2160 TXBB_SIZE, node, i))
2161 goto err;
2162 }
2163 }
2164
2165
2166 for (i = 0; i < priv->rx_ring_num; i++) {
2167 node = cpu_to_node(i % num_online_cpus());
2168 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
2169 prof->rx_ring_size, i, RX, node))
2170 goto err;
2171
2172 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
2173 prof->rx_ring_size, priv->stride,
2174 node))
2175 goto err;
2176 }
2177
2178#ifdef CONFIG_RFS_ACCEL
2179 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
2180#endif
2181
2182 return 0;
2183
2184err:
2185 en_err(priv, "Failed to allocate NIC resources\n");
2186 for (i = 0; i < priv->rx_ring_num; i++) {
2187 if (priv->rx_ring[i])
2188 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2189 prof->rx_ring_size,
2190 priv->stride);
2191 if (priv->rx_cq[i])
2192 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2193 }
2194 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2195 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2196 if (priv->tx_ring[t][i])
2197 mlx4_en_destroy_tx_ring(priv,
2198 &priv->tx_ring[t][i]);
2199 if (priv->tx_cq[t][i])
2200 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2201 }
2202 }
2203 return -ENOMEM;
2204}
2205
2206
2207static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
2208 struct mlx4_en_priv *src,
2209 struct mlx4_en_port_profile *prof)
2210{
2211 int t;
2212
2213 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
2214 sizeof(dst->hwtstamp_config));
2215 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;
2216 dst->rx_ring_num = prof->rx_ring_num;
2217 dst->flags = prof->flags;
2218 dst->mdev = src->mdev;
2219 dst->port = src->port;
2220 dst->dev = src->dev;
2221 dst->prof = prof;
2222 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2223 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2224
2225 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2226 dst->tx_ring_num[t] = prof->tx_ring_num[t];
2227 if (!dst->tx_ring_num[t])
2228 continue;
2229
2230 dst->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) *
2231 MAX_TX_RINGS, GFP_KERNEL);
2232 if (!dst->tx_ring[t])
2233 goto err_free_tx;
2234
2235 dst->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) *
2236 MAX_TX_RINGS, GFP_KERNEL);
2237 if (!dst->tx_cq[t]) {
2238 kfree(dst->tx_ring[t]);
2239 goto err_free_tx;
2240 }
2241 }
2242
2243 return 0;
2244
2245err_free_tx:
2246 while (t--) {
2247 kfree(dst->tx_ring[t]);
2248 kfree(dst->tx_cq[t]);
2249 }
2250 return -ENOMEM;
2251}
2252
2253static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
2254 struct mlx4_en_priv *src)
2255{
2256 int t;
2257 memcpy(dst->rx_ring, src->rx_ring,
2258 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
2259 memcpy(dst->rx_cq, src->rx_cq,
2260 sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
2261 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
2262 sizeof(dst->hwtstamp_config));
2263 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2264 dst->tx_ring_num[t] = src->tx_ring_num[t];
2265 dst->tx_ring[t] = src->tx_ring[t];
2266 dst->tx_cq[t] = src->tx_cq[t];
2267 }
2268 dst->num_tx_rings_p_up = src->num_tx_rings_p_up;
2269 dst->rx_ring_num = src->rx_ring_num;
2270 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
2271}
2272
2273int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
2274 struct mlx4_en_priv *tmp,
2275 struct mlx4_en_port_profile *prof,
2276 bool carry_xdp_prog)
2277{
2278 struct bpf_prog *xdp_prog;
2279 int i, t;
2280
2281 mlx4_en_copy_priv(tmp, priv, prof);
2282
2283 if (mlx4_en_alloc_resources(tmp)) {
2284 en_warn(priv,
2285 "%s: Resource allocation failed, using previous configuration\n",
2286 __func__);
2287 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2288 kfree(tmp->tx_ring[t]);
2289 kfree(tmp->tx_cq[t]);
2290 }
2291 return -ENOMEM;
2292 }
2293
2294
2295 xdp_prog = rcu_dereference_protected(
2296 priv->rx_ring[0]->xdp_prog,
2297 lockdep_is_held(&priv->mdev->state_lock));
2298
2299 if (xdp_prog && carry_xdp_prog) {
2300 xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num);
2301 if (IS_ERR(xdp_prog)) {
2302 mlx4_en_free_resources(tmp);
2303 return PTR_ERR(xdp_prog);
2304 }
2305 for (i = 0; i < tmp->rx_ring_num; i++)
2306 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
2307 xdp_prog);
2308 }
2309
2310 return 0;
2311}
2312
2313void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
2314 struct mlx4_en_priv *tmp)
2315{
2316 mlx4_en_free_resources(priv);
2317 mlx4_en_update_priv(priv, tmp);
2318}
2319
2320void mlx4_en_destroy_netdev(struct net_device *dev)
2321{
2322 struct mlx4_en_priv *priv = netdev_priv(dev);
2323 struct mlx4_en_dev *mdev = priv->mdev;
2324
2325 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2326
2327
2328 if (priv->registered) {
2329 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
2330 priv->port));
2331 unregister_netdev(dev);
2332 }
2333
2334 if (priv->allocated)
2335 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2336
2337 cancel_delayed_work(&priv->stats_task);
2338 cancel_delayed_work(&priv->service_task);
2339
2340 flush_workqueue(mdev->workqueue);
2341
2342 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2343 mlx4_en_remove_timestamp(mdev);
2344
2345
2346 mutex_lock(&mdev->state_lock);
2347 mdev->pndev[priv->port] = NULL;
2348 mdev->upper[priv->port] = NULL;
2349
2350#ifdef CONFIG_RFS_ACCEL
2351 mlx4_en_cleanup_filters(priv);
2352#endif
2353
2354 mlx4_en_free_resources(priv);
2355 mutex_unlock(&mdev->state_lock);
2356
2357 free_netdev(dev);
2358}
2359
2360static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
2361{
2362 struct mlx4_en_priv *priv = netdev_priv(dev);
2363
2364 if (mtu > MLX4_EN_MAX_XDP_MTU) {
2365 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
2366 mtu, MLX4_EN_MAX_XDP_MTU);
2367 return false;
2368 }
2369
2370 return true;
2371}
2372
2373static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
2374{
2375 struct mlx4_en_priv *priv = netdev_priv(dev);
2376 struct mlx4_en_dev *mdev = priv->mdev;
2377 int err = 0;
2378
2379 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2380 dev->mtu, new_mtu);
2381
2382 if (priv->tx_ring_num[TX_XDP] &&
2383 !mlx4_en_check_xdp_mtu(dev, new_mtu))
2384 return -EOPNOTSUPP;
2385
2386 dev->mtu = new_mtu;
2387
2388 if (netif_running(dev)) {
2389 mutex_lock(&mdev->state_lock);
2390 if (!mdev->device_up) {
2391
2392
2393 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2394 } else {
2395 mlx4_en_stop_port(dev, 1);
2396 err = mlx4_en_start_port(dev);
2397 if (err) {
2398 en_err(priv, "Failed restarting port:%d\n",
2399 priv->port);
2400 queue_work(mdev->workqueue, &priv->watchdog_task);
2401 }
2402 }
2403 mutex_unlock(&mdev->state_lock);
2404 }
2405 return 0;
2406}
2407
2408static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2409{
2410 struct mlx4_en_priv *priv = netdev_priv(dev);
2411 struct mlx4_en_dev *mdev = priv->mdev;
2412 struct hwtstamp_config config;
2413
2414 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
2415 return -EFAULT;
2416
2417
2418 if (config.flags)
2419 return -EINVAL;
2420
2421
2422 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2423 return -EINVAL;
2424
2425
2426 switch (config.tx_type) {
2427 case HWTSTAMP_TX_OFF:
2428 case HWTSTAMP_TX_ON:
2429 break;
2430 default:
2431 return -ERANGE;
2432 }
2433
2434
2435 switch (config.rx_filter) {
2436 case HWTSTAMP_FILTER_NONE:
2437 break;
2438 case HWTSTAMP_FILTER_ALL:
2439 case HWTSTAMP_FILTER_SOME:
2440 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2441 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2442 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2443 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2444 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2445 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2446 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2447 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2448 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2449 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2450 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2451 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2452 case HWTSTAMP_FILTER_NTP_ALL:
2453 config.rx_filter = HWTSTAMP_FILTER_ALL;
2454 break;
2455 default:
2456 return -ERANGE;
2457 }
2458
2459 if (mlx4_en_reset_config(dev, config, dev->features)) {
2460 config.tx_type = HWTSTAMP_TX_OFF;
2461 config.rx_filter = HWTSTAMP_FILTER_NONE;
2462 }
2463
2464 return copy_to_user(ifr->ifr_data, &config,
2465 sizeof(config)) ? -EFAULT : 0;
2466}
2467
2468static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2469{
2470 struct mlx4_en_priv *priv = netdev_priv(dev);
2471
2472 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
2473 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2474}
2475
2476static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2477{
2478 switch (cmd) {
2479 case SIOCSHWTSTAMP:
2480 return mlx4_en_hwtstamp_set(dev, ifr);
2481 case SIOCGHWTSTAMP:
2482 return mlx4_en_hwtstamp_get(dev, ifr);
2483 default:
2484 return -EOPNOTSUPP;
2485 }
2486}
2487
2488static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
2489 netdev_features_t features)
2490{
2491 struct mlx4_en_priv *en_priv = netdev_priv(netdev);
2492 struct mlx4_en_dev *mdev = en_priv->mdev;
2493
2494
2495
2496
2497
2498 if (features & NETIF_F_HW_VLAN_CTAG_RX &&
2499 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2500 features |= NETIF_F_HW_VLAN_STAG_RX;
2501 else
2502 features &= ~NETIF_F_HW_VLAN_STAG_RX;
2503
2504 return features;
2505}
2506
2507static int mlx4_en_set_features(struct net_device *netdev,
2508 netdev_features_t features)
2509{
2510 struct mlx4_en_priv *priv = netdev_priv(netdev);
2511 bool reset = false;
2512 int ret = 0;
2513
2514 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2515 en_info(priv, "Turn %s RX-FCS\n",
2516 (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2517 reset = true;
2518 }
2519
2520 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2521 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2522
2523 en_info(priv, "Turn %s RX-ALL\n",
2524 ignore_fcs_value ? "ON" : "OFF");
2525 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2526 priv->port, ignore_fcs_value);
2527 if (ret)
2528 return ret;
2529 }
2530
2531 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2532 en_info(priv, "Turn %s RX vlan strip offload\n",
2533 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2534 reset = true;
2535 }
2536
2537 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2538 en_info(priv, "Turn %s TX vlan strip offload\n",
2539 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2540
2541 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
2542 en_info(priv, "Turn %s TX S-VLAN strip offload\n",
2543 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
2544
2545 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2546 en_info(priv, "Turn %s loopback\n",
2547 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2548 mlx4_en_update_loopback_state(netdev, features);
2549 }
2550
2551 if (reset) {
2552 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2553 features);
2554 if (ret)
2555 return ret;
2556 }
2557
2558 return 0;
2559}
2560
2561static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2562{
2563 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2564 struct mlx4_en_dev *mdev = en_priv->mdev;
2565
2566 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
2567}
2568
2569static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
2570 __be16 vlan_proto)
2571{
2572 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2573 struct mlx4_en_dev *mdev = en_priv->mdev;
2574
2575 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
2576 vlan_proto);
2577}
2578
2579static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
2580 int max_tx_rate)
2581{
2582 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2583 struct mlx4_en_dev *mdev = en_priv->mdev;
2584
2585 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2586 max_tx_rate);
2587}
2588
2589static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
2590{
2591 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2592 struct mlx4_en_dev *mdev = en_priv->mdev;
2593
2594 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2595}
2596
2597static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
2598{
2599 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2600 struct mlx4_en_dev *mdev = en_priv->mdev;
2601
2602 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2603}
2604
2605static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
2606{
2607 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2608 struct mlx4_en_dev *mdev = en_priv->mdev;
2609
2610 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2611}
2612
2613static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
2614 struct ifla_vf_stats *vf_stats)
2615{
2616 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2617 struct mlx4_en_dev *mdev = en_priv->mdev;
2618
2619 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
2620}
2621
2622#define PORT_ID_BYTE_LEN 8
2623static int mlx4_en_get_phys_port_id(struct net_device *dev,
2624 struct netdev_phys_item_id *ppid)
2625{
2626 struct mlx4_en_priv *priv = netdev_priv(dev);
2627 struct mlx4_dev *mdev = priv->mdev->dev;
2628 int i;
2629 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
2630
2631 if (!phys_port_id)
2632 return -EOPNOTSUPP;
2633
2634 ppid->id_len = sizeof(phys_port_id);
2635 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2636 ppid->id[i] = phys_port_id & 0xff;
2637 phys_port_id >>= 8;
2638 }
2639 return 0;
2640}
2641
2642static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
2643{
2644 int ret;
2645 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2646 vxlan_add_task);
2647
2648 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2649 if (ret)
2650 goto out;
2651
2652 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2653 VXLAN_STEER_BY_OUTER_MAC, 1);
2654out:
2655 if (ret) {
2656 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2657 return;
2658 }
2659
2660
2661 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2662 NETIF_F_RXCSUM |
2663 NETIF_F_TSO | NETIF_F_TSO6 |
2664 NETIF_F_GSO_UDP_TUNNEL |
2665 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2666 NETIF_F_GSO_PARTIAL;
2667}
2668
2669static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
2670{
2671 int ret;
2672 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2673 vxlan_del_task);
2674
2675 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2676 NETIF_F_RXCSUM |
2677 NETIF_F_TSO | NETIF_F_TSO6 |
2678 NETIF_F_GSO_UDP_TUNNEL |
2679 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2680 NETIF_F_GSO_PARTIAL);
2681
2682 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2683 VXLAN_STEER_BY_OUTER_MAC, 0);
2684 if (ret)
2685 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2686
2687 priv->vxlan_port = 0;
2688}
2689
2690static void mlx4_en_add_vxlan_port(struct net_device *dev,
2691 struct udp_tunnel_info *ti)
2692{
2693 struct mlx4_en_priv *priv = netdev_priv(dev);
2694 __be16 port = ti->port;
2695 __be16 current_port;
2696
2697 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
2698 return;
2699
2700 if (ti->sa_family != AF_INET)
2701 return;
2702
2703 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2704 return;
2705
2706 current_port = priv->vxlan_port;
2707 if (current_port && current_port != port) {
2708 en_warn(priv, "vxlan port %d configured, can't add port %d\n",
2709 ntohs(current_port), ntohs(port));
2710 return;
2711 }
2712
2713 priv->vxlan_port = port;
2714 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
2715}
2716
2717static void mlx4_en_del_vxlan_port(struct net_device *dev,
2718 struct udp_tunnel_info *ti)
2719{
2720 struct mlx4_en_priv *priv = netdev_priv(dev);
2721 __be16 port = ti->port;
2722 __be16 current_port;
2723
2724 if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
2725 return;
2726
2727 if (ti->sa_family != AF_INET)
2728 return;
2729
2730 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2731 return;
2732
2733 current_port = priv->vxlan_port;
2734 if (current_port != port) {
2735 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
2736 return;
2737 }
2738
2739 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
2740}
2741
2742static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2743 struct net_device *dev,
2744 netdev_features_t features)
2745{
2746 features = vlan_features_check(skb, features);
2747 features = vxlan_features_check(skb, features);
2748
2749
2750
2751
2752
2753 if (skb->encapsulation &&
2754 (skb->ip_summed == CHECKSUM_PARTIAL)) {
2755 struct mlx4_en_priv *priv = netdev_priv(dev);
2756
2757 if (!priv->vxlan_port ||
2758 (ip_hdr(skb)->version != 4) ||
2759 (udp_hdr(skb)->dest != priv->vxlan_port))
2760 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2761 }
2762
2763 return features;
2764}
2765
2766static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
2767{
2768 struct mlx4_en_priv *priv = netdev_priv(dev);
2769 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
2770 struct mlx4_update_qp_params params;
2771 int err;
2772
2773 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2774 return -EOPNOTSUPP;
2775
2776
2777 if (maxrate >> 12) {
2778 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2779 params.rate_val = maxrate / 1000;
2780 } else if (maxrate) {
2781 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2782 params.rate_val = maxrate;
2783 } else {
2784 params.rate_unit = 0;
2785 params.rate_val = 0;
2786 }
2787
2788 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2789 ¶ms);
2790 return err;
2791}
2792
2793static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
2794{
2795 struct mlx4_en_priv *priv = netdev_priv(dev);
2796 struct mlx4_en_dev *mdev = priv->mdev;
2797 struct mlx4_en_port_profile new_prof;
2798 struct bpf_prog *old_prog;
2799 struct mlx4_en_priv *tmp;
2800 int tx_changed = 0;
2801 int xdp_ring_num;
2802 int port_up = 0;
2803 int err;
2804 int i;
2805
2806 xdp_ring_num = prog ? priv->rx_ring_num : 0;
2807
2808
2809
2810
2811 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
2812 if (prog) {
2813 prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
2814 if (IS_ERR(prog))
2815 return PTR_ERR(prog);
2816 }
2817 mutex_lock(&mdev->state_lock);
2818 for (i = 0; i < priv->rx_ring_num; i++) {
2819 old_prog = rcu_dereference_protected(
2820 priv->rx_ring[i]->xdp_prog,
2821 lockdep_is_held(&mdev->state_lock));
2822 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2823 if (old_prog)
2824 bpf_prog_put(old_prog);
2825 }
2826 mutex_unlock(&mdev->state_lock);
2827 return 0;
2828 }
2829
2830 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
2831 return -EOPNOTSUPP;
2832
2833 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2834 if (!tmp)
2835 return -ENOMEM;
2836
2837 if (prog) {
2838 prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
2839 if (IS_ERR(prog)) {
2840 err = PTR_ERR(prog);
2841 goto out;
2842 }
2843 }
2844
2845 mutex_lock(&mdev->state_lock);
2846 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
2847 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
2848
2849 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
2850 tx_changed = 1;
2851 new_prof.tx_ring_num[TX] =
2852 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
2853 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
2854 }
2855
2856 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
2857 if (err) {
2858 if (prog)
2859 bpf_prog_sub(prog, priv->rx_ring_num - 1);
2860 goto unlock_out;
2861 }
2862
2863 if (priv->port_up) {
2864 port_up = 1;
2865 mlx4_en_stop_port(dev, 1);
2866 }
2867
2868 mlx4_en_safe_replace_resources(priv, tmp);
2869 if (tx_changed)
2870 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
2871
2872 for (i = 0; i < priv->rx_ring_num; i++) {
2873 old_prog = rcu_dereference_protected(
2874 priv->rx_ring[i]->xdp_prog,
2875 lockdep_is_held(&mdev->state_lock));
2876 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2877 if (old_prog)
2878 bpf_prog_put(old_prog);
2879 }
2880
2881 if (port_up) {
2882 err = mlx4_en_start_port(dev);
2883 if (err) {
2884 en_err(priv, "Failed starting port %d for XDP change\n",
2885 priv->port);
2886 queue_work(mdev->workqueue, &priv->watchdog_task);
2887 }
2888 }
2889
2890unlock_out:
2891 mutex_unlock(&mdev->state_lock);
2892out:
2893 kfree(tmp);
2894 return err;
2895}
2896
2897static u32 mlx4_xdp_query(struct net_device *dev)
2898{
2899 struct mlx4_en_priv *priv = netdev_priv(dev);
2900 struct mlx4_en_dev *mdev = priv->mdev;
2901 const struct bpf_prog *xdp_prog;
2902 u32 prog_id = 0;
2903
2904 if (!priv->tx_ring_num[TX_XDP])
2905 return prog_id;
2906
2907 mutex_lock(&mdev->state_lock);
2908 xdp_prog = rcu_dereference_protected(
2909 priv->rx_ring[0]->xdp_prog,
2910 lockdep_is_held(&mdev->state_lock));
2911 if (xdp_prog)
2912 prog_id = xdp_prog->aux->id;
2913 mutex_unlock(&mdev->state_lock);
2914
2915 return prog_id;
2916}
2917
2918static int mlx4_xdp(struct net_device *dev, struct netdev_xdp *xdp)
2919{
2920 switch (xdp->command) {
2921 case XDP_SETUP_PROG:
2922 return mlx4_xdp_set(dev, xdp->prog);
2923 case XDP_QUERY_PROG:
2924 xdp->prog_id = mlx4_xdp_query(dev);
2925 xdp->prog_attached = !!xdp->prog_id;
2926 return 0;
2927 default:
2928 return -EINVAL;
2929 }
2930}
2931
2932static const struct net_device_ops mlx4_netdev_ops = {
2933 .ndo_open = mlx4_en_open,
2934 .ndo_stop = mlx4_en_close,
2935 .ndo_start_xmit = mlx4_en_xmit,
2936 .ndo_select_queue = mlx4_en_select_queue,
2937 .ndo_get_stats64 = mlx4_en_get_stats64,
2938 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2939 .ndo_set_mac_address = mlx4_en_set_mac,
2940 .ndo_validate_addr = eth_validate_addr,
2941 .ndo_change_mtu = mlx4_en_change_mtu,
2942 .ndo_do_ioctl = mlx4_en_ioctl,
2943 .ndo_tx_timeout = mlx4_en_tx_timeout,
2944 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2945 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2946#ifdef CONFIG_NET_POLL_CONTROLLER
2947 .ndo_poll_controller = mlx4_en_netpoll,
2948#endif
2949 .ndo_set_features = mlx4_en_set_features,
2950 .ndo_fix_features = mlx4_en_fix_features,
2951 .ndo_setup_tc = __mlx4_en_setup_tc,
2952#ifdef CONFIG_RFS_ACCEL
2953 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2954#endif
2955 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2956 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
2957 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
2958 .ndo_features_check = mlx4_en_features_check,
2959 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2960 .ndo_xdp = mlx4_xdp,
2961};
2962
2963static const struct net_device_ops mlx4_netdev_ops_master = {
2964 .ndo_open = mlx4_en_open,
2965 .ndo_stop = mlx4_en_close,
2966 .ndo_start_xmit = mlx4_en_xmit,
2967 .ndo_select_queue = mlx4_en_select_queue,
2968 .ndo_get_stats64 = mlx4_en_get_stats64,
2969 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2970 .ndo_set_mac_address = mlx4_en_set_mac,
2971 .ndo_validate_addr = eth_validate_addr,
2972 .ndo_change_mtu = mlx4_en_change_mtu,
2973 .ndo_tx_timeout = mlx4_en_tx_timeout,
2974 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2975 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2976 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
2977 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
2978 .ndo_set_vf_rate = mlx4_en_set_vf_rate,
2979 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
2980 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2981 .ndo_get_vf_stats = mlx4_en_get_vf_stats,
2982 .ndo_get_vf_config = mlx4_en_get_vf_config,
2983#ifdef CONFIG_NET_POLL_CONTROLLER
2984 .ndo_poll_controller = mlx4_en_netpoll,
2985#endif
2986 .ndo_set_features = mlx4_en_set_features,
2987 .ndo_fix_features = mlx4_en_fix_features,
2988 .ndo_setup_tc = __mlx4_en_setup_tc,
2989#ifdef CONFIG_RFS_ACCEL
2990 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2991#endif
2992 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2993 .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
2994 .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
2995 .ndo_features_check = mlx4_en_features_check,
2996 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2997 .ndo_xdp = mlx4_xdp,
2998};
2999
3000struct mlx4_en_bond {
3001 struct work_struct work;
3002 struct mlx4_en_priv *priv;
3003 int is_bonded;
3004 struct mlx4_port_map port_map;
3005};
3006
3007static void mlx4_en_bond_work(struct work_struct *work)
3008{
3009 struct mlx4_en_bond *bond = container_of(work,
3010 struct mlx4_en_bond,
3011 work);
3012 int err = 0;
3013 struct mlx4_dev *dev = bond->priv->mdev->dev;
3014
3015 if (bond->is_bonded) {
3016 if (!mlx4_is_bonded(dev)) {
3017 err = mlx4_bond(dev);
3018 if (err)
3019 en_err(bond->priv, "Fail to bond device\n");
3020 }
3021 if (!err) {
3022 err = mlx4_port_map_set(dev, &bond->port_map);
3023 if (err)
3024 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
3025 bond->port_map.port1,
3026 bond->port_map.port2,
3027 err);
3028 }
3029 } else if (mlx4_is_bonded(dev)) {
3030 err = mlx4_unbond(dev);
3031 if (err)
3032 en_err(bond->priv, "Fail to unbond device\n");
3033 }
3034 dev_put(bond->priv->dev);
3035 kfree(bond);
3036}
3037
3038static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
3039 u8 v2p_p1, u8 v2p_p2)
3040{
3041 struct mlx4_en_bond *bond = NULL;
3042
3043 bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
3044 if (!bond)
3045 return -ENOMEM;
3046
3047 INIT_WORK(&bond->work, mlx4_en_bond_work);
3048 bond->priv = priv;
3049 bond->is_bonded = is_bonded;
3050 bond->port_map.port1 = v2p_p1;
3051 bond->port_map.port2 = v2p_p2;
3052 dev_hold(priv->dev);
3053 queue_work(priv->mdev->workqueue, &bond->work);
3054 return 0;
3055}
3056
3057int mlx4_en_netdev_event(struct notifier_block *this,
3058 unsigned long event, void *ptr)
3059{
3060 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
3061 u8 port = 0;
3062 struct mlx4_en_dev *mdev;
3063 struct mlx4_dev *dev;
3064 int i, num_eth_ports = 0;
3065 bool do_bond = true;
3066 struct mlx4_en_priv *priv;
3067 u8 v2p_port1 = 0;
3068 u8 v2p_port2 = 0;
3069
3070 if (!net_eq(dev_net(ndev), &init_net))
3071 return NOTIFY_DONE;
3072
3073 mdev = container_of(this, struct mlx4_en_dev, nb);
3074 dev = mdev->dev;
3075
3076
3077
3078
3079 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
3080 ++num_eth_ports;
3081 if (!port && (mdev->pndev[i] == ndev))
3082 port = i;
3083 mdev->upper[i] = mdev->pndev[i] ?
3084 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
3085
3086 if (!mdev->upper[i])
3087 do_bond = false;
3088 if (num_eth_ports < 2)
3089 continue;
3090
3091 if (mdev->upper[i] != mdev->upper[i-1])
3092 do_bond = false;
3093 }
3094
3095 do_bond = (num_eth_ports == 2) ? do_bond : false;
3096
3097
3098 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
3099 return NOTIFY_DONE;
3100
3101 priv = netdev_priv(ndev);
3102 if (do_bond) {
3103 struct netdev_notifier_bonding_info *notifier_info = ptr;
3104 struct netdev_bonding_info *bonding_info =
3105 ¬ifier_info->bonding_info;
3106
3107
3108 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
3109 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
3110 (bonding_info->master.bond_mode != BOND_MODE_8023AD))
3111 do_bond = false;
3112
3113
3114 if (bonding_info->master.num_slaves != 2)
3115 do_bond = false;
3116
3117
3118 if (do_bond) {
3119 if (bonding_info->master.bond_mode ==
3120 BOND_MODE_ACTIVEBACKUP) {
3121
3122
3123
3124 if (bonding_info->slave.state ==
3125 BOND_STATE_BACKUP) {
3126 if (port == 1) {
3127 v2p_port1 = 2;
3128 v2p_port2 = 2;
3129 } else {
3130 v2p_port1 = 1;
3131 v2p_port2 = 1;
3132 }
3133 } else {
3134 if (port == 1) {
3135 v2p_port1 = 1;
3136 v2p_port2 = 1;
3137 } else {
3138 v2p_port1 = 2;
3139 v2p_port2 = 2;
3140 }
3141 }
3142 } else {
3143
3144
3145
3146 __s8 link = bonding_info->slave.link;
3147
3148 if (port == 1)
3149 v2p_port2 = 2;
3150 else
3151 v2p_port1 = 1;
3152 if ((link == BOND_LINK_UP) ||
3153 (link == BOND_LINK_FAIL)) {
3154 if (port == 1)
3155 v2p_port1 = 1;
3156 else
3157 v2p_port2 = 2;
3158 } else {
3159 if (port == 1)
3160 v2p_port1 = 2;
3161 else
3162 v2p_port2 = 1;
3163 }
3164 }
3165 }
3166 }
3167
3168 mlx4_en_queue_bond_work(priv, do_bond,
3169 v2p_port1, v2p_port2);
3170
3171 return NOTIFY_DONE;
3172}
3173
3174void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
3175 struct mlx4_en_stats_bitmap *stats_bitmap,
3176 u8 rx_ppp, u8 rx_pause,
3177 u8 tx_ppp, u8 tx_pause)
3178{
3179 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
3180
3181 if (!mlx4_is_slave(dev) &&
3182 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
3183 mutex_lock(&stats_bitmap->mutex);
3184 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
3185
3186 if (rx_ppp)
3187 bitmap_set(stats_bitmap->bitmap, last_i,
3188 NUM_FLOW_PRIORITY_STATS_RX);
3189 last_i += NUM_FLOW_PRIORITY_STATS_RX;
3190
3191 if (rx_pause && !(rx_ppp))
3192 bitmap_set(stats_bitmap->bitmap, last_i,
3193 NUM_FLOW_STATS_RX);
3194 last_i += NUM_FLOW_STATS_RX;
3195
3196 if (tx_ppp)
3197 bitmap_set(stats_bitmap->bitmap, last_i,
3198 NUM_FLOW_PRIORITY_STATS_TX);
3199 last_i += NUM_FLOW_PRIORITY_STATS_TX;
3200
3201 if (tx_pause && !(tx_ppp))
3202 bitmap_set(stats_bitmap->bitmap, last_i,
3203 NUM_FLOW_STATS_TX);
3204 last_i += NUM_FLOW_STATS_TX;
3205
3206 mutex_unlock(&stats_bitmap->mutex);
3207 }
3208}
3209
3210void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
3211 struct mlx4_en_stats_bitmap *stats_bitmap,
3212 u8 rx_ppp, u8 rx_pause,
3213 u8 tx_ppp, u8 tx_pause)
3214{
3215 int last_i = 0;
3216
3217 mutex_init(&stats_bitmap->mutex);
3218 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
3219
3220 if (mlx4_is_slave(dev)) {
3221 bitmap_set(stats_bitmap->bitmap, last_i +
3222 MLX4_FIND_NETDEV_STAT(rx_packets), 1);
3223 bitmap_set(stats_bitmap->bitmap, last_i +
3224 MLX4_FIND_NETDEV_STAT(tx_packets), 1);
3225 bitmap_set(stats_bitmap->bitmap, last_i +
3226 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
3227 bitmap_set(stats_bitmap->bitmap, last_i +
3228 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
3229 bitmap_set(stats_bitmap->bitmap, last_i +
3230 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
3231 bitmap_set(stats_bitmap->bitmap, last_i +
3232 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
3233 } else {
3234 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
3235 }
3236 last_i += NUM_MAIN_STATS;
3237
3238 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
3239 last_i += NUM_PORT_STATS;
3240
3241 if (mlx4_is_master(dev))
3242 bitmap_set(stats_bitmap->bitmap, last_i,
3243 NUM_PF_STATS);
3244 last_i += NUM_PF_STATS;
3245
3246 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
3247 rx_ppp, rx_pause,
3248 tx_ppp, tx_pause);
3249 last_i += NUM_FLOW_STATS;
3250
3251 if (!mlx4_is_slave(dev))
3252 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
3253 last_i += NUM_PKT_STATS;
3254
3255 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
3256 last_i += NUM_XDP_STATS;
3257}
3258
3259int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
3260 struct mlx4_en_port_profile *prof)
3261{
3262 struct net_device *dev;
3263 struct mlx4_en_priv *priv;
3264 int i, t;
3265 int err;
3266
3267 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
3268 MAX_TX_RINGS, MAX_RX_RINGS);
3269 if (dev == NULL)
3270 return -ENOMEM;
3271
3272 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
3273 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
3274
3275 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
3276 dev->dev_port = port - 1;
3277
3278
3279
3280
3281
3282 priv = netdev_priv(dev);
3283 memset(priv, 0, sizeof(struct mlx4_en_priv));
3284 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
3285 spin_lock_init(&priv->stats_lock);
3286 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
3287 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
3288 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
3289 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
3290 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
3291 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
3292 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
3293#ifdef CONFIG_RFS_ACCEL
3294 INIT_LIST_HEAD(&priv->filters);
3295 spin_lock_init(&priv->filters_lock);
3296#endif
3297
3298 priv->dev = dev;
3299 priv->mdev = mdev;
3300 priv->ddev = &mdev->pdev->dev;
3301 priv->prof = prof;
3302 priv->port = port;
3303 priv->port_up = false;
3304 priv->flags = prof->flags;
3305 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
3306 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
3307 MLX4_WQE_CTRL_SOLICITED);
3308 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
3309 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
3310 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
3311
3312 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
3313 priv->tx_ring_num[t] = prof->tx_ring_num[t];
3314 if (!priv->tx_ring_num[t])
3315 continue;
3316
3317 priv->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) *
3318 MAX_TX_RINGS, GFP_KERNEL);
3319 if (!priv->tx_ring[t]) {
3320 err = -ENOMEM;
3321 goto err_free_tx;
3322 }
3323 priv->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) *
3324 MAX_TX_RINGS, GFP_KERNEL);
3325 if (!priv->tx_cq[t]) {
3326 kfree(priv->tx_ring[t]);
3327 err = -ENOMEM;
3328 goto out;
3329 }
3330 }
3331 priv->rx_ring_num = prof->rx_ring_num;
3332 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
3333 priv->cqe_size = mdev->dev->caps.cqe_size;
3334 priv->mac_index = -1;
3335 priv->msg_enable = MLX4_EN_MSG_LEVEL;
3336#ifdef CONFIG_MLX4_EN_DCB
3337 if (!mlx4_is_slave(priv->mdev->dev)) {
3338 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
3339 DCB_CAP_DCBX_VER_IEEE;
3340 priv->flags |= MLX4_EN_DCB_ENABLED;
3341 priv->cee_config.pfc_state = false;
3342
3343 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
3344 priv->cee_config.dcb_pfc[i] = pfc_disabled;
3345
3346 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
3347 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
3348 } else {
3349 en_info(priv, "enabling only PFC DCB ops\n");
3350 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
3351 }
3352 }
3353#endif
3354
3355 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
3356 INIT_HLIST_HEAD(&priv->mac_hash[i]);
3357
3358
3359 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
3360
3361 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
3362 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
3363 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
3364
3365
3366 dev->addr_len = ETH_ALEN;
3367 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
3368 if (!is_valid_ether_addr(dev->dev_addr)) {
3369 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
3370 priv->port, dev->dev_addr);
3371 err = -EINVAL;
3372 goto out;
3373 } else if (mlx4_is_slave(priv->mdev->dev) &&
3374 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
3375
3376
3377
3378 dev->addr_assign_type |= NET_ADDR_RANDOM;
3379 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
3380 }
3381
3382 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
3383
3384 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
3385 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
3386 err = mlx4_en_alloc_resources(priv);
3387 if (err)
3388 goto out;
3389
3390
3391 priv->hwtstamp_config.flags = 0;
3392 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
3393 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
3394
3395
3396 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
3397 MLX4_EN_PAGE_SIZE);
3398 if (err) {
3399 en_err(priv, "Failed to allocate page for rx qps\n");
3400 goto out;
3401 }
3402 priv->allocated = 1;
3403
3404
3405
3406
3407 if (mlx4_is_master(priv->mdev->dev))
3408 dev->netdev_ops = &mlx4_netdev_ops_master;
3409 else
3410 dev->netdev_ops = &mlx4_netdev_ops;
3411 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
3412 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
3413 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3414
3415 dev->ethtool_ops = &mlx4_en_ethtool_ops;
3416
3417
3418
3419
3420 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3421 if (mdev->LSO_support)
3422 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
3423
3424 dev->vlan_features = dev->hw_features;
3425
3426 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
3427 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
3428 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
3429 NETIF_F_HW_VLAN_CTAG_FILTER;
3430 dev->hw_features |= NETIF_F_LOOPBACK |
3431 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
3432
3433 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
3434 dev->features |= NETIF_F_HW_VLAN_STAG_RX |
3435 NETIF_F_HW_VLAN_STAG_FILTER;
3436 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
3437 }
3438
3439 if (mlx4_is_slave(mdev->dev)) {
3440 bool vlan_offload_disabled;
3441 int phv;
3442
3443 err = get_phv_bit(mdev->dev, port, &phv);
3444 if (!err && phv) {
3445 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3446 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
3447 }
3448 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
3449 &vlan_offload_disabled);
3450 if (!err && vlan_offload_disabled) {
3451 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3452 NETIF_F_HW_VLAN_CTAG_RX |
3453 NETIF_F_HW_VLAN_STAG_TX |
3454 NETIF_F_HW_VLAN_STAG_RX);
3455 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3456 NETIF_F_HW_VLAN_CTAG_RX |
3457 NETIF_F_HW_VLAN_STAG_TX |
3458 NETIF_F_HW_VLAN_STAG_RX);
3459 }
3460 } else {
3461 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
3462 !(mdev->dev->caps.flags2 &
3463 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
3464 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3465 }
3466
3467 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
3468 dev->hw_features |= NETIF_F_RXFCS;
3469
3470 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
3471 dev->hw_features |= NETIF_F_RXALL;
3472
3473 if (mdev->dev->caps.steering_mode ==
3474 MLX4_STEERING_MODE_DEVICE_MANAGED &&
3475 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
3476 dev->hw_features |= NETIF_F_NTUPLE;
3477
3478 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
3479 dev->priv_flags |= IFF_UNICAST_FLT;
3480
3481
3482 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
3483 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3484 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
3485 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
3486 } else {
3487 en_warn(priv,
3488 "No RSS hash capabilities exposed, using Toeplitz\n");
3489 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3490 }
3491
3492 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3493 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
3494 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3495 NETIF_F_GSO_PARTIAL;
3496 dev->features |= NETIF_F_GSO_UDP_TUNNEL |
3497 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3498 NETIF_F_GSO_PARTIAL;
3499 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
3500 }
3501
3502
3503 dev->min_mtu = MLX4_EN_MIN_MTU;
3504 dev->max_mtu = priv->max_mtu;
3505
3506 mdev->pndev[port] = dev;
3507 mdev->upper[port] = NULL;
3508
3509 netif_carrier_off(dev);
3510 mlx4_en_set_default_moderation(priv);
3511
3512 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
3513 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
3514
3515 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
3516
3517
3518 mlx4_en_calc_rx_buf(dev);
3519 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
3520 priv->rx_skb_size + ETH_FCS_LEN,
3521 prof->tx_pause, prof->tx_ppp,
3522 prof->rx_pause, prof->rx_ppp);
3523 if (err) {
3524 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3525 priv->port, err);
3526 goto out;
3527 }
3528
3529 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3530 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3531 if (err) {
3532 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3533 err);
3534 goto out;
3535 }
3536 }
3537
3538
3539 en_warn(priv, "Initializing port\n");
3540 err = mlx4_INIT_PORT(mdev->dev, priv->port);
3541 if (err) {
3542 en_err(priv, "Failed Initializing port\n");
3543 goto out;
3544 }
3545 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3546
3547
3548 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3549 mlx4_en_init_timestamp(mdev);
3550
3551 queue_delayed_work(mdev->workqueue, &priv->service_task,
3552 SERVICE_TASK_DELAY);
3553
3554 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3555 mdev->profile.prof[priv->port].rx_ppp,
3556 mdev->profile.prof[priv->port].rx_pause,
3557 mdev->profile.prof[priv->port].tx_ppp,
3558 mdev->profile.prof[priv->port].tx_pause);
3559
3560 err = register_netdev(dev);
3561 if (err) {
3562 en_err(priv, "Netdev registration failed for port %d\n", port);
3563 goto out;
3564 }
3565
3566 priv->registered = 1;
3567 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
3568 dev);
3569
3570 return 0;
3571
3572err_free_tx:
3573 while (t--) {
3574 kfree(priv->tx_ring[t]);
3575 kfree(priv->tx_cq[t]);
3576 }
3577out:
3578 mlx4_en_destroy_netdev(dev);
3579 return err;
3580}
3581
3582int mlx4_en_reset_config(struct net_device *dev,
3583 struct hwtstamp_config ts_config,
3584 netdev_features_t features)
3585{
3586 struct mlx4_en_priv *priv = netdev_priv(dev);
3587 struct mlx4_en_dev *mdev = priv->mdev;
3588 struct mlx4_en_port_profile new_prof;
3589 struct mlx4_en_priv *tmp;
3590 int port_up = 0;
3591 int err = 0;
3592
3593 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3594 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3595 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3596 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
3597 return 0;
3598
3599 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3600 (features & NETIF_F_HW_VLAN_CTAG_RX) &&
3601 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
3602 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
3603 return -EINVAL;
3604 }
3605
3606 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
3607 if (!tmp)
3608 return -ENOMEM;
3609
3610 mutex_lock(&mdev->state_lock);
3611
3612 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
3613 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
3614
3615 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
3616 if (err)
3617 goto out;
3618
3619 if (priv->port_up) {
3620 port_up = 1;
3621 mlx4_en_stop_port(dev, 1);
3622 }
3623
3624 en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
3625 ts_config.rx_filter,
3626 !!(features & NETIF_F_HW_VLAN_CTAG_RX));
3627
3628 mlx4_en_safe_replace_resources(priv, tmp);
3629
3630 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
3631 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3632 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3633 else
3634 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3635 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
3636
3637
3638
3639 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
3640 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3641 else
3642 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3643 }
3644
3645 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
3646 if (features & NETIF_F_RXFCS)
3647 dev->features |= NETIF_F_RXFCS;
3648 else
3649 dev->features &= ~NETIF_F_RXFCS;
3650 }
3651
3652
3653
3654
3655
3656 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
3657 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
3658 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
3659 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3660 }
3661
3662 if (port_up) {
3663 err = mlx4_en_start_port(dev);
3664 if (err)
3665 en_err(priv, "Failed starting port\n");
3666 }
3667
3668out:
3669 mutex_unlock(&mdev->state_lock);
3670 kfree(tmp);
3671 if (!err)
3672 netdev_features_change(dev);
3673 return err;
3674}
3675