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35#include <linux/kernel.h>
36#include <linux/types.h>
37#include <linux/pci.h>
38#include <linux/list.h>
39#include <linux/moduleparam.h>
40#include <linux/module.h>
41#include <linux/spinlock.h>
42#include <linux/interrupt.h>
43#include <linux/delay.h>
44#include <linux/uio.h>
45#include <linux/uaccess.h>
46#include <linux/fs.h>
47#include <linux/compat.h>
48#include <linux/blkdev.h>
49#include <linux/poll.h>
50
51#include <scsi/scsi.h>
52#include <scsi/scsi_cmnd.h>
53#include <scsi/scsi_device.h>
54#include <scsi/scsi_host.h>
55
56#include "megaraid_sas_fusion.h"
57#include "megaraid_sas.h"
58#include <asm/div64.h>
59
60#define LB_PENDING_CMDS_DEFAULT 4
61static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
62module_param(lb_pending_cmds, int, S_IRUGO);
63MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
64 "threshold. Valid Values are 1-128. Default: 4");
65
66
67#define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
68#define MR_LD_STATE_OPTIMAL 3
69
70#define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
71#define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
72#define SPAN_INVALID 0xff
73
74
75static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
76 PLD_SPAN_INFO ldSpanInfo);
77static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
78 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
79 struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
80static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
81 u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
82
83u32 mega_mod64(u64 dividend, u32 divisor)
84{
85 u64 d;
86 u32 remainder;
87
88 if (!divisor)
89 printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
90 d = dividend;
91 remainder = do_div(d, divisor);
92 return remainder;
93}
94
95
96
97
98
99
100
101u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
102{
103 u32 remainder;
104 u64 d;
105
106 if (!divisor)
107 printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
108
109 d = dividend;
110 remainder = do_div(d, divisor);
111
112 return d;
113}
114
115struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
116{
117 return &map->raidMap.ldSpanMap[ld].ldRaid;
118}
119
120static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
121 struct MR_DRV_RAID_MAP_ALL
122 *map)
123{
124 return &map->raidMap.ldSpanMap[ld].spanBlock[0];
125}
126
127static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
128{
129 return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
130}
131
132u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
133{
134 return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
135}
136
137u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
138{
139 return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
140}
141
142__le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
143{
144 return map->raidMap.devHndlInfo[pd].curDevHdl;
145}
146
147static u8 MR_PdInterfaceTypeGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
148{
149 return map->raidMap.devHndlInfo[pd].interfaceType;
150}
151
152u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
153{
154 return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
155}
156
157u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
158{
159 return map->raidMap.ldTgtIdToLd[ldTgtId];
160}
161
162static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
163 struct MR_DRV_RAID_MAP_ALL *map)
164{
165 return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
166}
167
168
169
170
171void MR_PopulateDrvRaidMap(struct megasas_instance *instance)
172{
173 struct fusion_context *fusion = instance->ctrl_context;
174 struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
175 struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
176 int i, j;
177 u16 ld_count;
178 struct MR_FW_RAID_MAP_DYNAMIC *fw_map_dyn;
179 struct MR_FW_RAID_MAP_EXT *fw_map_ext;
180 struct MR_RAID_MAP_DESC_TABLE *desc_table;
181
182
183 struct MR_DRV_RAID_MAP_ALL *drv_map =
184 fusion->ld_drv_map[(instance->map_id & 1)];
185 struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
186 void *raid_map_data = NULL;
187
188 memset(drv_map, 0, fusion->drv_map_sz);
189 memset(pDrvRaidMap->ldTgtIdToLd,
190 0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
191
192 if (instance->max_raid_mapsize) {
193 fw_map_dyn = fusion->ld_map[(instance->map_id & 1)];
194 desc_table =
195 (struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
196 if (desc_table != fw_map_dyn->raid_map_desc_table)
197 dev_dbg(&instance->pdev->dev, "offsets of desc table are not matching desc %p original %p\n",
198 desc_table, fw_map_dyn->raid_map_desc_table);
199
200 ld_count = (u16)le16_to_cpu(fw_map_dyn->ld_count);
201 pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
202 pDrvRaidMap->fpPdIoTimeoutSec =
203 fw_map_dyn->fp_pd_io_timeout_sec;
204 pDrvRaidMap->totalSize =
205 cpu_to_le32(sizeof(struct MR_DRV_RAID_MAP_ALL));
206
207 raid_map_data = (void *)fw_map_dyn +
208 le32_to_cpu(fw_map_dyn->desc_table_offset) +
209 le32_to_cpu(fw_map_dyn->desc_table_size);
210
211 for (i = 0; i < le32_to_cpu(fw_map_dyn->desc_table_num_elements); ++i) {
212 switch (le32_to_cpu(desc_table->raid_map_desc_type)) {
213 case RAID_MAP_DESC_TYPE_DEVHDL_INFO:
214 fw_map_dyn->dev_hndl_info =
215 (struct MR_DEV_HANDLE_INFO *)(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
216 memcpy(pDrvRaidMap->devHndlInfo,
217 fw_map_dyn->dev_hndl_info,
218 sizeof(struct MR_DEV_HANDLE_INFO) *
219 le32_to_cpu(desc_table->raid_map_desc_elements));
220 break;
221 case RAID_MAP_DESC_TYPE_TGTID_INFO:
222 fw_map_dyn->ld_tgt_id_to_ld =
223 (u16 *)(raid_map_data +
224 le32_to_cpu(desc_table->raid_map_desc_offset));
225 for (j = 0; j < le32_to_cpu(desc_table->raid_map_desc_elements); j++) {
226 pDrvRaidMap->ldTgtIdToLd[j] =
227 le16_to_cpu(fw_map_dyn->ld_tgt_id_to_ld[j]);
228 }
229 break;
230 case RAID_MAP_DESC_TYPE_ARRAY_INFO:
231 fw_map_dyn->ar_map_info =
232 (struct MR_ARRAY_INFO *)
233 (raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
234 memcpy(pDrvRaidMap->arMapInfo,
235 fw_map_dyn->ar_map_info,
236 sizeof(struct MR_ARRAY_INFO) *
237 le32_to_cpu(desc_table->raid_map_desc_elements));
238 break;
239 case RAID_MAP_DESC_TYPE_SPAN_INFO:
240 fw_map_dyn->ld_span_map =
241 (struct MR_LD_SPAN_MAP *)
242 (raid_map_data +
243 le32_to_cpu(desc_table->raid_map_desc_offset));
244 memcpy(pDrvRaidMap->ldSpanMap,
245 fw_map_dyn->ld_span_map,
246 sizeof(struct MR_LD_SPAN_MAP) *
247 le32_to_cpu(desc_table->raid_map_desc_elements));
248 break;
249 default:
250 dev_dbg(&instance->pdev->dev, "wrong number of desctableElements %d\n",
251 fw_map_dyn->desc_table_num_elements);
252 }
253 ++desc_table;
254 }
255
256 } else if (instance->supportmax256vd) {
257 fw_map_ext =
258 (struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(instance->map_id & 1)];
259 ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
260 if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
261 dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
262 return;
263 }
264
265 pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
266 pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec;
267 for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++)
268 pDrvRaidMap->ldTgtIdToLd[i] =
269 (u16)fw_map_ext->ldTgtIdToLd[i];
270 memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap,
271 sizeof(struct MR_LD_SPAN_MAP) * ld_count);
272 memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo,
273 sizeof(struct MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT);
274 memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo,
275 sizeof(struct MR_DEV_HANDLE_INFO) *
276 MAX_RAIDMAP_PHYSICAL_DEVICES);
277
278
279
280
281 pDrvRaidMap->totalSize =
282 cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
283 } else {
284 fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
285 fusion->ld_map[(instance->map_id & 1)];
286 pFwRaidMap = &fw_map_old->raidMap;
287 ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
288 pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
289 pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
290 pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
291 for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
292 pDrvRaidMap->ldTgtIdToLd[i] =
293 (u8)pFwRaidMap->ldTgtIdToLd[i];
294 for (i = 0; i < ld_count; i++) {
295 pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
296 }
297 memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
298 sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
299 memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
300 sizeof(struct MR_DEV_HANDLE_INFO) *
301 MAX_RAIDMAP_PHYSICAL_DEVICES);
302 }
303}
304
305
306
307
308u8 MR_ValidateMapInfo(struct megasas_instance *instance)
309{
310 struct fusion_context *fusion;
311 struct MR_DRV_RAID_MAP_ALL *drv_map;
312 struct MR_DRV_RAID_MAP *pDrvRaidMap;
313 struct LD_LOAD_BALANCE_INFO *lbInfo;
314 PLD_SPAN_INFO ldSpanInfo;
315 struct MR_LD_RAID *raid;
316 u16 num_lds, i;
317 u16 ld;
318 u32 expected_size;
319
320
321 MR_PopulateDrvRaidMap(instance);
322
323 fusion = instance->ctrl_context;
324 drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
325 pDrvRaidMap = &drv_map->raidMap;
326
327 lbInfo = fusion->load_balance_info;
328 ldSpanInfo = fusion->log_to_span;
329
330 if (instance->max_raid_mapsize)
331 expected_size = sizeof(struct MR_DRV_RAID_MAP_ALL);
332 else if (instance->supportmax256vd)
333 expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
334 else
335 expected_size =
336 (sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
337 (sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
338
339 if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
340 dev_dbg(&instance->pdev->dev, "megasas: map info structure size 0x%x",
341 le32_to_cpu(pDrvRaidMap->totalSize));
342 dev_dbg(&instance->pdev->dev, "is not matching expected size 0x%x\n",
343 (unsigned int)expected_size);
344 dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
345 (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
346 le32_to_cpu(pDrvRaidMap->totalSize));
347 return 0;
348 }
349
350 if (instance->UnevenSpanSupport)
351 mr_update_span_set(drv_map, ldSpanInfo);
352
353 if (lbInfo)
354 mr_update_load_balance_params(drv_map, lbInfo);
355
356 num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
357
358
359 for (i = 0; (num_lds > 0) && (i < MAX_LOGICAL_DRIVES_EXT); i++) {
360 ld = MR_TargetIdToLdGet(i, drv_map);
361
362
363 if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
364 continue;
365
366 raid = MR_LdRaidGet(ld, drv_map);
367 le32_to_cpus((u32 *)&raid->capability);
368
369 num_lds--;
370 }
371
372 return 1;
373}
374
375u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
376 struct MR_DRV_RAID_MAP_ALL *map)
377{
378 struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
379 struct MR_QUAD_ELEMENT *quad;
380 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
381 u32 span, j;
382
383 for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
384
385 for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
386 quad = &pSpanBlock->block_span_info.quad[j];
387
388 if (le32_to_cpu(quad->diff) == 0)
389 return SPAN_INVALID;
390 if (le64_to_cpu(quad->logStart) <= row && row <=
391 le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
392 le32_to_cpu(quad->diff))) == 0) {
393 if (span_blk != NULL) {
394 u64 blk, debugBlk;
395 blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
396 debugBlk = blk;
397
398 blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
399 *span_blk = blk;
400 }
401 return span;
402 }
403 }
404 }
405 return SPAN_INVALID;
406}
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426u32 mr_spanset_get_span_block(struct megasas_instance *instance,
427 u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
428{
429 struct fusion_context *fusion = instance->ctrl_context;
430 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
431 LD_SPAN_SET *span_set;
432 struct MR_QUAD_ELEMENT *quad;
433 u32 span, info;
434 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
435
436 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
437 span_set = &(ldSpanInfo[ld].span_set[info]);
438
439 if (span_set->span_row_data_width == 0)
440 break;
441
442 if (row > span_set->data_row_end)
443 continue;
444
445 for (span = 0; span < raid->spanDepth; span++)
446 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
447 block_span_info.noElements) >= info+1) {
448 quad = &map->raidMap.ldSpanMap[ld].
449 spanBlock[span].
450 block_span_info.quad[info];
451 if (le32_to_cpu(quad->diff) == 0)
452 return SPAN_INVALID;
453 if (le64_to_cpu(quad->logStart) <= row &&
454 row <= le64_to_cpu(quad->logEnd) &&
455 (mega_mod64(row - le64_to_cpu(quad->logStart),
456 le32_to_cpu(quad->diff))) == 0) {
457 if (span_blk != NULL) {
458 u64 blk;
459 blk = mega_div64_32
460 ((row - le64_to_cpu(quad->logStart)),
461 le32_to_cpu(quad->diff));
462 blk = (blk + le64_to_cpu(quad->offsetInSpan))
463 << raid->stripeShift;
464 *span_blk = blk;
465 }
466 return span;
467 }
468 }
469 }
470 return SPAN_INVALID;
471}
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489static u64 get_row_from_strip(struct megasas_instance *instance,
490 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
491{
492 struct fusion_context *fusion = instance->ctrl_context;
493 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
494 LD_SPAN_SET *span_set;
495 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
496 u32 info, strip_offset, span, span_offset;
497 u64 span_set_Strip, span_set_Row, retval;
498
499 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
500 span_set = &(ldSpanInfo[ld].span_set[info]);
501
502 if (span_set->span_row_data_width == 0)
503 break;
504 if (strip > span_set->data_strip_end)
505 continue;
506
507 span_set_Strip = strip - span_set->data_strip_start;
508 strip_offset = mega_mod64(span_set_Strip,
509 span_set->span_row_data_width);
510 span_set_Row = mega_div64_32(span_set_Strip,
511 span_set->span_row_data_width) * span_set->diff;
512 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
513 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
514 block_span_info.noElements) >= info+1) {
515 if (strip_offset >=
516 span_set->strip_offset[span])
517 span_offset++;
518 else
519 break;
520 }
521
522 retval = (span_set->data_row_start + span_set_Row +
523 (span_offset - 1));
524 return retval;
525 }
526 return -1LLU;
527}
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546static u64 get_strip_from_row(struct megasas_instance *instance,
547 u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
548{
549 struct fusion_context *fusion = instance->ctrl_context;
550 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
551 LD_SPAN_SET *span_set;
552 struct MR_QUAD_ELEMENT *quad;
553 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
554 u32 span, info;
555 u64 strip;
556
557 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
558 span_set = &(ldSpanInfo[ld].span_set[info]);
559
560 if (span_set->span_row_data_width == 0)
561 break;
562 if (row > span_set->data_row_end)
563 continue;
564
565 for (span = 0; span < raid->spanDepth; span++)
566 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
567 block_span_info.noElements) >= info+1) {
568 quad = &map->raidMap.ldSpanMap[ld].
569 spanBlock[span].block_span_info.quad[info];
570 if (le64_to_cpu(quad->logStart) <= row &&
571 row <= le64_to_cpu(quad->logEnd) &&
572 mega_mod64((row - le64_to_cpu(quad->logStart)),
573 le32_to_cpu(quad->diff)) == 0) {
574 strip = mega_div64_32
575 (((row - span_set->data_row_start)
576 - le64_to_cpu(quad->logStart)),
577 le32_to_cpu(quad->diff));
578 strip *= span_set->span_row_data_width;
579 strip += span_set->data_strip_start;
580 strip += span_set->strip_offset[span];
581 return strip;
582 }
583 }
584 }
585 dev_err(&instance->pdev->dev, "get_strip_from_row"
586 "returns invalid strip for ld=%x, row=%lx\n",
587 ld, (long unsigned int)row);
588 return -1;
589}
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607static u32 get_arm_from_strip(struct megasas_instance *instance,
608 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
609{
610 struct fusion_context *fusion = instance->ctrl_context;
611 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
612 LD_SPAN_SET *span_set;
613 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
614 u32 info, strip_offset, span, span_offset, retval;
615
616 for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
617 span_set = &(ldSpanInfo[ld].span_set[info]);
618
619 if (span_set->span_row_data_width == 0)
620 break;
621 if (strip > span_set->data_strip_end)
622 continue;
623
624 strip_offset = (uint)mega_mod64
625 ((strip - span_set->data_strip_start),
626 span_set->span_row_data_width);
627
628 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
629 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
630 block_span_info.noElements) >= info+1) {
631 if (strip_offset >=
632 span_set->strip_offset[span])
633 span_offset =
634 span_set->strip_offset[span];
635 else
636 break;
637 }
638
639 retval = (strip_offset - span_offset);
640 return retval;
641 }
642
643 dev_err(&instance->pdev->dev, "get_arm_from_strip"
644 "returns invalid arm for ld=%x strip=%lx\n",
645 ld, (long unsigned int)strip);
646
647 return -1;
648}
649
650
651u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
652 struct MR_DRV_RAID_MAP_ALL *map)
653{
654 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
655
656 u32 arm = 0;
657
658 switch (raid->level) {
659 case 0:
660 case 5:
661 case 6:
662 arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
663 break;
664 case 1:
665
666 arm = get_arm_from_strip(instance, ld, stripe, map);
667 if (arm != -1U)
668 arm *= 2;
669 break;
670 }
671
672 return arm;
673}
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
694 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
695 struct RAID_CONTEXT *pRAID_Context,
696 struct MR_DRV_RAID_MAP_ALL *map)
697{
698 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
699 u32 pd, arRef, r1_alt_pd;
700 u8 physArm, span;
701 u64 row;
702 u8 retval = true;
703 u64 *pdBlock = &io_info->pdBlock;
704 __le16 *pDevHandle = &io_info->devHandle;
705 u8 *pPdInterface = &io_info->pd_interface;
706 u32 logArm, rowMod, armQ, arm;
707 struct fusion_context *fusion;
708
709 fusion = instance->ctrl_context;
710 *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
711
712
713 row = io_info->start_row;
714 span = io_info->start_span;
715
716
717 if (raid->level == 6) {
718 logArm = get_arm_from_strip(instance, ld, stripRow, map);
719 if (logArm == -1U)
720 return false;
721 rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
722 armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
723 arm = armQ + 1 + logArm;
724 if (arm >= SPAN_ROW_SIZE(map, ld, span))
725 arm -= SPAN_ROW_SIZE(map, ld, span);
726 physArm = (u8)arm;
727 } else
728
729 physArm = get_arm(instance, ld, span, stripRow, map);
730 if (physArm == 0xFF)
731 return false;
732
733 arRef = MR_LdSpanArrayGet(ld, span, map);
734 pd = MR_ArPdGet(arRef, physArm, map);
735
736 if (pd != MR_PD_INVALID) {
737 *pDevHandle = MR_PdDevHandleGet(pd, map);
738 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
739
740 if (instance->is_ventura &&
741 (raid->level == 1) &&
742 !io_info->isRead) {
743 r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
744 if (r1_alt_pd != MR_PD_INVALID)
745 io_info->r1_alt_dev_handle =
746 MR_PdDevHandleGet(r1_alt_pd, map);
747 }
748 } else {
749 if ((raid->level >= 5) &&
750 ((fusion->adapter_type == THUNDERBOLT_SERIES) ||
751 ((fusion->adapter_type == INVADER_SERIES) &&
752 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
753 pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
754 else if (raid->level == 1) {
755 physArm = physArm + 1;
756 pd = MR_ArPdGet(arRef, physArm, map);
757 if (pd != MR_PD_INVALID) {
758 *pDevHandle = MR_PdDevHandleGet(pd, map);
759 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
760 }
761 }
762 }
763
764 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
765 if (instance->is_ventura) {
766 ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
767 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
768 io_info->span_arm =
769 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
770 } else {
771 pRAID_Context->span_arm =
772 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
773 io_info->span_arm = pRAID_Context->span_arm;
774 }
775 io_info->pd_after_lb = pd;
776 return retval;
777}
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
797 u16 stripRef, struct IO_REQUEST_INFO *io_info,
798 struct RAID_CONTEXT *pRAID_Context,
799 struct MR_DRV_RAID_MAP_ALL *map)
800{
801 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
802 u32 pd, arRef, r1_alt_pd;
803 u8 physArm, span;
804 u64 row;
805 u8 retval = true;
806 u64 *pdBlock = &io_info->pdBlock;
807 __le16 *pDevHandle = &io_info->devHandle;
808 u8 *pPdInterface = &io_info->pd_interface;
809 struct fusion_context *fusion;
810
811 fusion = instance->ctrl_context;
812 *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
813
814 row = mega_div64_32(stripRow, raid->rowDataSize);
815
816 if (raid->level == 6) {
817
818 u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
819 u32 rowMod, armQ, arm;
820
821 if (raid->rowSize == 0)
822 return false;
823
824 rowMod = mega_mod64(row, raid->rowSize);
825 armQ = raid->rowSize-1-rowMod;
826 arm = armQ+1+logArm;
827 if (arm >= raid->rowSize)
828 arm -= raid->rowSize;
829 physArm = (u8)arm;
830 } else {
831 if (raid->modFactor == 0)
832 return false;
833 physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
834 raid->modFactor),
835 map);
836 }
837
838 if (raid->spanDepth == 1) {
839 span = 0;
840 *pdBlock = row << raid->stripeShift;
841 } else {
842 span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
843 if (span == SPAN_INVALID)
844 return false;
845 }
846
847
848 arRef = MR_LdSpanArrayGet(ld, span, map);
849 pd = MR_ArPdGet(arRef, physArm, map);
850
851 if (pd != MR_PD_INVALID) {
852
853 *pDevHandle = MR_PdDevHandleGet(pd, map);
854 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
855
856 if (instance->is_ventura &&
857 (raid->level == 1) &&
858 !io_info->isRead) {
859 r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
860 if (r1_alt_pd != MR_PD_INVALID)
861 io_info->r1_alt_dev_handle =
862 MR_PdDevHandleGet(r1_alt_pd, map);
863 }
864 } else {
865 if ((raid->level >= 5) &&
866 ((fusion->adapter_type == THUNDERBOLT_SERIES) ||
867 ((fusion->adapter_type == INVADER_SERIES) &&
868 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
869 pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
870 else if (raid->level == 1) {
871
872 physArm = physArm + 1;
873 pd = MR_ArPdGet(arRef, physArm, map);
874 if (pd != MR_PD_INVALID) {
875
876 *pDevHandle = MR_PdDevHandleGet(pd, map);
877 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
878 }
879 }
880 }
881
882 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
883 if (instance->is_ventura) {
884 ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
885 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
886 io_info->span_arm =
887 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
888 } else {
889 pRAID_Context->span_arm =
890 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
891 io_info->span_arm = pRAID_Context->span_arm;
892 }
893 io_info->pd_after_lb = pd;
894 return retval;
895}
896
897
898
899
900
901
902
903
904
905
906u8
907MR_BuildRaidContext(struct megasas_instance *instance,
908 struct IO_REQUEST_INFO *io_info,
909 struct RAID_CONTEXT *pRAID_Context,
910 struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
911{
912 struct fusion_context *fusion;
913 struct MR_LD_RAID *raid;
914 u32 stripSize, stripe_mask;
915 u64 endLba, endStrip, endRow, start_row, start_strip;
916 u64 regStart;
917 u32 regSize;
918 u8 num_strips, numRows;
919 u16 ref_in_start_stripe, ref_in_end_stripe;
920 u64 ldStartBlock;
921 u32 numBlocks, ldTgtId;
922 u8 isRead;
923 u8 retval = 0;
924 u8 startlba_span = SPAN_INVALID;
925 u64 *pdBlock = &io_info->pdBlock;
926 u16 ld;
927
928 ldStartBlock = io_info->ldStartBlock;
929 numBlocks = io_info->numBlocks;
930 ldTgtId = io_info->ldTgtId;
931 isRead = io_info->isRead;
932 io_info->IoforUnevenSpan = 0;
933 io_info->start_span = SPAN_INVALID;
934 fusion = instance->ctrl_context;
935
936 ld = MR_TargetIdToLdGet(ldTgtId, map);
937 raid = MR_LdRaidGet(ld, map);
938
939 io_info->ra_capable = raid->capability.ra_capable;
940
941
942
943
944
945 if (raid->rowDataSize == 0) {
946 if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
947 return false;
948 else if (instance->UnevenSpanSupport) {
949 io_info->IoforUnevenSpan = 1;
950 } else {
951 dev_info(&instance->pdev->dev,
952 "raid->rowDataSize is 0, but has SPAN[0]"
953 "rowDataSize = 0x%0x,"
954 "but there is _NO_ UnevenSpanSupport\n",
955 MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
956 return false;
957 }
958 }
959
960 stripSize = 1 << raid->stripeShift;
961 stripe_mask = stripSize-1;
962
963
964
965
966
967 start_strip = ldStartBlock >> raid->stripeShift;
968 ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
969 endLba = ldStartBlock + numBlocks - 1;
970 ref_in_end_stripe = (u16)(endLba & stripe_mask);
971 endStrip = endLba >> raid->stripeShift;
972 num_strips = (u8)(endStrip - start_strip + 1);
973
974 if (io_info->IoforUnevenSpan) {
975 start_row = get_row_from_strip(instance, ld, start_strip, map);
976 endRow = get_row_from_strip(instance, ld, endStrip, map);
977 if (start_row == -1ULL || endRow == -1ULL) {
978 dev_info(&instance->pdev->dev, "return from %s %d."
979 "Send IO w/o region lock.\n",
980 __func__, __LINE__);
981 return false;
982 }
983
984 if (raid->spanDepth == 1) {
985 startlba_span = 0;
986 *pdBlock = start_row << raid->stripeShift;
987 } else
988 startlba_span = (u8)mr_spanset_get_span_block(instance,
989 ld, start_row, pdBlock, map);
990 if (startlba_span == SPAN_INVALID) {
991 dev_info(&instance->pdev->dev, "return from %s %d"
992 "for row 0x%llx,start strip %llx"
993 "endSrip %llx\n", __func__, __LINE__,
994 (unsigned long long)start_row,
995 (unsigned long long)start_strip,
996 (unsigned long long)endStrip);
997 return false;
998 }
999 io_info->start_span = startlba_span;
1000 io_info->start_row = start_row;
1001 } else {
1002 start_row = mega_div64_32(start_strip, raid->rowDataSize);
1003 endRow = mega_div64_32(endStrip, raid->rowDataSize);
1004 }
1005 numRows = (u8)(endRow - start_row + 1);
1006
1007
1008
1009
1010
1011
1012 regStart = start_row << raid->stripeShift;
1013
1014 regSize = stripSize;
1015
1016 io_info->do_fp_rlbypass = raid->capability.fpBypassRegionLock;
1017
1018
1019 if (raid->capability.fpCapable) {
1020 if (isRead)
1021 io_info->fpOkForIo = (raid->capability.fpReadCapable &&
1022 ((num_strips == 1) ||
1023 raid->capability.
1024 fpReadAcrossStripe));
1025 else
1026 io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
1027 ((num_strips == 1) ||
1028 raid->capability.
1029 fpWriteAcrossStripe));
1030 } else
1031 io_info->fpOkForIo = false;
1032
1033 if (numRows == 1) {
1034
1035 if (num_strips == 1) {
1036 regStart += ref_in_start_stripe;
1037 regSize = numBlocks;
1038 }
1039
1040 } else if (io_info->IoforUnevenSpan == 0) {
1041
1042
1043
1044
1045 if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
1046 regStart += ref_in_start_stripe;
1047
1048
1049 regSize = stripSize - ref_in_start_stripe;
1050 }
1051
1052
1053 if (numRows > 2)
1054 regSize += (numRows-2) << raid->stripeShift;
1055
1056
1057 if (endStrip == endRow*raid->rowDataSize)
1058 regSize += ref_in_end_stripe+1;
1059 else
1060 regSize += stripSize;
1061 } else {
1062
1063
1064
1065
1066 if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
1067 SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
1068 regStart += ref_in_start_stripe;
1069
1070
1071
1072 regSize = stripSize - ref_in_start_stripe;
1073 }
1074
1075
1076 if (numRows > 2)
1077
1078 regSize += (numRows-2) << raid->stripeShift;
1079
1080
1081 if (endStrip == get_strip_from_row(instance, ld, endRow, map))
1082 regSize += ref_in_end_stripe + 1;
1083 else
1084 regSize += stripSize;
1085 }
1086
1087 pRAID_Context->timeout_value =
1088 cpu_to_le16(raid->fpIoTimeoutForLd ?
1089 raid->fpIoTimeoutForLd :
1090 map->raidMap.fpPdIoTimeoutSec);
1091 if (fusion->adapter_type == INVADER_SERIES)
1092 pRAID_Context->reg_lock_flags = (isRead) ?
1093 raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
1094 else if (!instance->is_ventura)
1095 pRAID_Context->reg_lock_flags = (isRead) ?
1096 REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
1097 pRAID_Context->virtual_disk_tgt_id = raid->targetId;
1098 pRAID_Context->reg_lock_row_lba = cpu_to_le64(regStart);
1099 pRAID_Context->reg_lock_length = cpu_to_le32(regSize);
1100 pRAID_Context->config_seq_num = raid->seqNum;
1101
1102 *raidLUN = raid->LUN;
1103
1104
1105
1106
1107 if (io_info->fpOkForIo) {
1108 retval = io_info->IoforUnevenSpan ?
1109 mr_spanset_get_phy_params(instance, ld,
1110 start_strip, ref_in_start_stripe,
1111 io_info, pRAID_Context, map) :
1112 MR_GetPhyParams(instance, ld, start_strip,
1113 ref_in_start_stripe, io_info,
1114 pRAID_Context, map);
1115
1116 if (io_info->devHandle == MR_DEVHANDLE_INVALID)
1117 io_info->fpOkForIo = false;
1118 return retval;
1119 } else if (isRead) {
1120 uint stripIdx;
1121 for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
1122 retval = io_info->IoforUnevenSpan ?
1123 mr_spanset_get_phy_params(instance, ld,
1124 start_strip + stripIdx,
1125 ref_in_start_stripe, io_info,
1126 pRAID_Context, map) :
1127 MR_GetPhyParams(instance, ld,
1128 start_strip + stripIdx, ref_in_start_stripe,
1129 io_info, pRAID_Context, map);
1130 if (!retval)
1131 return true;
1132 }
1133 }
1134 return true;
1135}
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
1149 PLD_SPAN_INFO ldSpanInfo)
1150{
1151 u8 span, count;
1152 u32 element, span_row_width;
1153 u64 span_row;
1154 struct MR_LD_RAID *raid;
1155 LD_SPAN_SET *span_set, *span_set_prev;
1156 struct MR_QUAD_ELEMENT *quad;
1157 int ldCount;
1158 u16 ld;
1159
1160
1161 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1162 ld = MR_TargetIdToLdGet(ldCount, map);
1163 if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
1164 continue;
1165 raid = MR_LdRaidGet(ld, map);
1166 for (element = 0; element < MAX_QUAD_DEPTH; element++) {
1167 for (span = 0; span < raid->spanDepth; span++) {
1168 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
1169 block_span_info.noElements) <
1170 element + 1)
1171 continue;
1172 span_set = &(ldSpanInfo[ld].span_set[element]);
1173 quad = &map->raidMap.ldSpanMap[ld].
1174 spanBlock[span].block_span_info.
1175 quad[element];
1176
1177 span_set->diff = le32_to_cpu(quad->diff);
1178
1179 for (count = 0, span_row_width = 0;
1180 count < raid->spanDepth; count++) {
1181 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
1182 spanBlock[count].
1183 block_span_info.
1184 noElements) >= element + 1) {
1185 span_set->strip_offset[count] =
1186 span_row_width;
1187 span_row_width +=
1188 MR_LdSpanPtrGet
1189 (ld, count, map)->spanRowDataSize;
1190 }
1191 }
1192
1193 span_set->span_row_data_width = span_row_width;
1194 span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
1195 le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
1196 le32_to_cpu(quad->diff));
1197
1198 if (element == 0) {
1199 span_set->log_start_lba = 0;
1200 span_set->log_end_lba =
1201 ((span_row << raid->stripeShift)
1202 * span_row_width) - 1;
1203
1204 span_set->span_row_start = 0;
1205 span_set->span_row_end = span_row - 1;
1206
1207 span_set->data_strip_start = 0;
1208 span_set->data_strip_end =
1209 (span_row * span_row_width) - 1;
1210
1211 span_set->data_row_start = 0;
1212 span_set->data_row_end =
1213 (span_row * le32_to_cpu(quad->diff)) - 1;
1214 } else {
1215 span_set_prev = &(ldSpanInfo[ld].
1216 span_set[element - 1]);
1217 span_set->log_start_lba =
1218 span_set_prev->log_end_lba + 1;
1219 span_set->log_end_lba =
1220 span_set->log_start_lba +
1221 ((span_row << raid->stripeShift)
1222 * span_row_width) - 1;
1223
1224 span_set->span_row_start =
1225 span_set_prev->span_row_end + 1;
1226 span_set->span_row_end =
1227 span_set->span_row_start + span_row - 1;
1228
1229 span_set->data_strip_start =
1230 span_set_prev->data_strip_end + 1;
1231 span_set->data_strip_end =
1232 span_set->data_strip_start +
1233 (span_row * span_row_width) - 1;
1234
1235 span_set->data_row_start =
1236 span_set_prev->data_row_end + 1;
1237 span_set->data_row_end =
1238 span_set->data_row_start +
1239 (span_row * le32_to_cpu(quad->diff)) - 1;
1240 }
1241 break;
1242 }
1243 if (span == raid->spanDepth)
1244 break;
1245 }
1246 }
1247}
1248
1249void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
1250 struct LD_LOAD_BALANCE_INFO *lbInfo)
1251{
1252 int ldCount;
1253 u16 ld;
1254 struct MR_LD_RAID *raid;
1255
1256 if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
1257 lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
1258
1259 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1260 ld = MR_TargetIdToLdGet(ldCount, drv_map);
1261 if (ld >= MAX_LOGICAL_DRIVES_EXT) {
1262 lbInfo[ldCount].loadBalanceFlag = 0;
1263 continue;
1264 }
1265
1266 raid = MR_LdRaidGet(ld, drv_map);
1267 if ((raid->level != 1) ||
1268 (raid->ldState != MR_LD_STATE_OPTIMAL)) {
1269 lbInfo[ldCount].loadBalanceFlag = 0;
1270 continue;
1271 }
1272 lbInfo[ldCount].loadBalanceFlag = 1;
1273 }
1274}
1275
1276u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
1277 struct LD_LOAD_BALANCE_INFO *lbInfo,
1278 struct IO_REQUEST_INFO *io_info,
1279 struct MR_DRV_RAID_MAP_ALL *drv_map)
1280{
1281 struct MR_LD_RAID *raid;
1282 u16 pd1_dev_handle;
1283 u16 pend0, pend1, ld;
1284 u64 diff0, diff1;
1285 u8 bestArm, pd0, pd1, span, arm;
1286 u32 arRef, span_row_size;
1287
1288 u64 block = io_info->ldStartBlock;
1289 u32 count = io_info->numBlocks;
1290
1291 span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
1292 >> RAID_CTX_SPANARM_SPAN_SHIFT);
1293 arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
1294
1295 ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
1296 raid = MR_LdRaidGet(ld, drv_map);
1297 span_row_size = instance->UnevenSpanSupport ?
1298 SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
1299
1300 arRef = MR_LdSpanArrayGet(ld, span, drv_map);
1301 pd0 = MR_ArPdGet(arRef, arm, drv_map);
1302 pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
1303 (arm + 1 - span_row_size) : arm + 1, drv_map);
1304
1305
1306
1307 pd1_dev_handle = MR_PdDevHandleGet(pd1, drv_map);
1308
1309 if (pd1_dev_handle == MR_DEVHANDLE_INVALID) {
1310 bestArm = arm;
1311 } else {
1312
1313 pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
1314 pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
1315
1316
1317 diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
1318 diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
1319 bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
1320
1321
1322
1323
1324 if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
1325 (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
1326 bestArm ^= 1;
1327
1328
1329 io_info->span_arm =
1330 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
1331 io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
1332 }
1333
1334 lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
1335 return io_info->pd_after_lb;
1336}
1337
1338__le16 get_updated_dev_handle(struct megasas_instance *instance,
1339 struct LD_LOAD_BALANCE_INFO *lbInfo,
1340 struct IO_REQUEST_INFO *io_info,
1341 struct MR_DRV_RAID_MAP_ALL *drv_map)
1342{
1343 u8 arm_pd;
1344 __le16 devHandle;
1345
1346
1347 arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info, drv_map);
1348 devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
1349 io_info->pd_interface = MR_PdInterfaceTypeGet(arm_pd, drv_map);
1350 atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
1351
1352 return devHandle;
1353}
1354
