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20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/gpio.h>
24#include <linux/delay.h>
25#include <video/mipi_display.h>
26
27#include "fbtft.h"
28
29#define DRVNAME "fb_ili9163"
30#define WIDTH 128
31#define HEIGHT 128
32#define BPP 16
33#define FPS 30
34
35#ifdef GAMMA_ADJ
36#define GAMMA_LEN 15
37#define GAMMA_NUM 1
38#define DEFAULT_GAMMA "36 29 12 22 1C 15 42 B7 2F 13 12 0A 11 0B 06\n"
39#endif
40
41
42#define CMD_FRMCTR1 0xB1
43
44#define CMD_FRMCTR2 0xB2
45#define CMD_FRMCTR3 0xB3
46
47#define CMD_DINVCTR 0xB4
48#define CMD_RGBBLK 0xB5
49#define CMD_DFUNCTR 0xB6
50#define CMD_SDRVDIR 0xB7
51#define CMD_GDRVDIR 0xB8
52
53#define CMD_PWCTR1 0xC0
54#define CMD_PWCTR2 0xC1
55#define CMD_PWCTR3 0xC2
56#define CMD_PWCTR4 0xC3
57#define CMD_PWCTR5 0xC4
58#define CMD_VCOMCTR1 0xC5
59#define CMD_VCOMCTR2 0xC6
60#define CMD_VCOMOFFS 0xC7
61#define CMD_PGAMMAC 0xE0
62#define CMD_NGAMMAC 0xE1
63#define CMD_GAMRSEL 0xF2
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78
79#ifdef RED
80#define __OFFSET 32
81#else
82#define __OFFSET 0
83#endif
84
85static int init_display(struct fbtft_par *par)
86{
87 par->fbtftops.reset(par);
88
89 if (par->gpio.cs != -1)
90 gpio_set_value(par->gpio.cs, 0);
91
92 write_reg(par, MIPI_DCS_SOFT_RESET);
93 mdelay(500);
94 write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
95 mdelay(5);
96 write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
97
98 write_reg(par, MIPI_DCS_SET_GAMMA_CURVE, 0x02);
99#ifdef GAMMA_ADJ
100 write_reg(par, CMD_GAMRSEL, 0x01);
101#endif
102 write_reg(par, MIPI_DCS_ENTER_NORMAL_MODE);
103 write_reg(par, CMD_DFUNCTR, 0xff, 0x06);
104
105 write_reg(par, CMD_FRMCTR1, 0x08, 0x02);
106 write_reg(par, CMD_DINVCTR, 0x07);
107
108 write_reg(par, CMD_PWCTR1, 0x0A, 0x02);
109
110 write_reg(par, CMD_PWCTR2, 0x02);
111
112 write_reg(par, CMD_VCOMCTR1, 0x50, 0x63);
113 write_reg(par, CMD_VCOMOFFS, 0);
114
115 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, 0, 0, 0, WIDTH);
116 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, 0, 0, 0, HEIGHT);
117
118 write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
119 write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
120
121 return 0;
122}
123
124static void set_addr_win(struct fbtft_par *par, int xs, int ys,
125 int xe, int ye)
126{
127 switch (par->info->var.rotate) {
128 case 0:
129 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
130 xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
131 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
132 (ys + __OFFSET) >> 8, (ys + __OFFSET) & 0xff,
133 (ye + __OFFSET) >> 8, (ye + __OFFSET) & 0xff);
134 break;
135 case 90:
136 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
137 (xs + __OFFSET) >> 8, (xs + __OFFSET) & 0xff,
138 (xe + __OFFSET) >> 8, (xe + __OFFSET) & 0xff);
139 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
140 ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
141 break;
142 case 180:
143 case 270:
144 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
145 xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
146 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
147 ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
148 break;
149 default:
150
151 par->info->var.rotate = 0;
152 }
153 write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
154}
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176static int set_var(struct fbtft_par *par)
177{
178 u8 mactrl_data = 0;
179
180 switch (par->info->var.rotate) {
181 case 0:
182 mactrl_data = 0x08;
183 break;
184 case 180:
185 mactrl_data = 0xC8;
186 break;
187 case 270:
188 mactrl_data = 0xA8;
189 break;
190 case 90:
191 mactrl_data = 0x68;
192 break;
193 }
194
195
196 if (par->bgr)
197 mactrl_data |= BIT(2);
198 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, mactrl_data);
199 write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
200 return 0;
201}
202
203#ifdef GAMMA_ADJ
204#define CURVE(num, idx) curves[num * par->gamma.num_values + idx]
205static int gamma_adj(struct fbtft_par *par, u32 *curves)
206{
207 unsigned long mask[] = {
208 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
209 0x1f, 0x3f, 0x0f, 0x0f, 0x7f, 0x1f,
210 0x3F, 0x3F, 0x3F, 0x3F, 0x3F};
211 int i, j;
212
213 for (i = 0; i < GAMMA_NUM; i++)
214 for (j = 0; j < GAMMA_LEN; j++)
215 CURVE(i, j) &= mask[i * par->gamma.num_values + j];
216
217 write_reg(par, CMD_PGAMMAC,
218 CURVE(0, 0),
219 CURVE(0, 1),
220 CURVE(0, 2),
221 CURVE(0, 3),
222 CURVE(0, 4),
223 CURVE(0, 5),
224 CURVE(0, 6),
225 (CURVE(0, 7) << 4) | CURVE(0, 8),
226 CURVE(0, 9),
227 CURVE(0, 10),
228 CURVE(0, 11),
229 CURVE(0, 12),
230 CURVE(0, 13),
231 CURVE(0, 14),
232 CURVE(0, 15));
233
234
235 write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
236
237 return 0;
238}
239
240#undef CURVE
241#endif
242
243static struct fbtft_display display = {
244 .regwidth = 8,
245 .width = WIDTH,
246 .height = HEIGHT,
247 .bpp = BPP,
248 .fps = FPS,
249#ifdef GAMMA_ADJ
250 .gamma_num = GAMMA_NUM,
251 .gamma_len = GAMMA_LEN,
252 .gamma = DEFAULT_GAMMA,
253#endif
254 .fbtftops = {
255 .init_display = init_display,
256 .set_addr_win = set_addr_win,
257 .set_var = set_var,
258#ifdef GAMMA_ADJ
259 .set_gamma = gamma_adj,
260#endif
261 },
262};
263
264FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9163", &display);
265
266MODULE_ALIAS("spi:" DRVNAME);
267MODULE_ALIAS("platform:" DRVNAME);
268MODULE_ALIAS("spi:ili9163");
269MODULE_ALIAS("platform:ili9163");
270
271MODULE_DESCRIPTION("FB driver for the ILI9163 LCD Controller");
272MODULE_AUTHOR("Kozhevnikov Anatoly");
273MODULE_LICENSE("GPL");
274