LXR linux/drivers/tty/serial/samsung.h

   1#ifndef __SAMSUNG_H
   2#define __SAMSUNG_H
   3
   4/*
   5 * Driver for Samsung SoC onboard UARTs.
   6 *
   7 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
   8 *      http://armlinux.simtec.co.uk/
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License version 2 as
  12 * published by the Free Software Foundation.
  13*/
  14
  15#include <linux/dmaengine.h>
  16
  17struct s3c24xx_uart_info {
  18        char                    *name;
  19        unsigned int            type;
  20        unsigned int            fifosize;
  21        unsigned long           rx_fifomask;
  22        unsigned long           rx_fifoshift;
  23        unsigned long           rx_fifofull;
  24        unsigned long           tx_fifomask;
  25        unsigned long           tx_fifoshift;
  26        unsigned long           tx_fifofull;
  27        unsigned int            def_clk_sel;
  28        unsigned long           num_clks;
  29        unsigned long           clksel_mask;
  30        unsigned long           clksel_shift;
  31
  32        /* uart port features */
  33
  34        unsigned int            has_divslot:1;
  35
  36        /* uart controls */
  37        int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
  38};
  39
  40struct s3c24xx_serial_drv_data {
  41        struct s3c24xx_uart_info        *info;
  42        struct s3c2410_uartcfg          *def_cfg;
  43        unsigned int                    fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
  44};
  45
  46struct s3c24xx_uart_dma {
  47        unsigned int                    rx_chan_id;
  48        unsigned int                    tx_chan_id;
  49
  50        struct dma_slave_config         rx_conf;
  51        struct dma_slave_config         tx_conf;
  52
  53        struct dma_chan                 *rx_chan;
  54        struct dma_chan                 *tx_chan;
  55
  56        dma_addr_t                      rx_addr;
  57        dma_addr_t                      tx_addr;
  58
  59        dma_cookie_t                    rx_cookie;
  60        dma_cookie_t                    tx_cookie;
  61
  62        char                            *rx_buf;
  63
  64        dma_addr_t                      tx_transfer_addr;
  65
  66        size_t                          rx_size;
  67        size_t                          tx_size;
  68
  69        struct dma_async_tx_descriptor  *tx_desc;
  70        struct dma_async_tx_descriptor  *rx_desc;
  71
  72        int                             tx_bytes_requested;
  73        int                             rx_bytes_requested;
  74};
  75
  76struct s3c24xx_uart_port {
  77        unsigned char                   rx_claimed;
  78        unsigned char                   tx_claimed;
  79        unsigned int                    pm_level;
  80        unsigned long                   baudclk_rate;
  81        unsigned int                    min_dma_size;
  82
  83        unsigned int                    rx_irq;
  84        unsigned int                    tx_irq;
  85
  86        unsigned int                    tx_in_progress;
  87        unsigned int                    tx_mode;
  88        unsigned int                    rx_mode;
  89
  90        struct s3c24xx_uart_info        *info;
  91        struct clk                      *clk;
  92        struct clk                      *baudclk;
  93        struct uart_port                port;
  94        struct s3c24xx_serial_drv_data  *drv_data;
  95
  96        /* reference to platform data */
  97        struct s3c2410_uartcfg          *cfg;
  98
  99        struct s3c24xx_uart_dma         *dma;
 100
 101#ifdef CONFIG_ARM_S3C24XX_CPUFREQ
 102        struct notifier_block           freq_transition;
 103#endif
 104};
 105
 106/* conversion functions */
 107
 108#define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
 109
 110/* register access controls */
 111
 112#define portaddr(port, reg) ((port)->membase + (reg))
 113#define portaddrl(port, reg) \
 114        ((unsigned long *)(unsigned long)((port)->membase + (reg)))
 115
 116#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg)))
 117#define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg)))
 118
 119#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg))
 120#define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg))
 121
 122/* Byte-order aware bit setting/clearing functions. */
 123
 124static inline void s3c24xx_set_bit(struct uart_port *port, int idx,
 125                                   unsigned int reg)
 126{
 127        unsigned long flags;
 128        u32 val;
 129
 130        local_irq_save(flags);
 131        val = rd_regl(port, reg);
 132        val |= (1 << idx);
 133        wr_regl(port, reg, val);
 134        local_irq_restore(flags);
 135}
 136
 137static inline void s3c24xx_clear_bit(struct uart_port *port, int idx,
 138                                     unsigned int reg)
 139{
 140        unsigned long flags;
 141        u32 val;
 142
 143        local_irq_save(flags);
 144        val = rd_regl(port, reg);
 145        val &= ~(1 << idx);
 146        wr_regl(port, reg, val);
 147        local_irq_restore(flags);
 148}
 149
 150#endif
 151