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14#ifndef __MFD_LP3943_H__
15#define __MFD_LP3943_H__
16
17#include <linux/gpio.h>
18#include <linux/pwm.h>
19#include <linux/regmap.h>
20
21
22#define LP3943_REG_GPIO_A 0x00
23#define LP3943_REG_GPIO_B 0x01
24#define LP3943_REG_PRESCALE0 0x02
25#define LP3943_REG_PWM0 0x03
26#define LP3943_REG_PRESCALE1 0x04
27#define LP3943_REG_PWM1 0x05
28#define LP3943_REG_MUX0 0x06
29#define LP3943_REG_MUX1 0x07
30#define LP3943_REG_MUX2 0x08
31#define LP3943_REG_MUX3 0x09
32
33
34#define LP3943_GPIO_IN 0x00
35#define LP3943_GPIO_OUT_HIGH 0x00
36#define LP3943_GPIO_OUT_LOW 0x01
37#define LP3943_DIM_PWM0 0x02
38#define LP3943_DIM_PWM1 0x03
39
40#define LP3943_NUM_PWMS 2
41
42enum lp3943_pwm_output {
43 LP3943_PWM_OUT0,
44 LP3943_PWM_OUT1,
45 LP3943_PWM_OUT2,
46 LP3943_PWM_OUT3,
47 LP3943_PWM_OUT4,
48 LP3943_PWM_OUT5,
49 LP3943_PWM_OUT6,
50 LP3943_PWM_OUT7,
51 LP3943_PWM_OUT8,
52 LP3943_PWM_OUT9,
53 LP3943_PWM_OUT10,
54 LP3943_PWM_OUT11,
55 LP3943_PWM_OUT12,
56 LP3943_PWM_OUT13,
57 LP3943_PWM_OUT14,
58 LP3943_PWM_OUT15,
59};
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66struct lp3943_pwm_map {
67 enum lp3943_pwm_output *output;
68 int num_outputs;
69};
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75struct lp3943_platform_data {
76 struct lp3943_pwm_map *pwms[LP3943_NUM_PWMS];
77};
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85struct lp3943_reg_cfg {
86 u8 reg;
87 u8 mask;
88 u8 shift;
89};
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103struct lp3943 {
104 struct device *dev;
105 struct regmap *regmap;
106 struct lp3943_platform_data *pdata;
107 const struct lp3943_reg_cfg *mux_cfg;
108 unsigned long pin_used;
109};
110
111int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read);
112int lp3943_write_byte(struct lp3943 *lp3943, u8 reg, u8 data);
113int lp3943_update_bits(struct lp3943 *lp3943, u8 reg, u8 mask, u8 data);
114#endif
115