LXR linux/arch/arm/mach-mmp/clock.h

   1/*
   2 *  This program is free software; you can redistribute it and/or modify
   3 *  it under the terms of the GNU General Public License version 2 as
   4 *  published by the Free Software Foundation.
   5 */
   6
   7#include <linux/clkdev.h>
   8
   9struct clkops {
  10        void                    (*enable)(struct clk *);
  11        void                    (*disable)(struct clk *);
  12        unsigned long           (*getrate)(struct clk *);
  13        int                     (*setrate)(struct clk *, unsigned long);
  14};
  15
  16struct clk {
  17        const struct clkops     *ops;
  18
  19        void __iomem    *clk_rst;       /* clock reset control register */
  20        int             fnclksel;       /* functional clock select (APBC) */
  21        uint32_t        enable_val;     /* value for clock enable (APMU) */
  22        unsigned long   rate;
  23        int             enabled;
  24};
  25
  26extern struct clkops apbc_clk_ops;
  27extern struct clkops apmu_clk_ops;
  28
  29#define APBC_CLK(_name, _reg, _fnclksel, _rate)                 \
  30struct clk clk_##_name = {                                      \
  31                .clk_rst        = APBC_##_reg,                  \
  32                .fnclksel       = _fnclksel,                    \
  33                .rate           = _rate,                        \
  34                .ops            = &apbc_clk_ops,                \
  35}
  36
  37#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)       \
  38struct clk clk_##_name = {                                      \
  39                .clk_rst        = APBC_##_reg,                  \
  40                .fnclksel       = _fnclksel,                    \
  41                .rate           = _rate,                        \
  42                .ops            = _ops,                         \
  43}
  44
  45#define APMU_CLK(_name, _reg, _eval, _rate)                     \
  46struct clk clk_##_name = {                                      \
  47                .clk_rst        = APMU_##_reg,                  \
  48                .enable_val     = _eval,                        \
  49                .rate           = _rate,                        \
  50                .ops            = &apmu_clk_ops,                \
  51}
  52
  53#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)           \
  54struct clk clk_##_name = {                                      \
  55                .clk_rst        = APMU_##_reg,                  \
  56                .enable_val     = _eval,                        \
  57                .rate           = _rate,                        \
  58                .ops            = _ops,                         \
  59}
  60
  61#define INIT_CLKREG(_clk, _devname, _conname)                   \
  62        {                                                       \
  63                .clk            = _clk,                         \
  64                .dev_id         = _devname,                     \
  65                .con_id         = _conname,                     \
  66        }
  67
  68extern struct clk clk_pxa168_gpio;
  69extern struct clk clk_pxa168_timers;
  70