LXR linux/arch/mips/pci/pci.c

   1/*
   2 * This program is free software; you can redistribute  it and/or modify it
   3 * under  the terms of  the GNU General  Public License as published by the
   4 * Free Software Foundation;  either version 2 of the  License, or (at your
   5 * option) any later version.
   6 *
   7 * Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org)
   8 * Copyright (C) 2011 Wind River Systems,
   9 *   written by Ralf Baechle (ralf@linux-mips.org)
  10 */
  11#include <linux/bug.h>
  12#include <linux/kernel.h>
  13#include <linux/mm.h>
  14#include <linux/bootmem.h>
  15#include <linux/export.h>
  16#include <linux/init.h>
  17#include <linux/types.h>
  18#include <linux/pci.h>
  19#include <linux/of_address.h>
  20
  21#include <asm/cpu-info.h>
  22
  23unsigned long PCIBIOS_MIN_IO;
  24EXPORT_SYMBOL(PCIBIOS_MIN_IO);
  25
  26unsigned long PCIBIOS_MIN_MEM;
  27EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
  28
  29static int __init pcibios_set_cache_line_size(void)
  30{
  31        unsigned int lsize;
  32
  33        /*
  34         * Set PCI cacheline size to that of the highest level in the
  35         * cache hierarchy.
  36         */
  37        lsize = cpu_dcache_line_size();
  38        lsize = cpu_scache_line_size() ? : lsize;
  39        lsize = cpu_tcache_line_size() ? : lsize;
  40
  41        BUG_ON(!lsize);
  42
  43        pci_dfl_cache_line_size = lsize >> 2;
  44
  45        pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
  46        return 0;
  47}
  48arch_initcall(pcibios_set_cache_line_size);
  49
  50void pci_resource_to_user(const struct pci_dev *dev, int bar,
  51                          const struct resource *rsrc, resource_size_t *start,
  52                          resource_size_t *end)
  53{
  54        phys_addr_t size = resource_size(rsrc);
  55
  56        *start = fixup_bigphys_addr(rsrc->start, size);
  57        *end = rsrc->start + size;
  58}
  59