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8#ifndef _ASM_S390_IPL_H
9#define _ASM_S390_IPL_H
10
11#include <asm/lowcore.h>
12#include <asm/types.h>
13#include <asm/cio.h>
14#include <asm/setup.h>
15
16#define IPL_PARMBLOCK_ORIGIN 0x2000
17
18#define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \
19 sizeof(struct ipl_block_fcp))
20
21#define IPL_PARM_BLK0_FCP_LEN (sizeof(struct ipl_block_fcp) + 16)
22
23#define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \
24 sizeof(struct ipl_block_ccw))
25
26#define IPL_PARM_BLK0_CCW_LEN (sizeof(struct ipl_block_ccw) + 16)
27
28#define IPL_MAX_SUPPORTED_VERSION (0)
29
30#define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \
31 IPL_PARMBLOCK_ORIGIN)
32#define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.len)
33
34struct ipl_list_hdr {
35 u32 len;
36 u8 reserved1[3];
37 u8 version;
38 u32 blk0_len;
39 u8 pbt;
40 u8 flags;
41 u16 reserved2;
42 u8 loadparm[8];
43} __attribute__((packed));
44
45struct ipl_block_fcp {
46 u8 reserved1[305-1];
47 u8 opt;
48 u8 reserved2[3];
49 u16 reserved3;
50 u16 devno;
51 u8 reserved4[4];
52 u64 wwpn;
53 u64 lun;
54 u32 bootprog;
55 u8 reserved5[12];
56 u64 br_lba;
57 u32 scp_data_len;
58 u8 reserved6[260];
59 u8 scp_data[];
60} __attribute__((packed));
61
62#define DIAG308_VMPARM_SIZE 64
63#define DIAG308_SCPDATA_SIZE (PAGE_SIZE - (sizeof(struct ipl_list_hdr) + \
64 offsetof(struct ipl_block_fcp, scp_data)))
65
66struct ipl_block_ccw {
67 u8 reserved1[84];
68 u16 reserved2 : 13;
69 u8 ssid : 3;
70 u16 devno;
71 u8 vm_flags;
72 u8 reserved3[3];
73 u32 vm_parm_len;
74 u8 nss_name[8];
75 u8 vm_parm[DIAG308_VMPARM_SIZE];
76 u8 reserved4[8];
77} __attribute__((packed));
78
79struct ipl_parameter_block {
80 struct ipl_list_hdr hdr;
81 union {
82 struct ipl_block_fcp fcp;
83 struct ipl_block_ccw ccw;
84 } ipl_info;
85} __packed __aligned(PAGE_SIZE);
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89
90extern u32 ipl_flags;
91
92struct save_area;
93struct save_area * __init save_area_alloc(bool is_boot_cpu);
94struct save_area * __init save_area_boot_cpu(void);
95void __init save_area_add_regs(struct save_area *, void *regs);
96void __init save_area_add_vxrs(struct save_area *, __vector128 *vxrs);
97
98extern void do_reipl(void);
99extern void do_halt(void);
100extern void do_poff(void);
101extern void ipl_verify_parameters(void);
102extern void ipl_update_parameters(void);
103extern size_t append_ipl_vmparm(char *, size_t);
104extern size_t append_ipl_scpdata(char *, size_t);
105
106enum {
107 IPL_DEVNO_VALID = 1,
108 IPL_PARMBLOCK_VALID = 2,
109 IPL_NSS_VALID = 4,
110};
111
112enum ipl_type {
113 IPL_TYPE_UNKNOWN = 1,
114 IPL_TYPE_CCW = 2,
115 IPL_TYPE_FCP = 4,
116 IPL_TYPE_FCP_DUMP = 8,
117 IPL_TYPE_NSS = 16,
118};
119
120struct ipl_info
121{
122 enum ipl_type type;
123 union {
124 struct {
125 struct ccw_dev_id dev_id;
126 } ccw;
127 struct {
128 struct ccw_dev_id dev_id;
129 u64 wwpn;
130 u64 lun;
131 } fcp;
132 struct {
133 char name[NSS_NAME_SIZE + 1];
134 } nss;
135 } data;
136};
137
138extern struct ipl_info ipl_info;
139extern void setup_ipl(void);
140
141
142
143
144enum diag308_subcode {
145 DIAG308_REL_HSA = 2,
146 DIAG308_LOAD_CLEAR = 3,
147 DIAG308_LOAD_NORMAL_DUMP = 4,
148 DIAG308_SET = 5,
149 DIAG308_STORE = 6,
150};
151
152enum diag308_ipl_type {
153 DIAG308_IPL_TYPE_FCP = 0,
154 DIAG308_IPL_TYPE_CCW = 2,
155};
156
157enum diag308_opt {
158 DIAG308_IPL_OPT_IPL = 0x10,
159 DIAG308_IPL_OPT_DUMP = 0x20,
160};
161
162enum diag308_flags {
163 DIAG308_FLAGS_LP_VALID = 0x80,
164};
165
166enum diag308_vm_flags {
167 DIAG308_VM_FLAGS_NSS_VALID = 0x80,
168 DIAG308_VM_FLAGS_VP_VALID = 0x40,
169};
170
171enum diag308_rc {
172 DIAG308_RC_OK = 0x0001,
173 DIAG308_RC_NOCONFIG = 0x0102,
174};
175
176extern int diag308(unsigned long subcode, void *addr);
177extern void diag308_reset(void);
178extern void store_status(void (*fn)(void *), void *data);
179extern void lgr_info_log(void);
180
181#endif
182
