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14#ifndef _CCU_NKM_H_
15#define _CCU_NKM_H_
16
17#include <linux/clk-provider.h>
18
19#include "ccu_common.h"
20#include "ccu_div.h"
21#include "ccu_mult.h"
22
23
24
25
26
27
28struct ccu_nkm {
29 u32 enable;
30 u32 lock;
31
32 struct ccu_mult_internal n;
33 struct ccu_mult_internal k;
34 struct ccu_div_internal m;
35 struct ccu_mux_internal mux;
36
37 unsigned int fixed_post_div;
38
39 struct ccu_common common;
40};
41
42#define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \
43 _nshift, _nwidth, \
44 _kshift, _kwidth, \
45 _mshift, _mwidth, \
46 _muxshift, _muxwidth, \
47 _gate, _lock, _flags) \
48 struct ccu_nkm _struct = { \
49 .enable = _gate, \
50 .lock = _lock, \
51 .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
52 .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
53 .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
54 .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
55 .common = { \
56 .reg = _reg, \
57 .hw.init = CLK_HW_INIT_PARENTS(_name, \
58 _parents, \
59 &ccu_nkm_ops, \
60 _flags), \
61 }, \
62 }
63
64#define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
65 _nshift, _nwidth, \
66 _kshift, _kwidth, \
67 _mshift, _mwidth, \
68 _gate, _lock, _flags) \
69 struct ccu_nkm _struct = { \
70 .enable = _gate, \
71 .lock = _lock, \
72 .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
73 .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
74 .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
75 .common = { \
76 .reg = _reg, \
77 .hw.init = CLK_HW_INIT(_name, \
78 _parent, \
79 &ccu_nkm_ops, \
80 _flags), \
81 }, \
82 }
83
84static inline struct ccu_nkm *hw_to_ccu_nkm(struct clk_hw *hw)
85{
86 struct ccu_common *common = hw_to_ccu_common(hw);
87
88 return container_of(common, struct ccu_nkm, common);
89}
90
91extern const struct clk_ops ccu_nkm_ops;
92
93#endif
94