LXR linux/drivers/crypto/qat/qat_common/icp_qat_fw_init

   1/*
   2  This file is provided under a dual BSD/GPLv2 license.  When using or
   3  redistributing this file, you may do so under either license.
   4
   5  GPL LICENSE SUMMARY
   6  Copyright(c) 2014 Intel Corporation.
   7  This program is free software; you can redistribute it and/or modify
   8  it under the terms of version 2 of the GNU General Public License as
   9  published by the Free Software Foundation.
  10
  11  This program is distributed in the hope that it will be useful, but
  12  WITHOUT ANY WARRANTY; without even the implied warranty of
  13  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  General Public License for more details.
  15
  16  Contact Information:
  17  qat-linux@intel.com
  18
  19  BSD LICENSE
  20  Copyright(c) 2014 Intel Corporation.
  21  Redistribution and use in source and binary forms, with or without
  22  modification, are permitted provided that the following conditions
  23  are met:
  24
  25    * Redistributions of source code must retain the above copyright
  26      notice, this list of conditions and the following disclaimer.
  27    * Redistributions in binary form must reproduce the above copyright
  28      notice, this list of conditions and the following disclaimer in
  29      the documentation and/or other materials provided with the
  30      distribution.
  31    * Neither the name of Intel Corporation nor the names of its
  32      contributors may be used to endorse or promote products derived
  33      from this software without specific prior written permission.
  34
  35  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  36  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  37  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  38  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  39  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  40  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  41  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  42  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  43  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  44  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  45  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46*/
  47#ifndef _ICP_QAT_FW_INIT_ADMIN_H_
  48#define _ICP_QAT_FW_INIT_ADMIN_H_
  49
  50#include "icp_qat_fw.h"
  51
  52enum icp_qat_fw_init_admin_cmd_id {
  53        ICP_QAT_FW_INIT_ME = 0,
  54        ICP_QAT_FW_TRNG_ENABLE = 1,
  55        ICP_QAT_FW_TRNG_DISABLE = 2,
  56        ICP_QAT_FW_CONSTANTS_CFG = 3,
  57        ICP_QAT_FW_STATUS_GET = 4,
  58        ICP_QAT_FW_COUNTERS_GET = 5,
  59        ICP_QAT_FW_LOOPBACK = 6,
  60        ICP_QAT_FW_HEARTBEAT_SYNC = 7,
  61        ICP_QAT_FW_HEARTBEAT_GET = 8
  62};
  63
  64enum icp_qat_fw_init_admin_resp_status {
  65        ICP_QAT_FW_INIT_RESP_STATUS_SUCCESS = 0,
  66        ICP_QAT_FW_INIT_RESP_STATUS_FAIL
  67};
  68
  69struct icp_qat_fw_init_admin_req {
  70        uint16_t init_cfg_sz;
  71        uint8_t resrvd1;
  72        uint8_t init_admin_cmd_id;
  73        uint32_t resrvd2;
  74        uint64_t opaque_data;
  75        uint64_t init_cfg_ptr;
  76        uint64_t resrvd3;
  77};
  78
  79struct icp_qat_fw_init_admin_resp_hdr {
  80        uint8_t flags;
  81        uint8_t resrvd1;
  82        uint8_t status;
  83        uint8_t init_admin_cmd_id;
  84};
  85
  86struct icp_qat_fw_init_admin_resp_pars {
  87        union {
  88                uint32_t resrvd1[ICP_QAT_FW_NUM_LONGWORDS_4];
  89                struct {
  90                        uint32_t version_patch_num;
  91                        uint8_t context_id;
  92                        uint8_t ae_id;
  93                        uint16_t resrvd1;
  94                        uint64_t resrvd2;
  95                } s1;
  96                struct {
  97                        uint64_t req_rec_count;
  98                        uint64_t resp_sent_count;
  99                } s2;
 100        } u;
 101};
 102
 103struct icp_qat_fw_init_admin_resp {
 104        struct icp_qat_fw_init_admin_resp_hdr init_resp_hdr;
 105        union {
 106                uint32_t resrvd2;
 107                struct {
 108                        uint16_t version_minor_num;
 109                        uint16_t version_major_num;
 110                } s;
 111        } u;
 112        uint64_t opaque_data;
 113        struct icp_qat_fw_init_admin_resp_pars init_resp_pars;
 114};
 115
 116#define ICP_QAT_FW_COMN_HEARTBEAT_OK 0
 117#define ICP_QAT_FW_COMN_HEARTBEAT_BLOCKED 1
 118#define ICP_QAT_FW_COMN_HEARTBEAT_FLAG_BITPOS 0
 119#define ICP_QAT_FW_COMN_HEARTBEAT_FLAG_MASK 0x1
 120#define ICP_QAT_FW_COMN_STATUS_RESRVD_FLD_MASK 0xFE
 121#define ICP_QAT_FW_COMN_HEARTBEAT_HDR_FLAG_GET(hdr_t) \
 122        ICP_QAT_FW_COMN_HEARTBEAT_FLAG_GET(hdr_t.flags)
 123
 124#define ICP_QAT_FW_COMN_HEARTBEAT_HDR_FLAG_SET(hdr_t, val) \
 125        ICP_QAT_FW_COMN_HEARTBEAT_FLAG_SET(hdr_t, val)
 126
 127#define ICP_QAT_FW_COMN_HEARTBEAT_FLAG_GET(flags) \
 128        QAT_FIELD_GET(flags, \
 129                 ICP_QAT_FW_COMN_HEARTBEAT_FLAG_BITPOS, \
 130                 ICP_QAT_FW_COMN_HEARTBEAT_FLAG_MASK)
 131#endif
 132