linux/drivers/gpu/drm/i915/i915_gem_object.h
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   1/*
   2 * Copyright © 2016 Intel Corporation
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice (including the next
  12 * paragraph) shall be included in all copies or substantial portions of the
  13 * Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21 * IN THE SOFTWARE.
  22 *
  23 */
  24
  25#ifndef __I915_GEM_OBJECT_H__
  26#define __I915_GEM_OBJECT_H__
  27
  28#include <linux/reservation.h>
  29
  30#include <drm/drm_vma_manager.h>
  31#include <drm/drm_gem.h>
  32#include <drm/drmP.h>
  33
  34#include <drm/i915_drm.h>
  35
  36#include "i915_gem_request.h"
  37#include "i915_selftest.h"
  38
  39struct drm_i915_gem_object;
  40
  41/*
  42 * struct i915_lut_handle tracks the fast lookups from handle to vma used
  43 * for execbuf. Although we use a radixtree for that mapping, in order to
  44 * remove them as the object or context is closed, we need a secondary list
  45 * and a translation entry (i915_lut_handle).
  46 */
  47struct i915_lut_handle {
  48        struct list_head obj_link;
  49        struct list_head ctx_link;
  50        struct i915_gem_context *ctx;
  51        u32 handle;
  52};
  53
  54struct drm_i915_gem_object_ops {
  55        unsigned int flags;
  56#define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)
  57#define I915_GEM_OBJECT_IS_SHRINKABLE   BIT(1)
  58
  59        /* Interface between the GEM object and its backing storage.
  60         * get_pages() is called once prior to the use of the associated set
  61         * of pages before to binding them into the GTT, and put_pages() is
  62         * called after we no longer need them. As we expect there to be
  63         * associated cost with migrating pages between the backing storage
  64         * and making them available for the GPU (e.g. clflush), we may hold
  65         * onto the pages after they are no longer referenced by the GPU
  66         * in case they may be used again shortly (for example migrating the
  67         * pages to a different memory domain within the GTT). put_pages()
  68         * will therefore most likely be called when the object itself is
  69         * being released or under memory pressure (where we attempt to
  70         * reap pages for the shrinker).
  71         */
  72        struct sg_table *(*get_pages)(struct drm_i915_gem_object *);
  73        void (*put_pages)(struct drm_i915_gem_object *, struct sg_table *);
  74
  75        int (*pwrite)(struct drm_i915_gem_object *,
  76                      const struct drm_i915_gem_pwrite *);
  77
  78        int (*dmabuf_export)(struct drm_i915_gem_object *);
  79        void (*release)(struct drm_i915_gem_object *);
  80};
  81
  82struct drm_i915_gem_object {
  83        struct drm_gem_object base;
  84
  85        const struct drm_i915_gem_object_ops *ops;
  86
  87        /**
  88         * @vma_list: List of VMAs backed by this object
  89         *
  90         * The VMA on this list are ordered by type, all GGTT vma are placed
  91         * at the head and all ppGTT vma are placed at the tail. The different
  92         * types of GGTT vma are unordered between themselves, use the
  93         * @vma_tree (which has a defined order between all VMA) to find an
  94         * exact match.
  95         */
  96        struct list_head vma_list;
  97        /**
  98         * @vma_tree: Ordered tree of VMAs backed by this object
  99         *
 100         * All VMA created for this object are placed in the @vma_tree for
 101         * fast retrieval via a binary search in i915_vma_instance().
 102         * They are also added to @vma_list for easy iteration.
 103         */
 104        struct rb_root vma_tree;
 105
 106        /**
 107         * @lut_list: List of vma lookup entries in use for this object.
 108         *
 109         * If this object is closed, we need to remove all of its VMA from
 110         * the fast lookup index in associated contexts; @lut_list provides
 111         * this translation from object to context->handles_vma.
 112         */
 113        struct list_head lut_list;
 114
 115        /** Stolen memory for this object, instead of being backed by shmem. */
 116        struct drm_mm_node *stolen;
 117        struct list_head global_link;
 118        union {
 119                struct rcu_head rcu;
 120                struct llist_node freed;
 121        };
 122
 123        /**
 124         * Whether the object is currently in the GGTT mmap.
 125         */
 126        struct list_head userfault_link;
 127
 128        struct list_head batch_pool_link;
 129        I915_SELFTEST_DECLARE(struct list_head st_link);
 130
 131        unsigned long flags;
 132
 133        /**
 134         * Have we taken a reference for the object for incomplete GPU
 135         * activity?
 136         */
 137#define I915_BO_ACTIVE_REF 0
 138
 139        /*
 140         * Is the object to be mapped as read-only to the GPU
 141         * Only honoured if hardware has relevant pte bit
 142         */
 143        unsigned long gt_ro:1;
 144        unsigned int cache_level:3;
 145        unsigned int cache_coherent:2;
 146#define I915_BO_CACHE_COHERENT_FOR_READ BIT(0)
 147#define I915_BO_CACHE_COHERENT_FOR_WRITE BIT(1)
 148        unsigned int cache_dirty:1;
 149
 150        atomic_t frontbuffer_bits;
 151        unsigned int frontbuffer_ggtt_origin; /* write once */
 152        struct i915_gem_active frontbuffer_write;
 153
 154        /** Current tiling stride for the object, if it's tiled. */
 155        unsigned int tiling_and_stride;
 156#define FENCE_MINIMUM_STRIDE 128 /* See i915_tiling_ok() */
 157#define TILING_MASK (FENCE_MINIMUM_STRIDE-1)
 158#define STRIDE_MASK (~TILING_MASK)
 159
 160        /** Count of VMA actually bound by this object */
 161        unsigned int bind_count;
 162        unsigned int active_count;
 163        unsigned int pin_display;
 164
 165        struct {
 166                struct mutex lock; /* protects the pages and their use */
 167                atomic_t pages_pin_count;
 168
 169                struct sg_table *pages;
 170                void *mapping;
 171
 172                struct i915_gem_object_page_iter {
 173                        struct scatterlist *sg_pos;
 174                        unsigned int sg_idx; /* in pages, but 32bit eek! */
 175
 176                        struct radix_tree_root radix;
 177                        struct mutex lock; /* protects this cache */
 178                } get_page;
 179
 180                /**
 181                 * Advice: are the backing pages purgeable?
 182                 */
 183                unsigned int madv:2;
 184
 185                /**
 186                 * This is set if the object has been written to since the
 187                 * pages were last acquired.
 188                 */
 189                bool dirty:1;
 190
 191                /**
 192                 * This is set if the object has been pinned due to unknown
 193                 * swizzling.
 194                 */
 195                bool quirked:1;
 196        } mm;
 197
 198        /** Breadcrumb of last rendering to the buffer.
 199         * There can only be one writer, but we allow for multiple readers.
 200         * If there is a writer that necessarily implies that all other
 201         * read requests are complete - but we may only be lazily clearing
 202         * the read requests. A read request is naturally the most recent
 203         * request on a ring, so we may have two different write and read
 204         * requests on one ring where the write request is older than the
 205         * read request. This allows for the CPU to read from an active
 206         * buffer by only waiting for the write to complete.
 207         */
 208        struct reservation_object *resv;
 209
 210        /** References from framebuffers, locks out tiling changes. */
 211        unsigned int framebuffer_references;
 212
 213        /** Record of address bit 17 of each page at last unbind. */
 214        unsigned long *bit_17;
 215
 216        union {
 217                struct i915_gem_userptr {
 218                        uintptr_t ptr;
 219                        unsigned read_only :1;
 220
 221                        struct i915_mm_struct *mm;
 222                        struct i915_mmu_object *mmu_object;
 223                        struct work_struct *work;
 224                } userptr;
 225
 226                unsigned long scratch;
 227        };
 228
 229        /** for phys allocated objects */
 230        struct drm_dma_handle *phys_handle;
 231
 232        struct reservation_object __builtin_resv;
 233};
 234
 235static inline struct drm_i915_gem_object *
 236to_intel_bo(struct drm_gem_object *gem)
 237{
 238        /* Assert that to_intel_bo(NULL) == NULL */
 239        BUILD_BUG_ON(offsetof(struct drm_i915_gem_object, base));
 240
 241        return container_of(gem, struct drm_i915_gem_object, base);
 242}
 243
 244/**
 245 * i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle
 246 * @filp: DRM file private date
 247 * @handle: userspace handle
 248 *
 249 * Returns:
 250 *
 251 * A pointer to the object named by the handle if such exists on @filp, NULL
 252 * otherwise. This object is only valid whilst under the RCU read lock, and
 253 * note carefully the object may be in the process of being destroyed.
 254 */
 255static inline struct drm_i915_gem_object *
 256i915_gem_object_lookup_rcu(struct drm_file *file, u32 handle)
 257{
 258#ifdef CONFIG_LOCKDEP
 259        WARN_ON(debug_locks && !lock_is_held(&rcu_lock_map));
 260#endif
 261        return idr_find(&file->object_idr, handle);
 262}
 263
 264static inline struct drm_i915_gem_object *
 265i915_gem_object_lookup(struct drm_file *file, u32 handle)
 266{
 267        struct drm_i915_gem_object *obj;
 268
 269        rcu_read_lock();
 270        obj = i915_gem_object_lookup_rcu(file, handle);
 271        if (obj && !kref_get_unless_zero(&obj->base.refcount))
 272                obj = NULL;
 273        rcu_read_unlock();
 274
 275        return obj;
 276}
 277
 278__deprecated
 279extern struct drm_gem_object *
 280drm_gem_object_lookup(struct drm_file *file, u32 handle);
 281
 282__attribute__((nonnull))
 283static inline struct drm_i915_gem_object *
 284i915_gem_object_get(struct drm_i915_gem_object *obj)
 285{
 286        drm_gem_object_reference(&obj->base);
 287        return obj;
 288}
 289
 290__deprecated
 291extern void drm_gem_object_reference(struct drm_gem_object *);
 292
 293__attribute__((nonnull))
 294static inline void
 295i915_gem_object_put(struct drm_i915_gem_object *obj)
 296{
 297        __drm_gem_object_unreference(&obj->base);
 298}
 299
 300__deprecated
 301extern void drm_gem_object_unreference(struct drm_gem_object *);
 302
 303__deprecated
 304extern void drm_gem_object_unreference_unlocked(struct drm_gem_object *);
 305
 306static inline void i915_gem_object_lock(struct drm_i915_gem_object *obj)
 307{
 308        reservation_object_lock(obj->resv, NULL);
 309}
 310
 311static inline void i915_gem_object_unlock(struct drm_i915_gem_object *obj)
 312{
 313        reservation_object_unlock(obj->resv);
 314}
 315
 316static inline bool
 317i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj)
 318{
 319        return obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE;
 320}
 321
 322static inline bool
 323i915_gem_object_is_shrinkable(const struct drm_i915_gem_object *obj)
 324{
 325        return obj->ops->flags & I915_GEM_OBJECT_IS_SHRINKABLE;
 326}
 327
 328static inline bool
 329i915_gem_object_is_active(const struct drm_i915_gem_object *obj)
 330{
 331        return obj->active_count;
 332}
 333
 334static inline bool
 335i915_gem_object_has_active_reference(const struct drm_i915_gem_object *obj)
 336{
 337        return test_bit(I915_BO_ACTIVE_REF, &obj->flags);
 338}
 339
 340static inline void
 341i915_gem_object_set_active_reference(struct drm_i915_gem_object *obj)
 342{
 343        lockdep_assert_held(&obj->base.dev->struct_mutex);
 344        __set_bit(I915_BO_ACTIVE_REF, &obj->flags);
 345}
 346
 347static inline void
 348i915_gem_object_clear_active_reference(struct drm_i915_gem_object *obj)
 349{
 350        lockdep_assert_held(&obj->base.dev->struct_mutex);
 351        __clear_bit(I915_BO_ACTIVE_REF, &obj->flags);
 352}
 353
 354void __i915_gem_object_release_unless_active(struct drm_i915_gem_object *obj);
 355
 356static inline bool
 357i915_gem_object_is_framebuffer(const struct drm_i915_gem_object *obj)
 358{
 359        return READ_ONCE(obj->framebuffer_references);
 360}
 361
 362static inline unsigned int
 363i915_gem_object_get_tiling(struct drm_i915_gem_object *obj)
 364{
 365        return obj->tiling_and_stride & TILING_MASK;
 366}
 367
 368static inline bool
 369i915_gem_object_is_tiled(struct drm_i915_gem_object *obj)
 370{
 371        return i915_gem_object_get_tiling(obj) != I915_TILING_NONE;
 372}
 373
 374static inline unsigned int
 375i915_gem_object_get_stride(struct drm_i915_gem_object *obj)
 376{
 377        return obj->tiling_and_stride & STRIDE_MASK;
 378}
 379
 380static inline unsigned int
 381i915_gem_tile_height(unsigned int tiling)
 382{
 383        GEM_BUG_ON(!tiling);
 384        return tiling == I915_TILING_Y ? 32 : 8;
 385}
 386
 387static inline unsigned int
 388i915_gem_object_get_tile_height(struct drm_i915_gem_object *obj)
 389{
 390        return i915_gem_tile_height(i915_gem_object_get_tiling(obj));
 391}
 392
 393static inline unsigned int
 394i915_gem_object_get_tile_row_size(struct drm_i915_gem_object *obj)
 395{
 396        return (i915_gem_object_get_stride(obj) *
 397                i915_gem_object_get_tile_height(obj));
 398}
 399
 400int i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
 401                               unsigned int tiling, unsigned int stride);
 402
 403static inline struct intel_engine_cs *
 404i915_gem_object_last_write_engine(struct drm_i915_gem_object *obj)
 405{
 406        struct intel_engine_cs *engine = NULL;
 407        struct dma_fence *fence;
 408
 409        rcu_read_lock();
 410        fence = reservation_object_get_excl_rcu(obj->resv);
 411        rcu_read_unlock();
 412
 413        if (fence && dma_fence_is_i915(fence) && !dma_fence_is_signaled(fence))
 414                engine = to_request(fence)->engine;
 415        dma_fence_put(fence);
 416
 417        return engine;
 418}
 419
 420void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
 421                                         unsigned int cache_level);
 422void i915_gem_object_flush_if_display(struct drm_i915_gem_object *obj);
 423
 424#endif
 425
 426