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28#include <drm/drm_dp_helper.h>
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
31#include "i915_drv.h"
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
35
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57
58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
60
61
62static u32 _get_blocksize(const u8 *block_base)
63{
64
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
77static const void *
78find_section(const void *_bdb, int section_id)
79{
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
82 int index = 0;
83 u32 total, current_size;
84 u8 current_id;
85
86
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90
91 while (index + 3 < total) {
92 current_id = *(base + index);
93 current_size = _get_blocksize(base + index);
94 index += 3;
95
96 if (index + current_size > total)
97 return NULL;
98
99 if (current_id == section_id)
100 return base + index;
101
102 index += current_size;
103 }
104
105 return NULL;
106}
107
108static void
109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
110 const struct lvds_dvo_timing *dvo_timing)
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 ((dvo_timing->hsync_pulse_width_hi << 8) |
118 dvo_timing->hsync_pulse_width_lo);
119 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
120 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
121
122 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
123 dvo_timing->vactive_lo;
124 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
125 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
126 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
127 ((dvo_timing->vsync_pulse_width_hi << 4) |
128 dvo_timing->vsync_pulse_width_lo);
129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
130 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
131 panel_fixed_mode->clock = dvo_timing->clock * 10;
132 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
133
134 if (dvo_timing->hsync_positive)
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
136 else
137 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
138
139 if (dvo_timing->vsync_positive)
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
141 else
142 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
143
144 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
145 dvo_timing->himage_lo;
146 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
147 dvo_timing->vimage_lo;
148
149
150 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
151 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
152 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
153 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
154
155 drm_mode_set_name(panel_fixed_mode);
156}
157
158static const struct lvds_dvo_timing *
159get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
160 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
161 int index)
162{
163
164
165
166
167
168
169 int lfp_data_size =
170 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
172 int dvo_timing_offset =
173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
175 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
176
177 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
178}
179
180
181
182
183static const struct lvds_fp_timing *
184get_lvds_fp_timing(const struct bdb_header *bdb,
185 const struct bdb_lvds_lfp_data *data,
186 const struct bdb_lvds_lfp_data_ptrs *ptrs,
187 int index)
188{
189 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
190 u16 data_size = ((const u16 *)data)[-1];
191 size_t ofs;
192
193 if (index >= ARRAY_SIZE(ptrs->ptr))
194 return NULL;
195 ofs = ptrs->ptr[index].fp_timing_offset;
196 if (ofs < data_ofs ||
197 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
198 return NULL;
199 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
200}
201
202
203static void
204parse_lfp_panel_data(struct drm_i915_private *dev_priv,
205 const struct bdb_header *bdb)
206{
207 const struct bdb_lvds_options *lvds_options;
208 const struct bdb_lvds_lfp_data *lvds_lfp_data;
209 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
210 const struct lvds_dvo_timing *panel_dvo_timing;
211 const struct lvds_fp_timing *fp_timing;
212 struct drm_display_mode *panel_fixed_mode;
213 int panel_type;
214 int drrs_mode;
215 int ret;
216
217 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
218 if (!lvds_options)
219 return;
220
221 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
222
223 ret = intel_opregion_get_panel_type(dev_priv);
224 if (ret >= 0) {
225 WARN_ON(ret > 0xf);
226 panel_type = ret;
227 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
228 } else {
229 if (lvds_options->panel_type > 0xf) {
230 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
231 lvds_options->panel_type);
232 return;
233 }
234 panel_type = lvds_options->panel_type;
235 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
236 }
237
238 dev_priv->vbt.panel_type = panel_type;
239
240 drrs_mode = (lvds_options->dps_panel_type_bits
241 >> (panel_type * 2)) & MODE_MASK;
242
243
244
245
246
247 switch (drrs_mode) {
248 case 0:
249 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
250 DRM_DEBUG_KMS("DRRS supported mode is static\n");
251 break;
252 case 2:
253 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
254 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
255 break;
256 default:
257 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
258 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
259 break;
260 }
261
262 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
263 if (!lvds_lfp_data)
264 return;
265
266 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
267 if (!lvds_lfp_data_ptrs)
268 return;
269
270 dev_priv->vbt.lvds_vbt = 1;
271
272 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
273 lvds_lfp_data_ptrs,
274 panel_type);
275
276 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
277 if (!panel_fixed_mode)
278 return;
279
280 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
281
282 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
283
284 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
285 drm_mode_debug_printmodeline(panel_fixed_mode);
286
287 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
288 lvds_lfp_data_ptrs,
289 panel_type);
290 if (fp_timing) {
291
292 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
293 fp_timing->y_res == panel_fixed_mode->vdisplay) {
294 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
295 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
296 dev_priv->vbt.bios_lvds_val);
297 }
298 }
299}
300
301static void
302parse_lfp_backlight(struct drm_i915_private *dev_priv,
303 const struct bdb_header *bdb)
304{
305 const struct bdb_lfp_backlight_data *backlight_data;
306 const struct bdb_lfp_backlight_data_entry *entry;
307 int panel_type = dev_priv->vbt.panel_type;
308
309 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
310 if (!backlight_data)
311 return;
312
313 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
314 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
315 backlight_data->entry_size);
316 return;
317 }
318
319 entry = &backlight_data->data[panel_type];
320
321 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
322 if (!dev_priv->vbt.backlight.present) {
323 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
324 entry->type);
325 return;
326 }
327
328 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
329 if (bdb->version >= 191 &&
330 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
331 const struct bdb_lfp_backlight_control_method *method;
332
333 method = &backlight_data->backlight_control[panel_type];
334 dev_priv->vbt.backlight.type = method->type;
335 dev_priv->vbt.backlight.controller = method->controller;
336 }
337
338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
342 "active %s, min brightness %u, level %u, controller %u\n",
343 dev_priv->vbt.backlight.pwm_freq_hz,
344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
345 dev_priv->vbt.backlight.min_brightness,
346 backlight_data->level[panel_type],
347 dev_priv->vbt.backlight.controller);
348}
349
350
351static void
352parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
353 const struct bdb_header *bdb)
354{
355 const struct lvds_dvo_timing *dvo_timing;
356 struct drm_display_mode *panel_fixed_mode;
357 int index;
358
359 index = i915.vbt_sdvo_panel_type;
360 if (index == -2) {
361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
362 return;
363 }
364
365 if (index == -1) {
366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
367
368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
369 if (!sdvo_lvds_options)
370 return;
371
372 index = sdvo_lvds_options->panel_type;
373 }
374
375 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
376 if (!dvo_timing)
377 return;
378
379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
380 if (!panel_fixed_mode)
381 return;
382
383 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
384
385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
386
387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
388 drm_mode_debug_printmodeline(panel_fixed_mode);
389}
390
391static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
392 bool alternate)
393{
394 switch (INTEL_INFO(dev_priv)->gen) {
395 case 2:
396 return alternate ? 66667 : 48000;
397 case 3:
398 case 4:
399 return alternate ? 100000 : 96000;
400 default:
401 return alternate ? 100000 : 120000;
402 }
403}
404
405static void
406parse_general_features(struct drm_i915_private *dev_priv,
407 const struct bdb_header *bdb)
408{
409 const struct bdb_general_features *general;
410
411 general = find_section(bdb, BDB_GENERAL_FEATURES);
412 if (!general)
413 return;
414
415 dev_priv->vbt.int_tv_support = general->int_tv_support;
416
417 if (bdb->version >= 155 &&
418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
419 dev_priv->vbt.int_crt_support = general->int_crt_support;
420 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
421 dev_priv->vbt.lvds_ssc_freq =
422 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
423 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
424 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
425 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
426 dev_priv->vbt.int_tv_support,
427 dev_priv->vbt.int_crt_support,
428 dev_priv->vbt.lvds_use_ssc,
429 dev_priv->vbt.lvds_ssc_freq,
430 dev_priv->vbt.display_clock_mode,
431 dev_priv->vbt.fdi_rx_polarity_inverted);
432}
433
434static void
435parse_general_definitions(struct drm_i915_private *dev_priv,
436 const struct bdb_header *bdb)
437{
438 const struct bdb_general_definitions *general;
439
440 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
441 if (general) {
442 u16 block_size = get_blocksize(general);
443 if (block_size >= sizeof(*general)) {
444 int bus_pin = general->crt_ddc_gmbus_pin;
445 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
446 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
447 dev_priv->vbt.crt_ddc_pin = bus_pin;
448 } else {
449 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
450 block_size);
451 }
452 }
453}
454
455static const union child_device_config *
456child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
457{
458 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
459}
460
461static void
462parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
463 const struct bdb_header *bdb)
464{
465 struct sdvo_device_mapping *p_mapping;
466 const struct bdb_general_definitions *p_defs;
467 const struct old_child_dev_config *child;
468 int i, child_device_num, count;
469 u16 block_size;
470
471 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
472 if (!p_defs) {
473 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
474 return;
475 }
476
477
478
479
480
481
482 if (p_defs->child_dev_size != sizeof(*child)) {
483 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
484 return;
485 }
486
487 block_size = get_blocksize(p_defs);
488
489 child_device_num = (block_size - sizeof(*p_defs)) /
490 p_defs->child_dev_size;
491 count = 0;
492 for (i = 0; i < child_device_num; i++) {
493 child = &child_device_ptr(p_defs, i)->old;
494 if (!child->device_type) {
495
496 continue;
497 }
498 if (child->slave_addr != SLAVE_ADDR1 &&
499 child->slave_addr != SLAVE_ADDR2) {
500
501
502
503
504 continue;
505 }
506 if (child->dvo_port != DEVICE_PORT_DVOB &&
507 child->dvo_port != DEVICE_PORT_DVOC) {
508
509 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
510 continue;
511 }
512 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
513 " %s port\n",
514 child->slave_addr,
515 (child->dvo_port == DEVICE_PORT_DVOB) ?
516 "SDVOB" : "SDVOC");
517 p_mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
518 if (!p_mapping->initialized) {
519 p_mapping->dvo_port = child->dvo_port;
520 p_mapping->slave_addr = child->slave_addr;
521 p_mapping->dvo_wiring = child->dvo_wiring;
522 p_mapping->ddc_pin = child->ddc_pin;
523 p_mapping->i2c_pin = child->i2c_pin;
524 p_mapping->initialized = 1;
525 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
526 p_mapping->dvo_port,
527 p_mapping->slave_addr,
528 p_mapping->dvo_wiring,
529 p_mapping->ddc_pin,
530 p_mapping->i2c_pin);
531 } else {
532 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
533 "two SDVO device.\n");
534 }
535 if (child->slave2_addr) {
536
537
538 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
539 " is a SDVO device with multiple inputs.\n");
540 }
541 count++;
542 }
543
544 if (!count) {
545
546 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
547 }
548 return;
549}
550
551static void
552parse_driver_features(struct drm_i915_private *dev_priv,
553 const struct bdb_header *bdb)
554{
555 const struct bdb_driver_features *driver;
556
557 driver = find_section(bdb, BDB_DRIVER_FEATURES);
558 if (!driver)
559 return;
560
561 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
562 dev_priv->vbt.edp.support = 1;
563
564 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
565
566
567
568
569
570
571 if (!driver->drrs_enabled)
572 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
573}
574
575static void
576parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
577{
578 const struct bdb_edp *edp;
579 const struct edp_power_seq *edp_pps;
580 const struct edp_link_params *edp_link_params;
581 int panel_type = dev_priv->vbt.panel_type;
582
583 edp = find_section(bdb, BDB_EDP);
584 if (!edp) {
585 if (dev_priv->vbt.edp.support)
586 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
587 return;
588 }
589
590 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
591 case EDP_18BPP:
592 dev_priv->vbt.edp.bpp = 18;
593 break;
594 case EDP_24BPP:
595 dev_priv->vbt.edp.bpp = 24;
596 break;
597 case EDP_30BPP:
598 dev_priv->vbt.edp.bpp = 30;
599 break;
600 }
601
602
603 edp_pps = &edp->power_seqs[panel_type];
604 edp_link_params = &edp->link_params[panel_type];
605
606 dev_priv->vbt.edp.pps = *edp_pps;
607
608 switch (edp_link_params->rate) {
609 case EDP_RATE_1_62:
610 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
611 break;
612 case EDP_RATE_2_7:
613 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
614 break;
615 default:
616 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
617 edp_link_params->rate);
618 break;
619 }
620
621 switch (edp_link_params->lanes) {
622 case EDP_LANE_1:
623 dev_priv->vbt.edp.lanes = 1;
624 break;
625 case EDP_LANE_2:
626 dev_priv->vbt.edp.lanes = 2;
627 break;
628 case EDP_LANE_4:
629 dev_priv->vbt.edp.lanes = 4;
630 break;
631 default:
632 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
633 edp_link_params->lanes);
634 break;
635 }
636
637 switch (edp_link_params->preemphasis) {
638 case EDP_PREEMPHASIS_NONE:
639 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
640 break;
641 case EDP_PREEMPHASIS_3_5dB:
642 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
643 break;
644 case EDP_PREEMPHASIS_6dB:
645 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
646 break;
647 case EDP_PREEMPHASIS_9_5dB:
648 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
649 break;
650 default:
651 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
652 edp_link_params->preemphasis);
653 break;
654 }
655
656 switch (edp_link_params->vswing) {
657 case EDP_VSWING_0_4V:
658 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
659 break;
660 case EDP_VSWING_0_6V:
661 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
662 break;
663 case EDP_VSWING_0_8V:
664 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
665 break;
666 case EDP_VSWING_1_2V:
667 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
668 break;
669 default:
670 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
671 edp_link_params->vswing);
672 break;
673 }
674
675 if (bdb->version >= 173) {
676 uint8_t vswing;
677
678
679 if (i915.edp_vswing) {
680 dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1;
681 } else {
682 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
683 dev_priv->vbt.edp.low_vswing = vswing == 0;
684 }
685 }
686}
687
688static void
689parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
690{
691 const struct bdb_psr *psr;
692 const struct psr_table *psr_table;
693 int panel_type = dev_priv->vbt.panel_type;
694
695 psr = find_section(bdb, BDB_PSR);
696 if (!psr) {
697 DRM_DEBUG_KMS("No PSR BDB found.\n");
698 return;
699 }
700
701 psr_table = &psr->psr_table[panel_type];
702
703 dev_priv->vbt.psr.full_link = psr_table->full_link;
704 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
705
706
707 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
708 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
709
710 switch (psr_table->lines_to_wait) {
711 case 0:
712 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
713 break;
714 case 1:
715 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
716 break;
717 case 2:
718 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
719 break;
720 case 3:
721 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
722 break;
723 default:
724 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
725 psr_table->lines_to_wait);
726 break;
727 }
728
729 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
730 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
731}
732
733static void
734parse_mipi_config(struct drm_i915_private *dev_priv,
735 const struct bdb_header *bdb)
736{
737 const struct bdb_mipi_config *start;
738 const struct mipi_config *config;
739 const struct mipi_pps_data *pps;
740 int panel_type = dev_priv->vbt.panel_type;
741
742
743 if (!intel_bios_is_dsi_present(dev_priv, NULL))
744 return;
745
746
747 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
748
749
750
751
752
753
754
755
756
757 start = find_section(bdb, BDB_MIPI_CONFIG);
758 if (!start) {
759 DRM_DEBUG_KMS("No MIPI config BDB found");
760 return;
761 }
762
763 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
764 panel_type);
765
766
767
768
769
770 config = &start->config[panel_type];
771 pps = &start->pps[panel_type];
772
773
774 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
775 if (!dev_priv->vbt.dsi.config)
776 return;
777
778 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
779 if (!dev_priv->vbt.dsi.pps) {
780 kfree(dev_priv->vbt.dsi.config);
781 return;
782 }
783
784
785
786
787
788
789 if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
790 dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
791 dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
792 }
793
794
795 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
796}
797
798
799static const u8 *
800find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
801 u16 panel_id, u32 *seq_size)
802{
803 u32 total = get_blocksize(sequence);
804 const u8 *data = &sequence->data[0];
805 u8 current_id;
806 u32 current_size;
807 int header_size = sequence->version >= 3 ? 5 : 3;
808 int index = 0;
809 int i;
810
811
812 if (sequence->version >= 3)
813 data += 4;
814
815 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
816 if (index + header_size > total) {
817 DRM_ERROR("Invalid sequence block (header)\n");
818 return NULL;
819 }
820
821 current_id = *(data + index);
822 if (sequence->version >= 3)
823 current_size = *((const u32 *)(data + index + 1));
824 else
825 current_size = *((const u16 *)(data + index + 1));
826
827 index += header_size;
828
829 if (index + current_size > total) {
830 DRM_ERROR("Invalid sequence block\n");
831 return NULL;
832 }
833
834 if (current_id == panel_id) {
835 *seq_size = current_size;
836 return data + index;
837 }
838
839 index += current_size;
840 }
841
842 DRM_ERROR("Sequence block detected but no valid configuration\n");
843
844 return NULL;
845}
846
847static int goto_next_sequence(const u8 *data, int index, int total)
848{
849 u16 len;
850
851
852 for (index = index + 1; index < total; index += len) {
853 u8 operation_byte = *(data + index);
854 index++;
855
856 switch (operation_byte) {
857 case MIPI_SEQ_ELEM_END:
858 return index;
859 case MIPI_SEQ_ELEM_SEND_PKT:
860 if (index + 4 > total)
861 return 0;
862
863 len = *((const u16 *)(data + index + 2)) + 4;
864 break;
865 case MIPI_SEQ_ELEM_DELAY:
866 len = 4;
867 break;
868 case MIPI_SEQ_ELEM_GPIO:
869 len = 2;
870 break;
871 case MIPI_SEQ_ELEM_I2C:
872 if (index + 7 > total)
873 return 0;
874 len = *(data + index + 6) + 7;
875 break;
876 default:
877 DRM_ERROR("Unknown operation byte\n");
878 return 0;
879 }
880 }
881
882 return 0;
883}
884
885static int goto_next_sequence_v3(const u8 *data, int index, int total)
886{
887 int seq_end;
888 u16 len;
889 u32 size_of_sequence;
890
891
892
893
894
895 if (total < 5) {
896 DRM_ERROR("Too small sequence size\n");
897 return 0;
898 }
899
900
901 index++;
902
903
904
905
906
907
908 size_of_sequence = *((const uint32_t *)(data + index));
909 index += 4;
910
911 seq_end = index + size_of_sequence;
912 if (seq_end > total) {
913 DRM_ERROR("Invalid sequence size\n");
914 return 0;
915 }
916
917 for (; index < total; index += len) {
918 u8 operation_byte = *(data + index);
919 index++;
920
921 if (operation_byte == MIPI_SEQ_ELEM_END) {
922 if (index != seq_end) {
923 DRM_ERROR("Invalid element structure\n");
924 return 0;
925 }
926 return index;
927 }
928
929 len = *(data + index);
930 index++;
931
932
933
934
935
936 switch (operation_byte) {
937 case MIPI_SEQ_ELEM_SEND_PKT:
938 case MIPI_SEQ_ELEM_DELAY:
939 case MIPI_SEQ_ELEM_GPIO:
940 case MIPI_SEQ_ELEM_I2C:
941 case MIPI_SEQ_ELEM_SPI:
942 case MIPI_SEQ_ELEM_PMIC:
943 break;
944 default:
945 DRM_ERROR("Unknown operation byte %u\n",
946 operation_byte);
947 break;
948 }
949 }
950
951 return 0;
952}
953
954static void
955parse_mipi_sequence(struct drm_i915_private *dev_priv,
956 const struct bdb_header *bdb)
957{
958 int panel_type = dev_priv->vbt.panel_type;
959 const struct bdb_mipi_sequence *sequence;
960 const u8 *seq_data;
961 u32 seq_size;
962 u8 *data;
963 int index = 0;
964
965
966 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
967 return;
968
969 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
970 if (!sequence) {
971 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
972 return;
973 }
974
975
976 if (sequence->version >= 4) {
977 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
978 sequence->version);
979 return;
980 }
981
982 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
983
984 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
985 if (!seq_data)
986 return;
987
988 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
989 if (!data)
990 return;
991
992
993 for (;;) {
994 u8 seq_id = *(data + index);
995 if (seq_id == MIPI_SEQ_END)
996 break;
997
998 if (seq_id >= MIPI_SEQ_MAX) {
999 DRM_ERROR("Unknown sequence %u\n", seq_id);
1000 goto err;
1001 }
1002
1003
1004 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1005 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
1006
1007 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1008
1009 if (sequence->version >= 3)
1010 index = goto_next_sequence_v3(data, index, seq_size);
1011 else
1012 index = goto_next_sequence(data, index, seq_size);
1013 if (!index) {
1014 DRM_ERROR("Invalid sequence %u\n", seq_id);
1015 goto err;
1016 }
1017 }
1018
1019 dev_priv->vbt.dsi.data = data;
1020 dev_priv->vbt.dsi.size = seq_size;
1021 dev_priv->vbt.dsi.seq_version = sequence->version;
1022
1023 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
1024 return;
1025
1026err:
1027 kfree(data);
1028 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1029}
1030
1031static u8 translate_iboost(u8 val)
1032{
1033 static const u8 mapping[] = { 1, 3, 7 };
1034
1035 if (val >= ARRAY_SIZE(mapping)) {
1036 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1037 return 0;
1038 }
1039 return mapping[val];
1040}
1041
1042static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1043 enum port port)
1044{
1045 const struct ddi_vbt_port_info *info =
1046 &dev_priv->vbt.ddi_port_info[port];
1047 enum port p;
1048
1049 if (!info->alternate_ddc_pin)
1050 return;
1051
1052 for_each_port_masked(p, (1 << port) - 1) {
1053 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1054
1055 if (info->alternate_ddc_pin != i->alternate_ddc_pin)
1056 continue;
1057
1058 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1059 "disabling port %c DVI/HDMI support\n",
1060 port_name(p), i->alternate_ddc_pin,
1061 port_name(port), port_name(p));
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072 i->supports_dvi = false;
1073 i->supports_hdmi = false;
1074 i->alternate_ddc_pin = 0;
1075 }
1076}
1077
1078static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1079 enum port port)
1080{
1081 const struct ddi_vbt_port_info *info =
1082 &dev_priv->vbt.ddi_port_info[port];
1083 enum port p;
1084
1085 if (!info->alternate_aux_channel)
1086 return;
1087
1088 for_each_port_masked(p, (1 << port) - 1) {
1089 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1090
1091 if (info->alternate_aux_channel != i->alternate_aux_channel)
1092 continue;
1093
1094 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1095 "disabling port %c DP support\n",
1096 port_name(p), i->alternate_aux_channel,
1097 port_name(port), port_name(p));
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108 i->supports_dp = false;
1109 i->alternate_aux_channel = 0;
1110 }
1111}
1112
1113static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
1114 const struct bdb_header *bdb)
1115{
1116 union child_device_config *it, *child = NULL;
1117 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1118 uint8_t hdmi_level_shift;
1119 int i, j;
1120 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1121 uint8_t aux_channel, ddc_pin;
1122
1123
1124
1125 int dvo_ports[][3] = {
1126 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1127 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1128 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1129 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1130 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
1131 };
1132
1133
1134
1135
1136
1137 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1138 it = dev_priv->vbt.child_dev + i;
1139
1140 for (j = 0; j < 3; j++) {
1141 if (dvo_ports[port][j] == -1)
1142 break;
1143
1144 if (it->common.dvo_port == dvo_ports[port][j]) {
1145 if (child) {
1146 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
1147 port_name(port));
1148 } else {
1149 child = it;
1150 }
1151 }
1152 }
1153 }
1154 if (!child)
1155 return;
1156
1157 aux_channel = child->common.aux_channel;
1158 ddc_pin = child->common.ddc_pin;
1159
1160 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1161 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1162 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1163 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1164 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1165
1166 if (port == PORT_A && is_dvi) {
1167 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1168 is_hdmi ? "/HDMI" : "");
1169 is_dvi = false;
1170 is_hdmi = false;
1171 }
1172
1173 info->supports_dvi = is_dvi;
1174 info->supports_hdmi = is_hdmi;
1175 info->supports_dp = is_dp;
1176 info->supports_edp = is_edp;
1177
1178 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1179 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1180
1181 if (is_edp && is_dvi)
1182 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1183 port_name(port));
1184 if (is_crt && port != PORT_E)
1185 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1186 if (is_crt && (is_dvi || is_dp))
1187 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1188 port_name(port));
1189 if (is_dvi && (port == PORT_A || port == PORT_E))
1190 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
1191 if (!is_dvi && !is_dp && !is_crt)
1192 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1193 port_name(port));
1194 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1195 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
1196
1197 if (is_dvi) {
1198 info->alternate_ddc_pin = ddc_pin;
1199
1200
1201
1202
1203
1204 if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
1205 port == PORT_D) {
1206 info->alternate_ddc_pin = 0;
1207 }
1208
1209 sanitize_ddc_pin(dev_priv, port);
1210 }
1211
1212 if (is_dp) {
1213 info->alternate_aux_channel = aux_channel;
1214
1215 sanitize_aux_ch(dev_priv, port);
1216 }
1217
1218 if (bdb->version >= 158) {
1219
1220 hdmi_level_shift = child->raw[7] & 0xF;
1221 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1222 port_name(port),
1223 hdmi_level_shift);
1224 info->hdmi_level_shift = hdmi_level_shift;
1225 }
1226
1227
1228 if (bdb->version >= 196 && child->common.iboost) {
1229 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1230 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1231 port_name(port), info->dp_boost_level);
1232 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1233 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1234 port_name(port), info->hdmi_boost_level);
1235 }
1236}
1237
1238static void parse_ddi_ports(struct drm_i915_private *dev_priv,
1239 const struct bdb_header *bdb)
1240{
1241 enum port port;
1242
1243 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1244 return;
1245
1246 if (!dev_priv->vbt.child_dev_num)
1247 return;
1248
1249 if (bdb->version < 155)
1250 return;
1251
1252 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1253 parse_ddi_port(dev_priv, port, bdb);
1254}
1255
1256static void
1257parse_device_mapping(struct drm_i915_private *dev_priv,
1258 const struct bdb_header *bdb)
1259{
1260 const struct bdb_general_definitions *p_defs;
1261 const union child_device_config *p_child;
1262 union child_device_config *child_dev_ptr;
1263 int i, child_device_num, count;
1264 u8 expected_size;
1265 u16 block_size;
1266
1267 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1268 if (!p_defs) {
1269 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1270 return;
1271 }
1272 if (bdb->version < 106) {
1273 expected_size = 22;
1274 } else if (bdb->version < 111) {
1275 expected_size = 27;
1276 } else if (bdb->version < 195) {
1277 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
1278 expected_size = sizeof(struct old_child_dev_config);
1279 } else if (bdb->version == 195) {
1280 expected_size = 37;
1281 } else if (bdb->version <= 197) {
1282 expected_size = 38;
1283 } else {
1284 expected_size = 38;
1285 BUILD_BUG_ON(sizeof(*p_child) < 38);
1286 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1287 bdb->version, expected_size);
1288 }
1289
1290
1291 if (p_defs->child_dev_size != expected_size)
1292 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1293 p_defs->child_dev_size, expected_size, bdb->version);
1294
1295
1296 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1297 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1298 p_defs->child_dev_size);
1299 return;
1300 }
1301
1302
1303 block_size = get_blocksize(p_defs);
1304
1305 child_device_num = (block_size - sizeof(*p_defs)) /
1306 p_defs->child_dev_size;
1307 count = 0;
1308
1309 for (i = 0; i < child_device_num; i++) {
1310 p_child = child_device_ptr(p_defs, i);
1311 if (!p_child->common.device_type) {
1312
1313 continue;
1314 }
1315 count++;
1316 }
1317 if (!count) {
1318 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1319 return;
1320 }
1321 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1322 if (!dev_priv->vbt.child_dev) {
1323 DRM_DEBUG_KMS("No memory space for child device\n");
1324 return;
1325 }
1326
1327 dev_priv->vbt.child_dev_num = count;
1328 count = 0;
1329 for (i = 0; i < child_device_num; i++) {
1330 p_child = child_device_ptr(p_defs, i);
1331 if (!p_child->common.device_type) {
1332
1333 continue;
1334 }
1335
1336 child_dev_ptr = dev_priv->vbt.child_dev + count;
1337 count++;
1338
1339
1340
1341
1342
1343
1344 memcpy(child_dev_ptr, p_child,
1345 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
1346
1347
1348
1349
1350
1351 if (bdb->version < 196) {
1352
1353 child_dev_ptr->common.iboost = 0;
1354 child_dev_ptr->common.hpd_invert = 0;
1355 }
1356
1357 if (bdb->version < 192)
1358 child_dev_ptr->common.lspcon = 0;
1359 }
1360 return;
1361}
1362
1363
1364static void
1365init_vbt_defaults(struct drm_i915_private *dev_priv)
1366{
1367 enum port port;
1368
1369 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1370
1371
1372 dev_priv->vbt.backlight.present = true;
1373
1374
1375 dev_priv->vbt.lvds_dither = 1;
1376 dev_priv->vbt.lvds_vbt = 0;
1377
1378
1379 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1380
1381
1382 dev_priv->vbt.int_tv_support = 1;
1383 dev_priv->vbt.int_crt_support = 1;
1384
1385
1386 dev_priv->vbt.lvds_use_ssc = 1;
1387
1388
1389
1390
1391 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1392 !HAS_PCH_SPLIT(dev_priv));
1393 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1394
1395 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1396 struct ddi_vbt_port_info *info =
1397 &dev_priv->vbt.ddi_port_info[port];
1398
1399 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1400 }
1401}
1402
1403
1404static void
1405init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1406{
1407 enum port port;
1408
1409 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1410 struct ddi_vbt_port_info *info =
1411 &dev_priv->vbt.ddi_port_info[port];
1412
1413 info->supports_dvi = (port != PORT_A && port != PORT_E);
1414 info->supports_hdmi = info->supports_dvi;
1415 info->supports_dp = (port != PORT_E);
1416 }
1417}
1418
1419static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1420{
1421 const void *_vbt = vbt;
1422
1423 return _vbt + vbt->bdb_offset;
1424}
1425
1426
1427
1428
1429
1430
1431
1432
1433bool intel_bios_is_valid_vbt(const void *buf, size_t size)
1434{
1435 const struct vbt_header *vbt = buf;
1436 const struct bdb_header *bdb;
1437
1438 if (!vbt)
1439 return false;
1440
1441 if (sizeof(struct vbt_header) > size) {
1442 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1443 return false;
1444 }
1445
1446 if (memcmp(vbt->signature, "$VBT", 4)) {
1447 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1448 return false;
1449 }
1450
1451 if (range_overflows_t(size_t,
1452 vbt->bdb_offset,
1453 sizeof(struct bdb_header),
1454 size)) {
1455 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1456 return false;
1457 }
1458
1459 bdb = get_bdb_header(vbt);
1460 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
1461 DRM_DEBUG_DRIVER("BDB incomplete\n");
1462 return false;
1463 }
1464
1465 return vbt;
1466}
1467
1468static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
1469{
1470 size_t i;
1471
1472
1473 for (i = 0; i + 4 < size; i++) {
1474 void *vbt;
1475
1476 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1477 continue;
1478
1479
1480
1481
1482
1483 vbt = (void __force *) bios + i;
1484 if (intel_bios_is_valid_vbt(vbt, size - i))
1485 return vbt;
1486
1487 break;
1488 }
1489
1490 return NULL;
1491}
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501void intel_bios_init(struct drm_i915_private *dev_priv)
1502{
1503 struct pci_dev *pdev = dev_priv->drm.pdev;
1504 const struct vbt_header *vbt = dev_priv->opregion.vbt;
1505 const struct bdb_header *bdb;
1506 u8 __iomem *bios = NULL;
1507
1508 if (HAS_PCH_NOP(dev_priv)) {
1509 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
1510 return;
1511 }
1512
1513 init_vbt_defaults(dev_priv);
1514
1515
1516 if (!vbt) {
1517 size_t size;
1518
1519 bios = pci_map_rom(pdev, &size);
1520 if (!bios)
1521 goto out;
1522
1523 vbt = find_vbt(bios, size);
1524 if (!vbt)
1525 goto out;
1526
1527 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
1528 }
1529
1530 bdb = get_bdb_header(vbt);
1531
1532 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1533 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
1534
1535
1536 parse_general_features(dev_priv, bdb);
1537 parse_general_definitions(dev_priv, bdb);
1538 parse_lfp_panel_data(dev_priv, bdb);
1539 parse_lfp_backlight(dev_priv, bdb);
1540 parse_sdvo_panel_data(dev_priv, bdb);
1541 parse_sdvo_device_mapping(dev_priv, bdb);
1542 parse_device_mapping(dev_priv, bdb);
1543 parse_driver_features(dev_priv, bdb);
1544 parse_edp(dev_priv, bdb);
1545 parse_psr(dev_priv, bdb);
1546 parse_mipi_config(dev_priv, bdb);
1547 parse_mipi_sequence(dev_priv, bdb);
1548 parse_ddi_ports(dev_priv, bdb);
1549
1550out:
1551 if (!vbt) {
1552 DRM_INFO("Failed to find VBIOS tables (VBT)\n");
1553 init_vbt_missing_defaults(dev_priv);
1554 }
1555
1556 if (bios)
1557 pci_unmap_rom(pdev, bios);
1558}
1559
1560
1561
1562
1563
1564
1565
1566
1567bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1568{
1569 union child_device_config *p_child;
1570 int i;
1571
1572 if (!dev_priv->vbt.int_tv_support)
1573 return false;
1574
1575 if (!dev_priv->vbt.child_dev_num)
1576 return true;
1577
1578 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1579 p_child = dev_priv->vbt.child_dev + i;
1580
1581
1582
1583 switch (p_child->old.device_type) {
1584 case DEVICE_TYPE_INT_TV:
1585 case DEVICE_TYPE_TV:
1586 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1587 break;
1588 default:
1589 continue;
1590 }
1591
1592
1593
1594 if (p_child->old.addin_offset)
1595 return true;
1596 }
1597
1598 return false;
1599}
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1610{
1611 int i;
1612
1613 if (!dev_priv->vbt.child_dev_num)
1614 return true;
1615
1616 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1617 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1618 struct old_child_dev_config *child = &uchild->old;
1619
1620
1621
1622
1623
1624 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1625 child->device_type != DEVICE_TYPE_LFP)
1626 continue;
1627
1628 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1629 *i2c_pin = child->i2c_pin;
1630
1631
1632
1633
1634
1635
1636 if (child->addin_offset)
1637 return true;
1638
1639
1640
1641
1642
1643
1644 if (dev_priv->opregion.vbt)
1645 return true;
1646 }
1647
1648 return false;
1649}
1650
1651
1652
1653
1654
1655
1656
1657
1658bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1659{
1660 static const struct {
1661 u16 dp, hdmi;
1662 } port_mapping[] = {
1663 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1664 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1665 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1666 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1667 };
1668 int i;
1669
1670
1671 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1672 return false;
1673
1674 if (!dev_priv->vbt.child_dev_num)
1675 return false;
1676
1677 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1678 const union child_device_config *p_child =
1679 &dev_priv->vbt.child_dev[i];
1680 if ((p_child->common.dvo_port == port_mapping[port].dp ||
1681 p_child->common.dvo_port == port_mapping[port].hdmi) &&
1682 (p_child->common.device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1683 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
1684 return true;
1685 }
1686
1687 return false;
1688}
1689
1690
1691
1692
1693
1694
1695
1696
1697bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1698{
1699 union child_device_config *p_child;
1700 static const short port_mapping[] = {
1701 [PORT_B] = DVO_PORT_DPB,
1702 [PORT_C] = DVO_PORT_DPC,
1703 [PORT_D] = DVO_PORT_DPD,
1704 [PORT_E] = DVO_PORT_DPE,
1705 };
1706 int i;
1707
1708 if (HAS_DDI(dev_priv))
1709 return dev_priv->vbt.ddi_port_info[port].supports_edp;
1710
1711 if (!dev_priv->vbt.child_dev_num)
1712 return false;
1713
1714 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1715 p_child = dev_priv->vbt.child_dev + i;
1716
1717 if (p_child->common.dvo_port == port_mapping[port] &&
1718 (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
1719 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1720 return true;
1721 }
1722
1723 return false;
1724}
1725
1726static bool child_dev_is_dp_dual_mode(const union child_device_config *p_child,
1727 enum port port)
1728{
1729 static const struct {
1730 u16 dp, hdmi;
1731 } port_mapping[] = {
1732
1733
1734
1735
1736 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1737 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1738 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1739 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1740 };
1741
1742 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1743 return false;
1744
1745 if ((p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
1746 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
1747 return false;
1748
1749 if (p_child->common.dvo_port == port_mapping[port].dp)
1750 return true;
1751
1752
1753 if (p_child->common.dvo_port == port_mapping[port].hdmi &&
1754 p_child->common.aux_channel != 0)
1755 return true;
1756
1757 return false;
1758}
1759
1760bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
1761 enum port port)
1762{
1763 int i;
1764
1765 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1766 const union child_device_config *p_child =
1767 &dev_priv->vbt.child_dev[i];
1768
1769 if (child_dev_is_dp_dual_mode(p_child, port))
1770 return true;
1771 }
1772
1773 return false;
1774}
1775
1776
1777
1778
1779
1780
1781
1782
1783bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1784 enum port *port)
1785{
1786 union child_device_config *p_child;
1787 u8 dvo_port;
1788 int i;
1789
1790 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1791 p_child = dev_priv->vbt.child_dev + i;
1792
1793 if (!(p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT))
1794 continue;
1795
1796 dvo_port = p_child->common.dvo_port;
1797
1798 switch (dvo_port) {
1799 case DVO_PORT_MIPIA:
1800 case DVO_PORT_MIPIC:
1801 if (port)
1802 *port = dvo_port - DVO_PORT_MIPIA;
1803 return true;
1804 case DVO_PORT_MIPIB:
1805 case DVO_PORT_MIPID:
1806 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1807 port_name(dvo_port - DVO_PORT_MIPIA));
1808 break;
1809 }
1810 }
1811
1812 return false;
1813}
1814
1815
1816
1817
1818
1819
1820
1821
1822bool
1823intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1824 enum port port)
1825{
1826 int i;
1827
1828 if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
1829 return false;
1830
1831 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1832 if (!dev_priv->vbt.child_dev[i].common.hpd_invert)
1833 continue;
1834
1835 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1836 case DVO_PORT_DPA:
1837 case DVO_PORT_HDMIA:
1838 if (port == PORT_A)
1839 return true;
1840 break;
1841 case DVO_PORT_DPB:
1842 case DVO_PORT_HDMIB:
1843 if (port == PORT_B)
1844 return true;
1845 break;
1846 case DVO_PORT_DPC:
1847 case DVO_PORT_HDMIC:
1848 if (port == PORT_C)
1849 return true;
1850 break;
1851 default:
1852 break;
1853 }
1854 }
1855
1856 return false;
1857}
1858
1859
1860
1861
1862
1863
1864
1865
1866bool
1867intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
1868 enum port port)
1869{
1870 int i;
1871
1872 if (!HAS_LSPCON(dev_priv))
1873 return false;
1874
1875 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1876 if (!dev_priv->vbt.child_dev[i].common.lspcon)
1877 continue;
1878
1879 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1880 case DVO_PORT_DPA:
1881 case DVO_PORT_HDMIA:
1882 if (port == PORT_A)
1883 return true;
1884 break;
1885 case DVO_PORT_DPB:
1886 case DVO_PORT_HDMIB:
1887 if (port == PORT_B)
1888 return true;
1889 break;
1890 case DVO_PORT_DPC:
1891 case DVO_PORT_HDMIC:
1892 if (port == PORT_C)
1893 return true;
1894 break;
1895 case DVO_PORT_DPD:
1896 case DVO_PORT_HDMID:
1897 if (port == PORT_D)
1898 return true;
1899 break;
1900 default:
1901 break;
1902 }
1903 }
1904
1905 return false;
1906}
1907