linux/drivers/media/pci/cx23885/altera-ci.c
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   1/*
   2 * altera-ci.c
   3 *
   4 *  CI driver in conjunction with NetUp Dual DVB-T/C RF CI card
   5 *
   6 * Copyright (C) 2010,2011 NetUP Inc.
   7 * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License as published by
  11 * the Free Software Foundation; either version 2 of the License, or
  12 * (at your option) any later version.
  13 *
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 *
  18 * GNU General Public License for more details.
  19 */
  20
  21/*
  22 * currently cx23885 GPIO's used.
  23 * GPIO-0 ~INT in
  24 * GPIO-1 TMS out
  25 * GPIO-2 ~reset chips out
  26 * GPIO-3 to GPIO-10 data/addr for CA in/out
  27 * GPIO-11 ~CS out
  28 * GPIO-12 AD_RG out
  29 * GPIO-13 ~WR out
  30 * GPIO-14 ~RD out
  31 * GPIO-15 ~RDY in
  32 * GPIO-16 TCK out
  33 * GPIO-17 TDO in
  34 * GPIO-18 TDI out
  35 */
  36/*
  37 *  Bit definitions for MC417_RWD and MC417_OEN registers
  38 * bits 31-16
  39 * +-----------+
  40 * | Reserved  |
  41 * +-----------+
  42 *   bit 15  bit 14  bit 13 bit 12  bit 11  bit 10  bit 9   bit 8
  43 * +-------+-------+-------+-------+-------+-------+-------+-------+
  44 * |  TDI  |  TDO  |  TCK  |  RDY# |  #RD  |  #WR  | AD_RG |  #CS  |
  45 * +-------+-------+-------+-------+-------+-------+-------+-------+
  46 *  bit 7   bit 6   bit 5   bit 4   bit 3   bit 2   bit 1   bit 0
  47 * +-------+-------+-------+-------+-------+-------+-------+-------+
  48 * |  DATA7|  DATA6|  DATA5|  DATA4|  DATA3|  DATA2|  DATA1|  DATA0|
  49 * +-------+-------+-------+-------+-------+-------+-------+-------+
  50 */
  51
  52#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  53
  54#include <dvb_demux.h>
  55#include <dvb_frontend.h>
  56#include "altera-ci.h"
  57#include "dvb_ca_en50221.h"
  58
  59/* FPGA regs */
  60#define NETUP_CI_INT_CTRL       0x00
  61#define NETUP_CI_BUSCTRL2       0x01
  62#define NETUP_CI_ADDR0          0x04
  63#define NETUP_CI_ADDR1          0x05
  64#define NETUP_CI_DATA           0x06
  65#define NETUP_CI_BUSCTRL        0x07
  66#define NETUP_CI_PID_ADDR0      0x08
  67#define NETUP_CI_PID_ADDR1      0x09
  68#define NETUP_CI_PID_DATA       0x0a
  69#define NETUP_CI_TSA_DIV        0x0c
  70#define NETUP_CI_TSB_DIV        0x0d
  71#define NETUP_CI_REVISION       0x0f
  72
  73/* const for ci op */
  74#define NETUP_CI_FLG_CTL        1
  75#define NETUP_CI_FLG_RD         1
  76#define NETUP_CI_FLG_AD         1
  77
  78static unsigned int ci_dbg;
  79module_param(ci_dbg, int, 0644);
  80MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
  81
  82static unsigned int pid_dbg;
  83module_param(pid_dbg, int, 0644);
  84MODULE_PARM_DESC(pid_dbg, "Enable PID filtering debugging");
  85
  86MODULE_DESCRIPTION("altera FPGA CI module");
  87MODULE_AUTHOR("Igor M. Liplianin  <liplianin@netup.ru>");
  88MODULE_LICENSE("GPL");
  89
  90#define ci_dbg_print(fmt, args...) \
  91        do { \
  92                if (ci_dbg) \
  93                        printk(KERN_DEBUG pr_fmt("%s: " fmt), \
  94                               __func__, ##args); \
  95        } while (0)
  96
  97#define pid_dbg_print(fmt, args...) \
  98        do { \
  99                if (pid_dbg) \
 100                        printk(KERN_DEBUG pr_fmt("%s: " fmt), \
 101                               __func__, ##args); \
 102        } while (0)
 103
 104struct altera_ci_state;
 105struct netup_hw_pid_filter;
 106
 107struct fpga_internal {
 108        void *dev;
 109        struct mutex fpga_mutex;/* two CI's on the same fpga */
 110        struct netup_hw_pid_filter *pid_filt[2];
 111        struct altera_ci_state *state[2];
 112        struct work_struct work;
 113        int (*fpga_rw) (void *dev, int flag, int data, int rw);
 114        int cis_used;
 115        int filts_used;
 116        int strt_wrk;
 117};
 118
 119/* stores all private variables for communication with CI */
 120struct altera_ci_state {
 121        struct fpga_internal *internal;
 122        struct dvb_ca_en50221 ca;
 123        int status;
 124        int nr;
 125};
 126
 127/* stores all private variables for hardware pid filtering */
 128struct netup_hw_pid_filter {
 129        struct fpga_internal *internal;
 130        struct dvb_demux *demux;
 131        /* save old functions */
 132        int (*start_feed)(struct dvb_demux_feed *feed);
 133        int (*stop_feed)(struct dvb_demux_feed *feed);
 134
 135        int status;
 136        int nr;
 137};
 138
 139/* internal params node */
 140struct fpga_inode {
 141        /* pointer for internal params, one for each pair of CI's */
 142        struct fpga_internal            *internal;
 143        struct fpga_inode               *next_inode;
 144};
 145
 146/* first internal params */
 147static struct fpga_inode *fpga_first_inode;
 148
 149/* find chip by dev */
 150static struct fpga_inode *find_inode(void *dev)
 151{
 152        struct fpga_inode *temp_chip = fpga_first_inode;
 153
 154        if (temp_chip == NULL)
 155                return temp_chip;
 156
 157        /*
 158         Search for the last fpga CI chip or
 159         find it by dev */
 160        while ((temp_chip != NULL) &&
 161                                (temp_chip->internal->dev != dev))
 162                temp_chip = temp_chip->next_inode;
 163
 164        return temp_chip;
 165}
 166/* check demux */
 167static struct fpga_internal *check_filter(struct fpga_internal *temp_int,
 168                                                void *demux_dev, int filt_nr)
 169{
 170        if (temp_int == NULL)
 171                return NULL;
 172
 173        if ((temp_int->pid_filt[filt_nr]) == NULL)
 174                return NULL;
 175
 176        if (temp_int->pid_filt[filt_nr]->demux == demux_dev)
 177                return temp_int;
 178
 179        return NULL;
 180}
 181
 182/* find chip by demux */
 183static struct fpga_inode *find_dinode(void *demux_dev)
 184{
 185        struct fpga_inode *temp_chip = fpga_first_inode;
 186        struct fpga_internal *temp_int;
 187
 188        /*
 189         * Search of the last fpga CI chip or
 190         * find it by demux
 191         */
 192        while (temp_chip != NULL) {
 193                if (temp_chip->internal != NULL) {
 194                        temp_int = temp_chip->internal;
 195                        if (check_filter(temp_int, demux_dev, 0))
 196                                break;
 197                        if (check_filter(temp_int, demux_dev, 1))
 198                                break;
 199                }
 200
 201                temp_chip = temp_chip->next_inode;
 202        }
 203
 204        return temp_chip;
 205}
 206
 207/* deallocating chip */
 208static void remove_inode(struct fpga_internal *internal)
 209{
 210        struct fpga_inode *prev_node = fpga_first_inode;
 211        struct fpga_inode *del_node = find_inode(internal->dev);
 212
 213        if (del_node != NULL) {
 214                if (del_node == fpga_first_inode) {
 215                        fpga_first_inode = del_node->next_inode;
 216                } else {
 217                        while (prev_node->next_inode != del_node)
 218                                prev_node = prev_node->next_inode;
 219
 220                        if (del_node->next_inode == NULL)
 221                                prev_node->next_inode = NULL;
 222                        else
 223                                prev_node->next_inode =
 224                                        prev_node->next_inode->next_inode;
 225                }
 226
 227                kfree(del_node);
 228        }
 229}
 230
 231/* allocating new chip */
 232static struct fpga_inode *append_internal(struct fpga_internal *internal)
 233{
 234        struct fpga_inode *new_node = fpga_first_inode;
 235
 236        if (new_node == NULL) {
 237                new_node = kmalloc(sizeof(struct fpga_inode), GFP_KERNEL);
 238                fpga_first_inode = new_node;
 239        } else {
 240                while (new_node->next_inode != NULL)
 241                        new_node = new_node->next_inode;
 242
 243                new_node->next_inode =
 244                                kmalloc(sizeof(struct fpga_inode), GFP_KERNEL);
 245                if (new_node->next_inode != NULL)
 246                        new_node = new_node->next_inode;
 247                else
 248                        new_node = NULL;
 249        }
 250
 251        if (new_node != NULL) {
 252                new_node->internal = internal;
 253                new_node->next_inode = NULL;
 254        }
 255
 256        return new_node;
 257}
 258
 259static int netup_fpga_op_rw(struct fpga_internal *inter, int addr,
 260                                                        u8 val, u8 read)
 261{
 262        inter->fpga_rw(inter->dev, NETUP_CI_FLG_AD, addr, 0);
 263        return inter->fpga_rw(inter->dev, 0, val, read);
 264}
 265
 266/* flag - mem/io, read - read/write */
 267static int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
 268                                u8 flag, u8 read, int addr, u8 val)
 269{
 270
 271        struct altera_ci_state *state = en50221->data;
 272        struct fpga_internal *inter = state->internal;
 273
 274        u8 store;
 275        int mem = 0;
 276
 277        if (0 != slot)
 278                return -EINVAL;
 279
 280        mutex_lock(&inter->fpga_mutex);
 281
 282        netup_fpga_op_rw(inter, NETUP_CI_ADDR0, ((addr << 1) & 0xfe), 0);
 283        netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0);
 284        store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
 285
 286        store &= 0x0f;
 287        store |= ((state->nr << 7) | (flag << 6));
 288
 289        netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0);
 290        mem = netup_fpga_op_rw(inter, NETUP_CI_DATA, val, read);
 291
 292        mutex_unlock(&inter->fpga_mutex);
 293
 294        ci_dbg_print("%s: %s: addr=[0x%02x], %s=%x\n", __func__,
 295                        (read) ? "read" : "write", addr,
 296                        (flag == NETUP_CI_FLG_CTL) ? "ctl" : "mem",
 297                        (read) ? mem : val);
 298
 299        return mem;
 300}
 301
 302static int altera_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
 303                                        int slot, int addr)
 304{
 305        return altera_ci_op_cam(en50221, slot, 0, NETUP_CI_FLG_RD, addr, 0);
 306}
 307
 308static int altera_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
 309                                         int slot, int addr, u8 data)
 310{
 311        return altera_ci_op_cam(en50221, slot, 0, 0, addr, data);
 312}
 313
 314static int altera_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221,
 315                                  int slot, u8 addr)
 316{
 317        return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL,
 318                                                NETUP_CI_FLG_RD, addr, 0);
 319}
 320
 321static int altera_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
 322                                   u8 addr, u8 data)
 323{
 324        return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL, 0, addr, data);
 325}
 326
 327static int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
 328{
 329        struct altera_ci_state *state = en50221->data;
 330        struct fpga_internal *inter = state->internal;
 331        /* reasonable timeout for CI reset is 10 seconds */
 332        unsigned long t_out = jiffies + msecs_to_jiffies(9999);
 333        int ret;
 334
 335        ci_dbg_print("%s\n", __func__);
 336
 337        if (0 != slot)
 338                return -EINVAL;
 339
 340        mutex_lock(&inter->fpga_mutex);
 341
 342        ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
 343        netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
 344                                (ret & 0xcf) | (1 << (5 - state->nr)), 0);
 345
 346        mutex_unlock(&inter->fpga_mutex);
 347
 348        for (;;) {
 349                mdelay(50);
 350
 351                mutex_lock(&inter->fpga_mutex);
 352
 353                ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
 354                                                0, NETUP_CI_FLG_RD);
 355                mutex_unlock(&inter->fpga_mutex);
 356
 357                if ((ret & (1 << (5 - state->nr))) == 0)
 358                        break;
 359                if (time_after(jiffies, t_out))
 360                        break;
 361        }
 362
 363
 364        ci_dbg_print("%s: %d msecs\n", __func__,
 365                jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out));
 366
 367        return 0;
 368}
 369
 370static int altera_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
 371{
 372        /* not implemented */
 373        return 0;
 374}
 375
 376static int altera_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
 377{
 378        struct altera_ci_state *state = en50221->data;
 379        struct fpga_internal *inter = state->internal;
 380        int ret;
 381
 382        ci_dbg_print("%s\n", __func__);
 383
 384        if (0 != slot)
 385                return -EINVAL;
 386
 387        mutex_lock(&inter->fpga_mutex);
 388
 389        ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
 390        netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
 391                                (ret & 0x0f) | (1 << (3 - state->nr)), 0);
 392
 393        mutex_unlock(&inter->fpga_mutex);
 394
 395        return 0;
 396}
 397
 398/* work handler */
 399static void netup_read_ci_status(struct work_struct *work)
 400{
 401        struct fpga_internal *inter =
 402                        container_of(work, struct fpga_internal, work);
 403        int ret;
 404
 405        ci_dbg_print("%s\n", __func__);
 406
 407        mutex_lock(&inter->fpga_mutex);
 408        /* ack' irq */
 409        ret = netup_fpga_op_rw(inter, NETUP_CI_INT_CTRL, 0, NETUP_CI_FLG_RD);
 410        ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
 411
 412        mutex_unlock(&inter->fpga_mutex);
 413
 414        if (inter->state[1] != NULL) {
 415                inter->state[1]->status =
 416                                ((ret & 1) == 0 ?
 417                                DVB_CA_EN50221_POLL_CAM_PRESENT |
 418                                DVB_CA_EN50221_POLL_CAM_READY : 0);
 419                ci_dbg_print("%s: setting CI[1] status = 0x%x\n",
 420                                __func__, inter->state[1]->status);
 421        }
 422
 423        if (inter->state[0] != NULL) {
 424                inter->state[0]->status =
 425                                ((ret & 2) == 0 ?
 426                                DVB_CA_EN50221_POLL_CAM_PRESENT |
 427                                DVB_CA_EN50221_POLL_CAM_READY : 0);
 428                ci_dbg_print("%s: setting CI[0] status = 0x%x\n",
 429                                __func__, inter->state[0]->status);
 430        }
 431}
 432
 433/* CI irq handler */
 434int altera_ci_irq(void *dev)
 435{
 436        struct fpga_inode *temp_int = NULL;
 437        struct fpga_internal *inter = NULL;
 438
 439        ci_dbg_print("%s\n", __func__);
 440
 441        if (dev != NULL) {
 442                temp_int = find_inode(dev);
 443                if (temp_int != NULL) {
 444                        inter = temp_int->internal;
 445                        schedule_work(&inter->work);
 446                }
 447        }
 448
 449        return 1;
 450}
 451EXPORT_SYMBOL(altera_ci_irq);
 452
 453static int altera_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
 454                                      int slot, int open)
 455{
 456        struct altera_ci_state *state = en50221->data;
 457
 458        if (0 != slot)
 459                return -EINVAL;
 460
 461        return state->status;
 462}
 463
 464static void altera_hw_filt_release(void *main_dev, int filt_nr)
 465{
 466        struct fpga_inode *temp_int = find_inode(main_dev);
 467        struct netup_hw_pid_filter *pid_filt = NULL;
 468
 469        ci_dbg_print("%s\n", __func__);
 470
 471        if (temp_int != NULL) {
 472                pid_filt = temp_int->internal->pid_filt[filt_nr - 1];
 473                /* stored old feed controls */
 474                pid_filt->demux->start_feed = pid_filt->start_feed;
 475                pid_filt->demux->stop_feed = pid_filt->stop_feed;
 476
 477                if (((--(temp_int->internal->filts_used)) <= 0) &&
 478                         ((temp_int->internal->cis_used) <= 0)) {
 479
 480                        ci_dbg_print("%s: Actually removing\n", __func__);
 481
 482                        remove_inode(temp_int->internal);
 483                        kfree(pid_filt->internal);
 484                }
 485
 486                kfree(pid_filt);
 487
 488        }
 489
 490}
 491
 492void altera_ci_release(void *dev, int ci_nr)
 493{
 494        struct fpga_inode *temp_int = find_inode(dev);
 495        struct altera_ci_state *state = NULL;
 496
 497        ci_dbg_print("%s\n", __func__);
 498
 499        if (temp_int != NULL) {
 500                state = temp_int->internal->state[ci_nr - 1];
 501                altera_hw_filt_release(dev, ci_nr);
 502
 503
 504                if (((temp_int->internal->filts_used) <= 0) &&
 505                                ((--(temp_int->internal->cis_used)) <= 0)) {
 506
 507                        ci_dbg_print("%s: Actually removing\n", __func__);
 508
 509                        remove_inode(temp_int->internal);
 510                        kfree(state->internal);
 511                }
 512
 513                if (state != NULL) {
 514                        if (state->ca.data != NULL)
 515                                dvb_ca_en50221_release(&state->ca);
 516
 517                        kfree(state);
 518                }
 519        }
 520
 521}
 522EXPORT_SYMBOL(altera_ci_release);
 523
 524static void altera_pid_control(struct netup_hw_pid_filter *pid_filt,
 525                u16 pid, int onoff)
 526{
 527        struct fpga_internal *inter = pid_filt->internal;
 528        u8 store = 0;
 529
 530        /* pid 0-0x1f always enabled, don't touch them */
 531        if ((pid == 0x2000) || (pid < 0x20))
 532                return;
 533
 534        mutex_lock(&inter->fpga_mutex);
 535
 536        netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR0, (pid >> 3) & 0xff, 0);
 537        netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR1,
 538                        ((pid >> 11) & 0x03) | (pid_filt->nr << 2), 0);
 539
 540        store = netup_fpga_op_rw(inter, NETUP_CI_PID_DATA, 0, NETUP_CI_FLG_RD);
 541
 542        if (onoff)/* 0 - on, 1 - off */
 543                store |= (1 << (pid & 7));
 544        else
 545                store &= ~(1 << (pid & 7));
 546
 547        netup_fpga_op_rw(inter, NETUP_CI_PID_DATA, store, 0);
 548
 549        mutex_unlock(&inter->fpga_mutex);
 550
 551        pid_dbg_print("%s: (%d) set pid: %5d 0x%04x '%s'\n", __func__,
 552                pid_filt->nr, pid, pid, onoff ? "off" : "on");
 553}
 554
 555static void altera_toggle_fullts_streaming(struct netup_hw_pid_filter *pid_filt,
 556                                        int filt_nr, int onoff)
 557{
 558        struct fpga_internal *inter = pid_filt->internal;
 559        u8 store = 0;
 560        int i;
 561
 562        pid_dbg_print("%s: pid_filt->nr[%d]  now %s\n", __func__, pid_filt->nr,
 563                        onoff ? "off" : "on");
 564
 565        if (onoff)/* 0 - on, 1 - off */
 566                store = 0xff;/* ignore pid */
 567        else
 568                store = 0;/* enable pid */
 569
 570        mutex_lock(&inter->fpga_mutex);
 571
 572        for (i = 0; i < 1024; i++) {
 573                netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR0, i & 0xff, 0);
 574
 575                netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR1,
 576                                ((i >> 8) & 0x03) | (pid_filt->nr << 2), 0);
 577                /* pid 0-0x1f always enabled */
 578                netup_fpga_op_rw(inter, NETUP_CI_PID_DATA,
 579                                (i > 3 ? store : 0), 0);
 580        }
 581
 582        mutex_unlock(&inter->fpga_mutex);
 583}
 584
 585static int altera_pid_feed_control(void *demux_dev, int filt_nr,
 586                struct dvb_demux_feed *feed, int onoff)
 587{
 588        struct fpga_inode *temp_int = find_dinode(demux_dev);
 589        struct fpga_internal *inter = temp_int->internal;
 590        struct netup_hw_pid_filter *pid_filt = inter->pid_filt[filt_nr - 1];
 591
 592        altera_pid_control(pid_filt, feed->pid, onoff ? 0 : 1);
 593        /* call old feed proc's */
 594        if (onoff)
 595                pid_filt->start_feed(feed);
 596        else
 597                pid_filt->stop_feed(feed);
 598
 599        if (feed->pid == 0x2000)
 600                altera_toggle_fullts_streaming(pid_filt, filt_nr,
 601                                                onoff ? 0 : 1);
 602
 603        return 0;
 604}
 605
 606static int altera_ci_start_feed(struct dvb_demux_feed *feed, int num)
 607{
 608        altera_pid_feed_control(feed->demux, num, feed, 1);
 609
 610        return 0;
 611}
 612
 613static int altera_ci_stop_feed(struct dvb_demux_feed *feed, int num)
 614{
 615        altera_pid_feed_control(feed->demux, num, feed, 0);
 616
 617        return 0;
 618}
 619
 620static int altera_ci_start_feed_1(struct dvb_demux_feed *feed)
 621{
 622        return altera_ci_start_feed(feed, 1);
 623}
 624
 625static int altera_ci_stop_feed_1(struct dvb_demux_feed *feed)
 626{
 627        return altera_ci_stop_feed(feed, 1);
 628}
 629
 630static int altera_ci_start_feed_2(struct dvb_demux_feed *feed)
 631{
 632        return altera_ci_start_feed(feed, 2);
 633}
 634
 635static int altera_ci_stop_feed_2(struct dvb_demux_feed *feed)
 636{
 637        return altera_ci_stop_feed(feed, 2);
 638}
 639
 640static int altera_hw_filt_init(struct altera_ci_config *config, int hw_filt_nr)
 641{
 642        struct netup_hw_pid_filter *pid_filt = NULL;
 643        struct fpga_inode *temp_int = find_inode(config->dev);
 644        struct fpga_internal *inter = NULL;
 645        int ret = 0;
 646
 647        pid_filt = kzalloc(sizeof(struct netup_hw_pid_filter), GFP_KERNEL);
 648
 649        ci_dbg_print("%s\n", __func__);
 650
 651        if (!pid_filt) {
 652                ret = -ENOMEM;
 653                goto err;
 654        }
 655
 656        if (temp_int != NULL) {
 657                inter = temp_int->internal;
 658                (inter->filts_used)++;
 659                ci_dbg_print("%s: Find Internal Structure!\n", __func__);
 660        } else {
 661                inter = kzalloc(sizeof(struct fpga_internal), GFP_KERNEL);
 662                if (!inter) {
 663                        ret = -ENOMEM;
 664                        goto err;
 665                }
 666
 667                temp_int = append_internal(inter);
 668                inter->filts_used = 1;
 669                inter->dev = config->dev;
 670                inter->fpga_rw = config->fpga_rw;
 671                mutex_init(&inter->fpga_mutex);
 672                inter->strt_wrk = 1;
 673                ci_dbg_print("%s: Create New Internal Structure!\n", __func__);
 674        }
 675
 676        ci_dbg_print("%s: setting hw pid filter = %p for ci = %d\n", __func__,
 677                                                pid_filt, hw_filt_nr - 1);
 678        inter->pid_filt[hw_filt_nr - 1] = pid_filt;
 679        pid_filt->demux = config->demux;
 680        pid_filt->internal = inter;
 681        pid_filt->nr = hw_filt_nr - 1;
 682        /* store old feed controls */
 683        pid_filt->start_feed = config->demux->start_feed;
 684        pid_filt->stop_feed = config->demux->stop_feed;
 685        /* replace with new feed controls */
 686        if (hw_filt_nr == 1) {
 687                pid_filt->demux->start_feed = altera_ci_start_feed_1;
 688                pid_filt->demux->stop_feed = altera_ci_stop_feed_1;
 689        } else if (hw_filt_nr == 2) {
 690                pid_filt->demux->start_feed = altera_ci_start_feed_2;
 691                pid_filt->demux->stop_feed = altera_ci_stop_feed_2;
 692        }
 693
 694        altera_toggle_fullts_streaming(pid_filt, 0, 1);
 695
 696        return 0;
 697err:
 698        ci_dbg_print("%s: Can't init hardware filter: Error %d\n",
 699                     __func__, ret);
 700
 701        kfree(pid_filt);
 702
 703        return ret;
 704}
 705
 706int altera_ci_init(struct altera_ci_config *config, int ci_nr)
 707{
 708        struct altera_ci_state *state;
 709        struct fpga_inode *temp_int = find_inode(config->dev);
 710        struct fpga_internal *inter = NULL;
 711        int ret = 0;
 712        u8 store = 0;
 713
 714        state = kzalloc(sizeof(struct altera_ci_state), GFP_KERNEL);
 715
 716        ci_dbg_print("%s\n", __func__);
 717
 718        if (!state) {
 719                ret = -ENOMEM;
 720                goto err;
 721        }
 722
 723        if (temp_int != NULL) {
 724                inter = temp_int->internal;
 725                (inter->cis_used)++;
 726                inter->fpga_rw = config->fpga_rw;
 727                ci_dbg_print("%s: Find Internal Structure!\n", __func__);
 728        } else {
 729                inter = kzalloc(sizeof(struct fpga_internal), GFP_KERNEL);
 730                if (!inter) {
 731                        ret = -ENOMEM;
 732                        goto err;
 733                }
 734
 735                temp_int = append_internal(inter);
 736                inter->cis_used = 1;
 737                inter->dev = config->dev;
 738                inter->fpga_rw = config->fpga_rw;
 739                mutex_init(&inter->fpga_mutex);
 740                inter->strt_wrk = 1;
 741                ci_dbg_print("%s: Create New Internal Structure!\n", __func__);
 742        }
 743
 744        ci_dbg_print("%s: setting state = %p for ci = %d\n", __func__,
 745                                                state, ci_nr - 1);
 746        state->internal = inter;
 747        state->nr = ci_nr - 1;
 748
 749        state->ca.owner = THIS_MODULE;
 750        state->ca.read_attribute_mem = altera_ci_read_attribute_mem;
 751        state->ca.write_attribute_mem = altera_ci_write_attribute_mem;
 752        state->ca.read_cam_control = altera_ci_read_cam_ctl;
 753        state->ca.write_cam_control = altera_ci_write_cam_ctl;
 754        state->ca.slot_reset = altera_ci_slot_reset;
 755        state->ca.slot_shutdown = altera_ci_slot_shutdown;
 756        state->ca.slot_ts_enable = altera_ci_slot_ts_ctl;
 757        state->ca.poll_slot_status = altera_poll_ci_slot_status;
 758        state->ca.data = state;
 759
 760        ret = dvb_ca_en50221_init(config->adapter,
 761                                   &state->ca,
 762                                   /* flags */ 0,
 763                                   /* n_slots */ 1);
 764        if (0 != ret)
 765                goto err;
 766
 767        inter->state[ci_nr - 1] = state;
 768
 769        altera_hw_filt_init(config, ci_nr);
 770
 771        if (inter->strt_wrk) {
 772                INIT_WORK(&inter->work, netup_read_ci_status);
 773                inter->strt_wrk = 0;
 774        }
 775
 776        ci_dbg_print("%s: CI initialized!\n", __func__);
 777
 778        mutex_lock(&inter->fpga_mutex);
 779
 780        /* Enable div */
 781        netup_fpga_op_rw(inter, NETUP_CI_TSA_DIV, 0x0, 0);
 782        netup_fpga_op_rw(inter, NETUP_CI_TSB_DIV, 0x0, 0);
 783
 784        /* enable TS out */
 785        store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, 0, NETUP_CI_FLG_RD);
 786        store |= (3 << 4);
 787        netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
 788
 789        ret = netup_fpga_op_rw(inter, NETUP_CI_REVISION, 0, NETUP_CI_FLG_RD);
 790        /* enable irq */
 791        netup_fpga_op_rw(inter, NETUP_CI_INT_CTRL, 0x44, 0);
 792
 793        mutex_unlock(&inter->fpga_mutex);
 794
 795        ci_dbg_print("%s: NetUP CI Revision = 0x%x\n", __func__, ret);
 796
 797        schedule_work(&inter->work);
 798
 799        return 0;
 800err:
 801        ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
 802
 803        kfree(state);
 804
 805        return ret;
 806}
 807EXPORT_SYMBOL(altera_ci_init);
 808
 809int altera_ci_tuner_reset(void *dev, int ci_nr)
 810{
 811        struct fpga_inode *temp_int = find_inode(dev);
 812        struct fpga_internal *inter = NULL;
 813        u8 store;
 814
 815        ci_dbg_print("%s\n", __func__);
 816
 817        if (temp_int == NULL)
 818                return -1;
 819
 820        if (temp_int->internal == NULL)
 821                return -1;
 822
 823        inter = temp_int->internal;
 824
 825        mutex_lock(&inter->fpga_mutex);
 826
 827        store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, 0, NETUP_CI_FLG_RD);
 828        store &= ~(4 << (2 - ci_nr));
 829        netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
 830        msleep(100);
 831        store |= (4 << (2 - ci_nr));
 832        netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
 833
 834        mutex_unlock(&inter->fpga_mutex);
 835
 836        return 0;
 837}
 838EXPORT_SYMBOL(altera_ci_tuner_reset);
 839