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12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/errno.h>
16#include <linux/bug.h>
17#include <linux/interrupt.h>
18#include <linux/device.h>
19#include <linux/pm_runtime.h>
20#include <linux/list.h>
21#include <linux/slab.h>
22
23#include <linux/videodev2.h>
24#include <media/v4l2-device.h>
25#include <media/v4l2-ioctl.h>
26#include <media/v4l2-mem2mem.h>
27#include <media/videobuf2-v4l2.h>
28#include <media/videobuf2-dma-contig.h>
29
30#include "common.h"
31#include "fimc-core.h"
32#include "fimc-reg.h"
33#include "media-dev.h"
34
35static int fimc_capture_hw_init(struct fimc_dev *fimc)
36{
37 struct fimc_source_info *si = &fimc->vid_cap.source_config;
38 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
39 int ret;
40 unsigned long flags;
41
42 if (ctx == NULL || ctx->s_frame.fmt == NULL)
43 return -EINVAL;
44
45 if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
46 ret = fimc_hw_camblk_cfg_writeback(fimc);
47 if (ret < 0)
48 return ret;
49 }
50
51 spin_lock_irqsave(&fimc->slock, flags);
52 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
53 fimc_set_yuv_order(ctx);
54
55 fimc_hw_set_camera_polarity(fimc, si);
56 fimc_hw_set_camera_type(fimc, si);
57 fimc_hw_set_camera_source(fimc, si);
58 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
59
60 ret = fimc_set_scaler_info(ctx);
61 if (!ret) {
62 fimc_hw_set_input_path(ctx);
63 fimc_hw_set_prescaler(ctx);
64 fimc_hw_set_mainscaler(ctx);
65 fimc_hw_set_target_format(ctx);
66 fimc_hw_set_rotation(ctx);
67 fimc_hw_set_effect(ctx);
68 fimc_hw_set_output_path(ctx);
69 fimc_hw_set_out_dma(ctx);
70 if (fimc->drv_data->alpha_color)
71 fimc_hw_set_rgb_alpha(ctx);
72 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
73 }
74 spin_unlock_irqrestore(&fimc->slock, flags);
75 return ret;
76}
77
78
79
80
81
82
83
84
85
86static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
87{
88 struct fimc_vid_cap *cap = &fimc->vid_cap;
89 struct fimc_vid_buffer *buf;
90 unsigned long flags;
91 bool streaming;
92
93 spin_lock_irqsave(&fimc->slock, flags);
94 streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
95
96 fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
97 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
98 if (suspend)
99 fimc->state |= (1 << ST_CAPT_SUSPENDED);
100 else
101 fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
102
103
104 while (!suspend && !list_empty(&cap->pending_buf_q)) {
105 buf = fimc_pending_queue_pop(cap);
106 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
107 }
108
109 while (!list_empty(&cap->active_buf_q)) {
110 buf = fimc_active_queue_pop(cap);
111 if (suspend)
112 fimc_pending_queue_add(cap, buf);
113 else
114 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
115 }
116
117 fimc_hw_reset(fimc);
118 cap->buf_index = 0;
119
120 spin_unlock_irqrestore(&fimc->slock, flags);
121
122 if (streaming)
123 return fimc_pipeline_call(&cap->ve, set_stream, 0);
124 else
125 return 0;
126}
127
128static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
129{
130 unsigned long flags;
131
132 if (!fimc_capture_active(fimc))
133 return 0;
134
135 spin_lock_irqsave(&fimc->slock, flags);
136 set_bit(ST_CAPT_SHUT, &fimc->state);
137 fimc_deactivate_capture(fimc);
138 spin_unlock_irqrestore(&fimc->slock, flags);
139
140 wait_event_timeout(fimc->irq_queue,
141 !test_bit(ST_CAPT_SHUT, &fimc->state),
142 (2*HZ/10));
143
144 return fimc_capture_state_cleanup(fimc, suspend);
145}
146
147
148
149
150
151
152
153
154static int fimc_capture_config_update(struct fimc_ctx *ctx)
155{
156 struct fimc_dev *fimc = ctx->fimc_dev;
157 int ret;
158
159 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
160
161 ret = fimc_set_scaler_info(ctx);
162 if (ret)
163 return ret;
164
165 fimc_hw_set_prescaler(ctx);
166 fimc_hw_set_mainscaler(ctx);
167 fimc_hw_set_target_format(ctx);
168 fimc_hw_set_rotation(ctx);
169 fimc_hw_set_effect(ctx);
170 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
171 fimc_hw_set_out_dma(ctx);
172 if (fimc->drv_data->alpha_color)
173 fimc_hw_set_rgb_alpha(ctx);
174
175 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
176 return ret;
177}
178
179void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
180{
181 struct fimc_vid_cap *cap = &fimc->vid_cap;
182 struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
183 struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
184 struct fimc_frame *f = &cap->ctx->d_frame;
185 struct fimc_vid_buffer *v_buf;
186
187 if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
188 wake_up(&fimc->irq_queue);
189 goto done;
190 }
191
192 if (!list_empty(&cap->active_buf_q) &&
193 test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
194 v_buf = fimc_active_queue_pop(cap);
195
196 v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
197 v_buf->vb.sequence = cap->frame_count++;
198
199 vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
200 }
201
202 if (!list_empty(&cap->pending_buf_q)) {
203
204 v_buf = fimc_pending_queue_pop(cap);
205 fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
206 v_buf->index = cap->buf_index;
207
208
209 fimc_active_queue_add(cap, v_buf);
210
211 dbg("next frame: %d, done frame: %d",
212 fimc_hw_get_frame_index(fimc), v_buf->index);
213
214 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
215 cap->buf_index = 0;
216 }
217
218
219
220
221 if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
222 unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
223 unsigned int size = f->payload[plane];
224 s32 index = fimc_hw_get_frame_index(fimc);
225 void *vaddr;
226
227 list_for_each_entry(v_buf, &cap->active_buf_q, list) {
228 if (v_buf->index != index)
229 continue;
230 vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
231 v4l2_subdev_call(csis, video, s_rx_buffer,
232 vaddr, &size);
233 break;
234 }
235 }
236
237 if (cap->active_buf_cnt == 0) {
238 if (deq_buf)
239 clear_bit(ST_CAPT_RUN, &fimc->state);
240
241 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
242 cap->buf_index = 0;
243 } else {
244 set_bit(ST_CAPT_RUN, &fimc->state);
245 }
246
247 if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
248 fimc_capture_config_update(cap->ctx);
249done:
250 if (cap->active_buf_cnt == 1) {
251 fimc_deactivate_capture(fimc);
252 clear_bit(ST_CAPT_STREAM, &fimc->state);
253 }
254
255 dbg("frame: %d, active_buf_cnt: %d",
256 fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
257}
258
259
260static int start_streaming(struct vb2_queue *q, unsigned int count)
261{
262 struct fimc_ctx *ctx = q->drv_priv;
263 struct fimc_dev *fimc = ctx->fimc_dev;
264 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
265 int min_bufs;
266 int ret;
267
268 vid_cap->frame_count = 0;
269
270 ret = fimc_capture_hw_init(fimc);
271 if (ret) {
272 fimc_capture_state_cleanup(fimc, false);
273 return ret;
274 }
275
276 set_bit(ST_CAPT_PEND, &fimc->state);
277
278 min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
279
280 if (vid_cap->active_buf_cnt >= min_bufs &&
281 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
282 fimc_activate_capture(ctx);
283
284 if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
285 return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
286 }
287
288 return 0;
289}
290
291static void stop_streaming(struct vb2_queue *q)
292{
293 struct fimc_ctx *ctx = q->drv_priv;
294 struct fimc_dev *fimc = ctx->fimc_dev;
295
296 if (!fimc_capture_active(fimc))
297 return;
298
299 fimc_stop_capture(fimc, false);
300}
301
302int fimc_capture_suspend(struct fimc_dev *fimc)
303{
304 bool suspend = fimc_capture_busy(fimc);
305
306 int ret = fimc_stop_capture(fimc, suspend);
307 if (ret)
308 return ret;
309 return fimc_pipeline_call(&fimc->vid_cap.ve, close);
310}
311
312static void buffer_queue(struct vb2_buffer *vb);
313
314int fimc_capture_resume(struct fimc_dev *fimc)
315{
316 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
317 struct exynos_video_entity *ve = &vid_cap->ve;
318 struct fimc_vid_buffer *buf;
319 int i;
320
321 if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
322 return 0;
323
324 INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
325 vid_cap->buf_index = 0;
326 fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
327 fimc_capture_hw_init(fimc);
328
329 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
330
331 for (i = 0; i < vid_cap->reqbufs_count; i++) {
332 if (list_empty(&vid_cap->pending_buf_q))
333 break;
334 buf = fimc_pending_queue_pop(vid_cap);
335 buffer_queue(&buf->vb.vb2_buf);
336 }
337 return 0;
338
339}
340
341static int queue_setup(struct vb2_queue *vq,
342 unsigned int *num_buffers, unsigned int *num_planes,
343 unsigned int sizes[], struct device *alloc_devs[])
344{
345 struct fimc_ctx *ctx = vq->drv_priv;
346 struct fimc_frame *frame = &ctx->d_frame;
347 struct fimc_fmt *fmt = frame->fmt;
348 unsigned long wh = frame->f_width * frame->f_height;
349 int i;
350
351 if (fmt == NULL)
352 return -EINVAL;
353
354 if (*num_planes) {
355 if (*num_planes != fmt->memplanes)
356 return -EINVAL;
357 for (i = 0; i < *num_planes; i++)
358 if (sizes[i] < (wh * fmt->depth[i]) / 8)
359 return -EINVAL;
360 return 0;
361 }
362
363 *num_planes = fmt->memplanes;
364
365 for (i = 0; i < fmt->memplanes; i++) {
366 unsigned int size = (wh * fmt->depth[i]) / 8;
367
368 if (fimc_fmt_is_user_defined(fmt->color))
369 sizes[i] = frame->payload[i];
370 else
371 sizes[i] = max_t(u32, size, frame->payload[i]);
372 }
373
374 return 0;
375}
376
377static int buffer_prepare(struct vb2_buffer *vb)
378{
379 struct vb2_queue *vq = vb->vb2_queue;
380 struct fimc_ctx *ctx = vq->drv_priv;
381 int i;
382
383 if (ctx->d_frame.fmt == NULL)
384 return -EINVAL;
385
386 for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
387 unsigned long size = ctx->d_frame.payload[i];
388
389 if (vb2_plane_size(vb, i) < size) {
390 v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
391 "User buffer too small (%ld < %ld)\n",
392 vb2_plane_size(vb, i), size);
393 return -EINVAL;
394 }
395 vb2_set_plane_payload(vb, i, size);
396 }
397
398 return 0;
399}
400
401static void buffer_queue(struct vb2_buffer *vb)
402{
403 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
404 struct fimc_vid_buffer *buf
405 = container_of(vbuf, struct fimc_vid_buffer, vb);
406 struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
407 struct fimc_dev *fimc = ctx->fimc_dev;
408 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
409 struct exynos_video_entity *ve = &vid_cap->ve;
410 unsigned long flags;
411 int min_bufs;
412
413 spin_lock_irqsave(&fimc->slock, flags);
414 fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
415
416 if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
417 !test_bit(ST_CAPT_STREAM, &fimc->state) &&
418 vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
419
420 int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
421 vid_cap->buf_index;
422
423 fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
424 buf->index = vid_cap->buf_index;
425 fimc_active_queue_add(vid_cap, buf);
426
427 if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
428 vid_cap->buf_index = 0;
429 } else {
430 fimc_pending_queue_add(vid_cap, buf);
431 }
432
433 min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
434
435
436 if (vb2_is_streaming(&vid_cap->vbq) &&
437 vid_cap->active_buf_cnt >= min_bufs &&
438 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
439 int ret;
440
441 fimc_activate_capture(ctx);
442 spin_unlock_irqrestore(&fimc->slock, flags);
443
444 if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
445 return;
446
447 ret = fimc_pipeline_call(ve, set_stream, 1);
448 if (ret < 0)
449 v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
450 return;
451 }
452 spin_unlock_irqrestore(&fimc->slock, flags);
453}
454
455static const struct vb2_ops fimc_capture_qops = {
456 .queue_setup = queue_setup,
457 .buf_prepare = buffer_prepare,
458 .buf_queue = buffer_queue,
459 .wait_prepare = vb2_ops_wait_prepare,
460 .wait_finish = vb2_ops_wait_finish,
461 .start_streaming = start_streaming,
462 .stop_streaming = stop_streaming,
463};
464
465static int fimc_capture_set_default_format(struct fimc_dev *fimc);
466
467static int fimc_capture_open(struct file *file)
468{
469 struct fimc_dev *fimc = video_drvdata(file);
470 struct fimc_vid_cap *vc = &fimc->vid_cap;
471 struct exynos_video_entity *ve = &vc->ve;
472 int ret = -EBUSY;
473
474 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
475
476 mutex_lock(&fimc->lock);
477
478 if (fimc_m2m_active(fimc))
479 goto unlock;
480
481 set_bit(ST_CAPT_BUSY, &fimc->state);
482 ret = pm_runtime_get_sync(&fimc->pdev->dev);
483 if (ret < 0)
484 goto unlock;
485
486 ret = v4l2_fh_open(file);
487 if (ret) {
488 pm_runtime_put_sync(&fimc->pdev->dev);
489 goto unlock;
490 }
491
492 if (v4l2_fh_is_singular_file(file)) {
493 fimc_md_graph_lock(ve);
494
495 ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
496
497 if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
498
499
500
501
502 fimc_ctrls_delete(vc->ctx);
503
504 ret = fimc_ctrls_create(vc->ctx);
505 if (ret == 0)
506 vc->inh_sensor_ctrls = false;
507 }
508 if (ret == 0)
509 ve->vdev.entity.use_count++;
510
511 fimc_md_graph_unlock(ve);
512
513 if (ret == 0)
514 ret = fimc_capture_set_default_format(fimc);
515
516 if (ret < 0) {
517 clear_bit(ST_CAPT_BUSY, &fimc->state);
518 pm_runtime_put_sync(&fimc->pdev->dev);
519 v4l2_fh_release(file);
520 }
521 }
522unlock:
523 mutex_unlock(&fimc->lock);
524 return ret;
525}
526
527static int fimc_capture_release(struct file *file)
528{
529 struct fimc_dev *fimc = video_drvdata(file);
530 struct fimc_vid_cap *vc = &fimc->vid_cap;
531 bool close = v4l2_fh_is_singular_file(file);
532 int ret;
533
534 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
535
536 mutex_lock(&fimc->lock);
537
538 if (close && vc->streaming) {
539 media_pipeline_stop(&vc->ve.vdev.entity);
540 vc->streaming = false;
541 }
542
543 ret = _vb2_fop_release(file, NULL);
544
545 if (close) {
546 clear_bit(ST_CAPT_BUSY, &fimc->state);
547 fimc_pipeline_call(&vc->ve, close);
548 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
549
550 fimc_md_graph_lock(&vc->ve);
551 vc->ve.vdev.entity.use_count--;
552 fimc_md_graph_unlock(&vc->ve);
553 }
554
555 pm_runtime_put_sync(&fimc->pdev->dev);
556 mutex_unlock(&fimc->lock);
557
558 return ret;
559}
560
561static const struct v4l2_file_operations fimc_capture_fops = {
562 .owner = THIS_MODULE,
563 .open = fimc_capture_open,
564 .release = fimc_capture_release,
565 .poll = vb2_fop_poll,
566 .unlocked_ioctl = video_ioctl2,
567 .mmap = vb2_fop_mmap,
568};
569
570
571
572
573
574static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
575 u32 *width, u32 *height,
576 u32 *code, u32 *fourcc, int pad)
577{
578 bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
579 struct fimc_dev *fimc = ctx->fimc_dev;
580 const struct fimc_variant *var = fimc->variant;
581 const struct fimc_pix_limit *pl = var->pix_limit;
582 struct fimc_frame *dst = &ctx->d_frame;
583 u32 depth, min_w, max_w, min_h, align_h = 3;
584 u32 mask = FMT_FLAGS_CAM;
585 struct fimc_fmt *ffmt;
586
587
588 if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
589 fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
590 *code = ctx->s_frame.fmt->mbus_code;
591
592 if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
593 mask |= FMT_FLAGS_M2M;
594
595 if (pad == FIMC_SD_PAD_SINK_FIFO)
596 mask = FMT_FLAGS_WRITEBACK;
597
598 ffmt = fimc_find_format(fourcc, code, mask, 0);
599 if (WARN_ON(!ffmt))
600 return NULL;
601
602 if (code)
603 *code = ffmt->mbus_code;
604 if (fourcc)
605 *fourcc = ffmt->fourcc;
606
607 if (pad != FIMC_SD_PAD_SOURCE) {
608 max_w = fimc_fmt_is_user_defined(ffmt->color) ?
609 pl->scaler_dis_w : pl->scaler_en_w;
610
611 v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
612 height, max_t(u32, *height, 32),
613 FIMC_CAMIF_MAX_HEIGHT,
614 fimc_fmt_is_user_defined(ffmt->color) ?
615 3 : 1,
616 0);
617 return ffmt;
618 }
619
620 if (fimc_fmt_is_user_defined(ffmt->color)) {
621 *width = ctx->s_frame.f_width;
622 *height = ctx->s_frame.f_height;
623 return ffmt;
624 }
625
626 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
627 if (ctx->state & FIMC_COMPOSE) {
628 min_w = dst->offs_h + dst->width;
629 min_h = dst->offs_v + dst->height;
630 } else {
631 min_w = var->min_out_pixsize;
632 min_h = var->min_out_pixsize;
633 }
634 if (var->min_vsize_align == 1 && !rotation)
635 align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
636
637 depth = fimc_get_format_depth(ffmt);
638 v4l_bound_align_image(width, min_w, max_w,
639 ffs(var->min_out_pixsize) - 1,
640 height, min_h, FIMC_CAMIF_MAX_HEIGHT,
641 align_h,
642 64/(ALIGN(depth, 8)));
643
644 dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
645 pad, code ? *code : 0, *width, *height,
646 dst->f_width, dst->f_height);
647
648 return ffmt;
649}
650
651static void fimc_capture_try_selection(struct fimc_ctx *ctx,
652 struct v4l2_rect *r,
653 int target)
654{
655 bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
656 struct fimc_dev *fimc = ctx->fimc_dev;
657 const struct fimc_variant *var = fimc->variant;
658 const struct fimc_pix_limit *pl = var->pix_limit;
659 struct fimc_frame *sink = &ctx->s_frame;
660 u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
661 u32 align_sz = 0, align_h = 4;
662 u32 max_sc_h, max_sc_v;
663
664
665 if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
666 r->width = sink->f_width;
667 r->height = sink->f_height;
668 r->left = r->top = 0;
669 return;
670 }
671 if (target == V4L2_SEL_TGT_COMPOSE) {
672 if (ctx->rotation != 90 && ctx->rotation != 270)
673 align_h = 1;
674 max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
675 max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
676 min_sz = var->min_out_pixsize;
677 } else {
678 u32 depth = fimc_get_format_depth(sink->fmt);
679 align_sz = 64/ALIGN(depth, 8);
680 min_sz = var->min_inp_pixsize;
681 min_w = min_h = min_sz;
682 max_sc_h = max_sc_v = 1;
683 }
684
685
686
687
688
689
690
691
692
693 max_w = min_t(u32,
694 rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
695 rotate ? sink->f_height : sink->f_width);
696 max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
697
698 if (target == V4L2_SEL_TGT_COMPOSE) {
699 min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
700 min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
701 if (rotate) {
702 swap(max_sc_h, max_sc_v);
703 swap(min_w, min_h);
704 }
705 }
706 v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
707 &r->height, min_h, max_h, align_h,
708 align_sz);
709
710 r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
711 r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
712 r->left = round_down(r->left, var->hor_offs_align);
713
714 dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
715 target, r->left, r->top, r->width, r->height,
716 sink->f_width, sink->f_height);
717}
718
719
720
721
722static int fimc_cap_querycap(struct file *file, void *priv,
723 struct v4l2_capability *cap)
724{
725 struct fimc_dev *fimc = video_drvdata(file);
726
727 __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
728 V4L2_CAP_VIDEO_CAPTURE_MPLANE);
729 return 0;
730}
731
732static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
733 struct v4l2_fmtdesc *f)
734{
735 struct fimc_fmt *fmt;
736
737 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
738 f->index);
739 if (!fmt)
740 return -EINVAL;
741 strncpy(f->description, fmt->name, sizeof(f->description) - 1);
742 f->pixelformat = fmt->fourcc;
743 if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8)
744 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
745 return 0;
746}
747
748static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
749{
750 struct media_pad *pad = &me->pads[0];
751
752 while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
753 pad = media_entity_remote_pad(pad);
754 if (!pad)
755 break;
756 me = pad->entity;
757 pad = &me->pads[0];
758 }
759
760 return me;
761}
762
763
764
765
766
767
768
769
770
771static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
772 struct v4l2_mbus_framefmt *tfmt,
773 struct fimc_fmt **fmt_id,
774 bool set)
775{
776 struct fimc_dev *fimc = ctx->fimc_dev;
777 struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
778 struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
779 struct v4l2_subdev_format sfmt;
780 struct v4l2_mbus_framefmt *mf = &sfmt.format;
781 struct media_entity *me;
782 struct fimc_fmt *ffmt;
783 struct media_pad *pad;
784 int ret, i = 1;
785 u32 fcc;
786
787 if (WARN_ON(!sd || !tfmt))
788 return -EINVAL;
789
790 memset(&sfmt, 0, sizeof(sfmt));
791 sfmt.format = *tfmt;
792 sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
793
794 me = fimc_pipeline_get_head(&sd->entity);
795
796 while (1) {
797 ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
798 FMT_FLAGS_CAM, i++);
799 if (ffmt == NULL) {
800
801
802
803
804 return -EINVAL;
805 }
806 mf->code = tfmt->code = ffmt->mbus_code;
807
808
809 while (me != &fimc->vid_cap.subdev.entity) {
810 sd = media_entity_to_v4l2_subdev(me);
811
812 sfmt.pad = 0;
813 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
814 if (ret)
815 return ret;
816
817 if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
818 sfmt.pad = me->num_pads - 1;
819 mf->code = tfmt->code;
820 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
821 &sfmt);
822 if (ret)
823 return ret;
824 }
825
826 pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
827 if (!pad)
828 return -EINVAL;
829 me = pad->entity;
830 }
831
832 if (mf->code != tfmt->code)
833 continue;
834
835 fcc = ffmt->fourcc;
836 tfmt->width = mf->width;
837 tfmt->height = mf->height;
838 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
839 NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
840 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
841 NULL, &fcc, FIMC_SD_PAD_SOURCE);
842 if (ffmt && ffmt->mbus_code)
843 mf->code = ffmt->mbus_code;
844 if (mf->width != tfmt->width || mf->height != tfmt->height)
845 continue;
846 tfmt->code = mf->code;
847 break;
848 }
849
850 if (fmt_id && ffmt)
851 *fmt_id = ffmt;
852 *tfmt = *mf;
853
854 return 0;
855}
856
857
858
859
860
861
862
863
864
865static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
866 struct v4l2_plane_pix_format *plane_fmt,
867 unsigned int num_planes, bool try)
868{
869 struct v4l2_mbus_frame_desc fd;
870 int i, ret;
871 int pad;
872
873 for (i = 0; i < num_planes; i++)
874 fd.entry[i].length = plane_fmt[i].sizeimage;
875
876 pad = sensor->entity.num_pads - 1;
877 if (try)
878 ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
879 else
880 ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
881
882 if (ret < 0)
883 return ret;
884
885 if (num_planes != fd.num_entries)
886 return -EINVAL;
887
888 for (i = 0; i < num_planes; i++)
889 plane_fmt[i].sizeimage = fd.entry[i].length;
890
891 if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
892 v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
893 fd.entry[0].length);
894
895 return -EINVAL;
896 }
897
898 return 0;
899}
900
901static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
902 struct v4l2_format *f)
903{
904 struct fimc_dev *fimc = video_drvdata(file);
905
906 __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
907 return 0;
908}
909
910
911
912
913
914
915static int __video_try_or_set_format(struct fimc_dev *fimc,
916 struct v4l2_format *f, bool try,
917 struct fimc_fmt **inp_fmt,
918 struct fimc_fmt **out_fmt)
919{
920 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
921 struct fimc_vid_cap *vc = &fimc->vid_cap;
922 struct exynos_video_entity *ve = &vc->ve;
923 struct fimc_ctx *ctx = vc->ctx;
924 unsigned int width = 0, height = 0;
925 int ret = 0;
926
927
928 if (fimc_jpeg_fourcc(pix->pixelformat)) {
929 fimc_capture_try_format(ctx, &pix->width, &pix->height,
930 NULL, &pix->pixelformat,
931 FIMC_SD_PAD_SINK_CAM);
932 if (try) {
933 width = pix->width;
934 height = pix->height;
935 } else {
936 ctx->s_frame.f_width = pix->width;
937 ctx->s_frame.f_height = pix->height;
938 }
939 }
940
941
942 *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
943 NULL, &pix->pixelformat,
944 FIMC_SD_PAD_SOURCE);
945 if (*out_fmt == NULL)
946 return -EINVAL;
947
948
949 if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
950 pix->width = width;
951 pix->height = height;
952 }
953
954
955 if (!vc->user_subdev_api) {
956 struct v4l2_mbus_framefmt mbus_fmt;
957 struct v4l2_mbus_framefmt *mf;
958
959 mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
960
961 mf->code = (*out_fmt)->mbus_code;
962 mf->width = pix->width;
963 mf->height = pix->height;
964
965 fimc_md_graph_lock(ve);
966 ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
967 fimc_md_graph_unlock(ve);
968
969 if (ret < 0)
970 return ret;
971
972 pix->width = mf->width;
973 pix->height = mf->height;
974 }
975
976 fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
977
978 if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
979 struct v4l2_subdev *sensor;
980
981 fimc_md_graph_lock(ve);
982
983 sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
984 if (sensor)
985 fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
986 (*out_fmt)->memplanes, try);
987 else
988 ret = -EPIPE;
989
990 fimc_md_graph_unlock(ve);
991 }
992
993 return ret;
994}
995
996static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
997 struct v4l2_format *f)
998{
999 struct fimc_dev *fimc = video_drvdata(file);
1000 struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
1001
1002 return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
1003}
1004
1005static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
1006 enum fimc_color_fmt color)
1007{
1008 bool jpeg = fimc_fmt_is_user_defined(color);
1009
1010 ctx->scaler.enabled = !jpeg;
1011 fimc_ctrls_activate(ctx, !jpeg);
1012
1013 if (jpeg)
1014 set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1015 else
1016 clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1017}
1018
1019static int __fimc_capture_set_format(struct fimc_dev *fimc,
1020 struct v4l2_format *f)
1021{
1022 struct fimc_vid_cap *vc = &fimc->vid_cap;
1023 struct fimc_ctx *ctx = vc->ctx;
1024 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
1025 struct fimc_frame *ff = &ctx->d_frame;
1026 struct fimc_fmt *inp_fmt = NULL;
1027 int ret, i;
1028
1029 if (vb2_is_busy(&fimc->vid_cap.vbq))
1030 return -EBUSY;
1031
1032 ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
1033 if (ret < 0)
1034 return ret;
1035
1036
1037 fimc_alpha_ctrl_update(ctx);
1038
1039 for (i = 0; i < ff->fmt->memplanes; i++) {
1040 ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
1041 ff->payload[i] = pix->plane_fmt[i].sizeimage;
1042 }
1043
1044 set_frame_bounds(ff, pix->width, pix->height);
1045
1046 if (!(ctx->state & FIMC_COMPOSE))
1047 set_frame_crop(ff, 0, 0, pix->width, pix->height);
1048
1049 fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
1050
1051
1052 if (!vc->user_subdev_api) {
1053 ctx->s_frame.fmt = inp_fmt;
1054 set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
1055 set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
1056 }
1057
1058 return ret;
1059}
1060
1061static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
1062 struct v4l2_format *f)
1063{
1064 struct fimc_dev *fimc = video_drvdata(file);
1065
1066 return __fimc_capture_set_format(fimc, f);
1067}
1068
1069static int fimc_cap_enum_input(struct file *file, void *priv,
1070 struct v4l2_input *i)
1071{
1072 struct fimc_dev *fimc = video_drvdata(file);
1073 struct exynos_video_entity *ve = &fimc->vid_cap.ve;
1074 struct v4l2_subdev *sd;
1075
1076 if (i->index != 0)
1077 return -EINVAL;
1078
1079 i->type = V4L2_INPUT_TYPE_CAMERA;
1080 fimc_md_graph_lock(ve);
1081 sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
1082 fimc_md_graph_unlock(ve);
1083
1084 if (sd)
1085 strlcpy(i->name, sd->name, sizeof(i->name));
1086
1087 return 0;
1088}
1089
1090static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
1091{
1092 return i == 0 ? i : -EINVAL;
1093}
1094
1095static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
1096{
1097 *i = 0;
1098 return 0;
1099}
1100
1101
1102
1103
1104
1105
1106
1107static int fimc_pipeline_validate(struct fimc_dev *fimc)
1108{
1109 struct v4l2_subdev_format sink_fmt, src_fmt;
1110 struct fimc_vid_cap *vc = &fimc->vid_cap;
1111 struct v4l2_subdev *sd = &vc->subdev;
1112 struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
1113 struct media_pad *sink_pad, *src_pad;
1114 int i, ret;
1115
1116 while (1) {
1117
1118
1119
1120
1121
1122 src_pad = NULL;
1123
1124 for (i = 0; i < sd->entity.num_pads; i++) {
1125 struct media_pad *p = &sd->entity.pads[i];
1126
1127 if (p->flags & MEDIA_PAD_FL_SINK) {
1128 sink_pad = p;
1129 src_pad = media_entity_remote_pad(sink_pad);
1130 if (src_pad)
1131 break;
1132 }
1133 }
1134
1135 if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
1136 break;
1137
1138
1139 if (sd == &vc->subdev) {
1140 struct fimc_frame *ff = &vc->ctx->s_frame;
1141 sink_fmt.format.width = ff->f_width;
1142 sink_fmt.format.height = ff->f_height;
1143 sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
1144 } else {
1145 sink_fmt.pad = sink_pad->index;
1146 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1147 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
1148 if (ret < 0 && ret != -ENOIOCTLCMD)
1149 return -EPIPE;
1150 }
1151
1152
1153 sd = media_entity_to_v4l2_subdev(src_pad->entity);
1154 src_fmt.pad = src_pad->index;
1155 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1156 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
1157 if (ret < 0 && ret != -ENOIOCTLCMD)
1158 return -EPIPE;
1159
1160 if (src_fmt.format.width != sink_fmt.format.width ||
1161 src_fmt.format.height != sink_fmt.format.height ||
1162 src_fmt.format.code != sink_fmt.format.code)
1163 return -EPIPE;
1164
1165 if (sd == p->subdevs[IDX_SENSOR] &&
1166 fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
1167 struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
1168 struct fimc_frame *frame = &vc->ctx->d_frame;
1169 unsigned int i;
1170
1171 ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
1172 frame->fmt->memplanes,
1173 false);
1174 if (ret < 0)
1175 return -EPIPE;
1176
1177 for (i = 0; i < frame->fmt->memplanes; i++)
1178 if (frame->payload[i] < plane_fmt[i].sizeimage)
1179 return -EPIPE;
1180 }
1181 }
1182 return 0;
1183}
1184
1185static int fimc_cap_streamon(struct file *file, void *priv,
1186 enum v4l2_buf_type type)
1187{
1188 struct fimc_dev *fimc = video_drvdata(file);
1189 struct fimc_vid_cap *vc = &fimc->vid_cap;
1190 struct media_entity *entity = &vc->ve.vdev.entity;
1191 struct fimc_source_info *si = NULL;
1192 struct v4l2_subdev *sd;
1193 int ret;
1194
1195 if (fimc_capture_active(fimc))
1196 return -EBUSY;
1197
1198 ret = media_pipeline_start(entity, &vc->ve.pipe->mp);
1199 if (ret < 0)
1200 return ret;
1201
1202 sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
1203 if (sd)
1204 si = v4l2_get_subdev_hostdata(sd);
1205
1206 if (si == NULL) {
1207 ret = -EPIPE;
1208 goto err_p_stop;
1209 }
1210
1211
1212
1213
1214 vc->source_config = *si;
1215
1216 if (vc->input == GRP_ID_FIMC_IS)
1217 vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
1218
1219 if (vc->user_subdev_api) {
1220 ret = fimc_pipeline_validate(fimc);
1221 if (ret < 0)
1222 goto err_p_stop;
1223 }
1224
1225 ret = vb2_ioctl_streamon(file, priv, type);
1226 if (!ret) {
1227 vc->streaming = true;
1228 return ret;
1229 }
1230
1231err_p_stop:
1232 media_pipeline_stop(entity);
1233 return ret;
1234}
1235
1236static int fimc_cap_streamoff(struct file *file, void *priv,
1237 enum v4l2_buf_type type)
1238{
1239 struct fimc_dev *fimc = video_drvdata(file);
1240 struct fimc_vid_cap *vc = &fimc->vid_cap;
1241 int ret;
1242
1243 ret = vb2_ioctl_streamoff(file, priv, type);
1244 if (ret < 0)
1245 return ret;
1246
1247 media_pipeline_stop(&vc->ve.vdev.entity);
1248 vc->streaming = false;
1249 return 0;
1250}
1251
1252static int fimc_cap_reqbufs(struct file *file, void *priv,
1253 struct v4l2_requestbuffers *reqbufs)
1254{
1255 struct fimc_dev *fimc = video_drvdata(file);
1256 int ret;
1257
1258 ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
1259
1260 if (!ret)
1261 fimc->vid_cap.reqbufs_count = reqbufs->count;
1262
1263 return ret;
1264}
1265
1266static int fimc_cap_g_selection(struct file *file, void *fh,
1267 struct v4l2_selection *s)
1268{
1269 struct fimc_dev *fimc = video_drvdata(file);
1270 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1271 struct fimc_frame *f = &ctx->s_frame;
1272
1273 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1274 return -EINVAL;
1275
1276 switch (s->target) {
1277 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
1278 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1279 f = &ctx->d_frame;
1280
1281 case V4L2_SEL_TGT_CROP_BOUNDS:
1282 case V4L2_SEL_TGT_CROP_DEFAULT:
1283 s->r.left = 0;
1284 s->r.top = 0;
1285 s->r.width = f->o_width;
1286 s->r.height = f->o_height;
1287 return 0;
1288
1289 case V4L2_SEL_TGT_COMPOSE:
1290 f = &ctx->d_frame;
1291
1292 case V4L2_SEL_TGT_CROP:
1293 s->r.left = f->offs_h;
1294 s->r.top = f->offs_v;
1295 s->r.width = f->width;
1296 s->r.height = f->height;
1297 return 0;
1298 }
1299
1300 return -EINVAL;
1301}
1302
1303
1304static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
1305{
1306 if (a->left < b->left || a->top < b->top)
1307 return 0;
1308 if (a->left + a->width > b->left + b->width)
1309 return 0;
1310 if (a->top + a->height > b->top + b->height)
1311 return 0;
1312
1313 return 1;
1314}
1315
1316static int fimc_cap_s_selection(struct file *file, void *fh,
1317 struct v4l2_selection *s)
1318{
1319 struct fimc_dev *fimc = video_drvdata(file);
1320 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1321 struct v4l2_rect rect = s->r;
1322 struct fimc_frame *f;
1323 unsigned long flags;
1324
1325 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1326 return -EINVAL;
1327
1328 if (s->target == V4L2_SEL_TGT_COMPOSE)
1329 f = &ctx->d_frame;
1330 else if (s->target == V4L2_SEL_TGT_CROP)
1331 f = &ctx->s_frame;
1332 else
1333 return -EINVAL;
1334
1335 fimc_capture_try_selection(ctx, &rect, s->target);
1336
1337 if (s->flags & V4L2_SEL_FLAG_LE &&
1338 !enclosed_rectangle(&rect, &s->r))
1339 return -ERANGE;
1340
1341 if (s->flags & V4L2_SEL_FLAG_GE &&
1342 !enclosed_rectangle(&s->r, &rect))
1343 return -ERANGE;
1344
1345 s->r = rect;
1346 spin_lock_irqsave(&fimc->slock, flags);
1347 set_frame_crop(f, s->r.left, s->r.top, s->r.width,
1348 s->r.height);
1349 spin_unlock_irqrestore(&fimc->slock, flags);
1350
1351 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1352 return 0;
1353}
1354
1355static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
1356 .vidioc_querycap = fimc_cap_querycap,
1357
1358 .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
1359 .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
1360 .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
1361 .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
1362
1363 .vidioc_reqbufs = fimc_cap_reqbufs,
1364 .vidioc_querybuf = vb2_ioctl_querybuf,
1365 .vidioc_qbuf = vb2_ioctl_qbuf,
1366 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1367 .vidioc_expbuf = vb2_ioctl_expbuf,
1368 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1369 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1370
1371 .vidioc_streamon = fimc_cap_streamon,
1372 .vidioc_streamoff = fimc_cap_streamoff,
1373
1374 .vidioc_g_selection = fimc_cap_g_selection,
1375 .vidioc_s_selection = fimc_cap_s_selection,
1376
1377 .vidioc_enum_input = fimc_cap_enum_input,
1378 .vidioc_s_input = fimc_cap_s_input,
1379 .vidioc_g_input = fimc_cap_g_input,
1380};
1381
1382
1383static int fimc_link_setup(struct media_entity *entity,
1384 const struct media_pad *local,
1385 const struct media_pad *remote, u32 flags)
1386{
1387 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1388 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1389 struct fimc_vid_cap *vc = &fimc->vid_cap;
1390 struct v4l2_subdev *sensor;
1391
1392 if (!is_media_entity_v4l2_subdev(remote->entity))
1393 return -EINVAL;
1394
1395 if (WARN_ON(fimc == NULL))
1396 return 0;
1397
1398 dbg("%s --> %s, flags: 0x%x. input: 0x%x",
1399 local->entity->name, remote->entity->name, flags,
1400 fimc->vid_cap.input);
1401
1402 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
1403 fimc->vid_cap.input = 0;
1404 return 0;
1405 }
1406
1407 if (vc->input != 0)
1408 return -EBUSY;
1409
1410 vc->input = sd->grp_id;
1411
1412 if (vc->user_subdev_api || vc->inh_sensor_ctrls)
1413 return 0;
1414
1415
1416 sensor = fimc_find_remote_sensor(&vc->subdev.entity);
1417 if (sensor == NULL)
1418 return 0;
1419
1420 return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
1421 sensor->ctrl_handler, NULL);
1422}
1423
1424static const struct media_entity_operations fimc_sd_media_ops = {
1425 .link_setup = fimc_link_setup,
1426};
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
1442 void *arg)
1443{
1444 struct fimc_source_info *si;
1445 struct fimc_vid_buffer *buf;
1446 struct fimc_md *fmd;
1447 struct fimc_dev *fimc;
1448 unsigned long flags;
1449
1450 if (sd == NULL)
1451 return;
1452
1453 si = v4l2_get_subdev_hostdata(sd);
1454 fmd = entity_to_fimc_mdev(&sd->entity);
1455
1456 spin_lock_irqsave(&fmd->slock, flags);
1457
1458 fimc = si ? source_to_sensor_info(si)->host : NULL;
1459
1460 if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
1461 test_bit(ST_CAPT_PEND, &fimc->state)) {
1462 unsigned long irq_flags;
1463 spin_lock_irqsave(&fimc->slock, irq_flags);
1464 if (!list_empty(&fimc->vid_cap.active_buf_q)) {
1465 buf = list_entry(fimc->vid_cap.active_buf_q.next,
1466 struct fimc_vid_buffer, list);
1467 vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
1468 *((u32 *)arg));
1469 }
1470 fimc_capture_irq_handler(fimc, 1);
1471 fimc_deactivate_capture(fimc);
1472 spin_unlock_irqrestore(&fimc->slock, irq_flags);
1473 }
1474 spin_unlock_irqrestore(&fmd->slock, flags);
1475}
1476
1477static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1478 struct v4l2_subdev_pad_config *cfg,
1479 struct v4l2_subdev_mbus_code_enum *code)
1480{
1481 struct fimc_fmt *fmt;
1482
1483 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
1484 if (!fmt)
1485 return -EINVAL;
1486 code->code = fmt->mbus_code;
1487 return 0;
1488}
1489
1490static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
1491 struct v4l2_subdev_pad_config *cfg,
1492 struct v4l2_subdev_format *fmt)
1493{
1494 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1495 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1496 struct fimc_frame *ff = &ctx->s_frame;
1497 struct v4l2_mbus_framefmt *mf;
1498
1499 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1500 mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1501 fmt->format = *mf;
1502 return 0;
1503 }
1504
1505 mf = &fmt->format;
1506 mutex_lock(&fimc->lock);
1507
1508 switch (fmt->pad) {
1509 case FIMC_SD_PAD_SOURCE:
1510 if (!WARN_ON(ff->fmt == NULL))
1511 mf->code = ff->fmt->mbus_code;
1512
1513 mf->width = ff->width;
1514 mf->height = ff->height;
1515 break;
1516 case FIMC_SD_PAD_SINK_FIFO:
1517 *mf = fimc->vid_cap.wb_fmt;
1518 break;
1519 case FIMC_SD_PAD_SINK_CAM:
1520 default:
1521 *mf = fimc->vid_cap.ci_fmt;
1522 break;
1523 }
1524
1525 mutex_unlock(&fimc->lock);
1526 mf->colorspace = V4L2_COLORSPACE_JPEG;
1527
1528 return 0;
1529}
1530
1531static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1532 struct v4l2_subdev_pad_config *cfg,
1533 struct v4l2_subdev_format *fmt)
1534{
1535 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1536 struct v4l2_mbus_framefmt *mf = &fmt->format;
1537 struct fimc_vid_cap *vc = &fimc->vid_cap;
1538 struct fimc_ctx *ctx = vc->ctx;
1539 struct fimc_frame *ff;
1540 struct fimc_fmt *ffmt;
1541
1542 dbg("pad%d: code: 0x%x, %dx%d",
1543 fmt->pad, mf->code, mf->width, mf->height);
1544
1545 if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
1546 return -EBUSY;
1547
1548 mutex_lock(&fimc->lock);
1549 ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
1550 &mf->code, NULL, fmt->pad);
1551 mutex_unlock(&fimc->lock);
1552 mf->colorspace = V4L2_COLORSPACE_JPEG;
1553
1554 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1555 mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1556 *mf = fmt->format;
1557 return 0;
1558 }
1559
1560 if (WARN_ON(ffmt == NULL))
1561 return -EINVAL;
1562
1563
1564 fimc_alpha_ctrl_update(ctx);
1565
1566 fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
1567 if (fmt->pad == FIMC_SD_PAD_SOURCE) {
1568 ff = &ctx->d_frame;
1569
1570 mf->width = ctx->s_frame.width;
1571 mf->height = ctx->s_frame.height;
1572 } else {
1573 ff = &ctx->s_frame;
1574 }
1575
1576 mutex_lock(&fimc->lock);
1577 set_frame_bounds(ff, mf->width, mf->height);
1578
1579 if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
1580 vc->wb_fmt = *mf;
1581 else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
1582 vc->ci_fmt = *mf;
1583
1584 ff->fmt = ffmt;
1585
1586
1587 if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
1588 set_frame_crop(ff, 0, 0, mf->width, mf->height);
1589
1590 if (fmt->pad != FIMC_SD_PAD_SOURCE)
1591 ctx->state &= ~FIMC_COMPOSE;
1592
1593 mutex_unlock(&fimc->lock);
1594 return 0;
1595}
1596
1597static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
1598 struct v4l2_subdev_pad_config *cfg,
1599 struct v4l2_subdev_selection *sel)
1600{
1601 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1602 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1603 struct fimc_frame *f = &ctx->s_frame;
1604 struct v4l2_rect *r = &sel->r;
1605 struct v4l2_rect *try_sel;
1606
1607 if (sel->pad == FIMC_SD_PAD_SOURCE)
1608 return -EINVAL;
1609
1610 mutex_lock(&fimc->lock);
1611
1612 switch (sel->target) {
1613 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1614 f = &ctx->d_frame;
1615
1616 case V4L2_SEL_TGT_CROP_BOUNDS:
1617 r->width = f->o_width;
1618 r->height = f->o_height;
1619 r->left = 0;
1620 r->top = 0;
1621 mutex_unlock(&fimc->lock);
1622 return 0;
1623
1624 case V4L2_SEL_TGT_CROP:
1625 try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1626 break;
1627 case V4L2_SEL_TGT_COMPOSE:
1628 try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1629 f = &ctx->d_frame;
1630 break;
1631 default:
1632 mutex_unlock(&fimc->lock);
1633 return -EINVAL;
1634 }
1635
1636 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1637 sel->r = *try_sel;
1638 } else {
1639 r->left = f->offs_h;
1640 r->top = f->offs_v;
1641 r->width = f->width;
1642 r->height = f->height;
1643 }
1644
1645 dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
1646 sel->pad, r->left, r->top, r->width, r->height,
1647 f->f_width, f->f_height);
1648
1649 mutex_unlock(&fimc->lock);
1650 return 0;
1651}
1652
1653static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
1654 struct v4l2_subdev_pad_config *cfg,
1655 struct v4l2_subdev_selection *sel)
1656{
1657 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1658 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1659 struct fimc_frame *f = &ctx->s_frame;
1660 struct v4l2_rect *r = &sel->r;
1661 struct v4l2_rect *try_sel;
1662 unsigned long flags;
1663
1664 if (sel->pad == FIMC_SD_PAD_SOURCE)
1665 return -EINVAL;
1666
1667 mutex_lock(&fimc->lock);
1668 fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
1669
1670 switch (sel->target) {
1671 case V4L2_SEL_TGT_CROP:
1672 try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1673 break;
1674 case V4L2_SEL_TGT_COMPOSE:
1675 try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1676 f = &ctx->d_frame;
1677 break;
1678 default:
1679 mutex_unlock(&fimc->lock);
1680 return -EINVAL;
1681 }
1682
1683 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1684 *try_sel = sel->r;
1685 } else {
1686 spin_lock_irqsave(&fimc->slock, flags);
1687 set_frame_crop(f, r->left, r->top, r->width, r->height);
1688 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1689 if (sel->target == V4L2_SEL_TGT_COMPOSE)
1690 ctx->state |= FIMC_COMPOSE;
1691 spin_unlock_irqrestore(&fimc->slock, flags);
1692 }
1693
1694 dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
1695 r->width, r->height);
1696
1697 mutex_unlock(&fimc->lock);
1698 return 0;
1699}
1700
1701static const struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
1702 .enum_mbus_code = fimc_subdev_enum_mbus_code,
1703 .get_selection = fimc_subdev_get_selection,
1704 .set_selection = fimc_subdev_set_selection,
1705 .get_fmt = fimc_subdev_get_fmt,
1706 .set_fmt = fimc_subdev_set_fmt,
1707};
1708
1709static const struct v4l2_subdev_ops fimc_subdev_ops = {
1710 .pad = &fimc_subdev_pad_ops,
1711};
1712
1713
1714static int fimc_capture_set_default_format(struct fimc_dev *fimc)
1715{
1716 struct v4l2_format fmt = {
1717 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
1718 .fmt.pix_mp = {
1719 .width = FIMC_DEFAULT_WIDTH,
1720 .height = FIMC_DEFAULT_HEIGHT,
1721 .pixelformat = V4L2_PIX_FMT_YUYV,
1722 .field = V4L2_FIELD_NONE,
1723 .colorspace = V4L2_COLORSPACE_JPEG,
1724 },
1725 };
1726
1727 return __fimc_capture_set_format(fimc, &fmt);
1728}
1729
1730
1731static int fimc_register_capture_device(struct fimc_dev *fimc,
1732 struct v4l2_device *v4l2_dev)
1733{
1734 struct video_device *vfd = &fimc->vid_cap.ve.vdev;
1735 struct vb2_queue *q = &fimc->vid_cap.vbq;
1736 struct fimc_ctx *ctx;
1737 struct fimc_vid_cap *vid_cap;
1738 struct fimc_fmt *fmt;
1739 int ret = -ENOMEM;
1740
1741 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1742 if (!ctx)
1743 return -ENOMEM;
1744
1745 ctx->fimc_dev = fimc;
1746 ctx->in_path = FIMC_IO_CAMERA;
1747 ctx->out_path = FIMC_IO_DMA;
1748 ctx->state = FIMC_CTX_CAP;
1749 ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1750 ctx->d_frame.fmt = ctx->s_frame.fmt;
1751
1752 memset(vfd, 0, sizeof(*vfd));
1753 snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
1754
1755 vfd->fops = &fimc_capture_fops;
1756 vfd->ioctl_ops = &fimc_capture_ioctl_ops;
1757 vfd->v4l2_dev = v4l2_dev;
1758 vfd->minor = -1;
1759 vfd->release = video_device_release_empty;
1760 vfd->queue = q;
1761 vfd->lock = &fimc->lock;
1762
1763 video_set_drvdata(vfd, fimc);
1764 vid_cap = &fimc->vid_cap;
1765 vid_cap->active_buf_cnt = 0;
1766 vid_cap->reqbufs_count = 0;
1767 vid_cap->ctx = ctx;
1768
1769 INIT_LIST_HEAD(&vid_cap->pending_buf_q);
1770 INIT_LIST_HEAD(&vid_cap->active_buf_q);
1771
1772 memset(q, 0, sizeof(*q));
1773 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1774 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
1775 q->drv_priv = ctx;
1776 q->ops = &fimc_capture_qops;
1777 q->mem_ops = &vb2_dma_contig_memops;
1778 q->buf_struct_size = sizeof(struct fimc_vid_buffer);
1779 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1780 q->lock = &fimc->lock;
1781 q->dev = &fimc->pdev->dev;
1782
1783 ret = vb2_queue_init(q);
1784 if (ret)
1785 goto err_free_ctx;
1786
1787
1788 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1789 vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
1790 vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
1791 vid_cap->ci_fmt.code = fmt->mbus_code;
1792
1793 ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
1794 ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
1795 ctx->s_frame.fmt = fmt;
1796
1797 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
1798 vid_cap->wb_fmt = vid_cap->ci_fmt;
1799 vid_cap->wb_fmt.code = fmt->mbus_code;
1800
1801 vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
1802 vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1803 ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
1804 if (ret)
1805 goto err_free_ctx;
1806
1807 ret = fimc_ctrls_create(ctx);
1808 if (ret)
1809 goto err_me_cleanup;
1810
1811 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1812 if (ret)
1813 goto err_ctrl_free;
1814
1815 v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
1816 vfd->name, video_device_node_name(vfd));
1817
1818 vfd->ctrl_handler = &ctx->ctrls.handler;
1819 return 0;
1820
1821err_ctrl_free:
1822 fimc_ctrls_delete(ctx);
1823err_me_cleanup:
1824 media_entity_cleanup(&vfd->entity);
1825err_free_ctx:
1826 kfree(ctx);
1827 return ret;
1828}
1829
1830static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
1831{
1832 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1833 int ret;
1834
1835 if (fimc == NULL)
1836 return -ENXIO;
1837
1838 ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
1839 if (ret)
1840 return ret;
1841
1842 fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
1843
1844 ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
1845 if (ret) {
1846 fimc_unregister_m2m_device(fimc);
1847 fimc->vid_cap.ve.pipe = NULL;
1848 }
1849
1850 return ret;
1851}
1852
1853static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
1854{
1855 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1856 struct video_device *vdev;
1857
1858 if (fimc == NULL)
1859 return;
1860
1861 mutex_lock(&fimc->lock);
1862
1863 fimc_unregister_m2m_device(fimc);
1864 vdev = &fimc->vid_cap.ve.vdev;
1865
1866 if (video_is_registered(vdev)) {
1867 video_unregister_device(vdev);
1868 media_entity_cleanup(&vdev->entity);
1869 fimc_ctrls_delete(fimc->vid_cap.ctx);
1870 fimc->vid_cap.ve.pipe = NULL;
1871 }
1872 kfree(fimc->vid_cap.ctx);
1873 fimc->vid_cap.ctx = NULL;
1874
1875 mutex_unlock(&fimc->lock);
1876}
1877
1878static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
1879 .registered = fimc_capture_subdev_registered,
1880 .unregistered = fimc_capture_subdev_unregistered,
1881};
1882
1883int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
1884{
1885 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1886 int ret;
1887
1888 v4l2_subdev_init(sd, &fimc_subdev_ops);
1889 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1890 snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
1891
1892 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
1893 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
1894 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1895 ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
1896 fimc->vid_cap.sd_pads);
1897 if (ret)
1898 return ret;
1899
1900 sd->entity.ops = &fimc_sd_media_ops;
1901 sd->internal_ops = &fimc_capture_sd_internal_ops;
1902 v4l2_set_subdevdata(sd, fimc);
1903 return 0;
1904}
1905
1906void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
1907{
1908 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1909
1910 v4l2_device_unregister_subdev(sd);
1911 media_entity_cleanup(&sd->entity);
1912 v4l2_set_subdevdata(sd, NULL);
1913}
1914