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20#include <linux/module.h>
21#include <linux/moduleparam.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/sched.h>
25#include <linux/spinlock.h>
26#include <linux/completion.h>
27#include <linux/delay.h>
28#include <linux/string.h>
29#include <linux/input.h>
30#include <linux/device.h>
31#include <linux/freezer.h>
32#include <linux/slab.h>
33#include <linux/kthread.h>
34#include <linux/mfd/ucb1x00.h>
35
36#include <mach/collie.h>
37#include <asm/mach-types.h>
38
39
40
41struct ucb1x00_ts {
42 struct input_dev *idev;
43 struct ucb1x00 *ucb;
44
45 spinlock_t irq_lock;
46 unsigned irq_disabled;
47 wait_queue_head_t irq_wait;
48 struct task_struct *rtask;
49 u16 x_res;
50 u16 y_res;
51
52 unsigned int adcsync:1;
53};
54
55static int adcsync;
56
57static inline void ucb1x00_ts_evt_add(struct ucb1x00_ts *ts, u16 pressure, u16 x, u16 y)
58{
59 struct input_dev *idev = ts->idev;
60
61 input_report_abs(idev, ABS_X, x);
62 input_report_abs(idev, ABS_Y, y);
63 input_report_abs(idev, ABS_PRESSURE, pressure);
64 input_report_key(idev, BTN_TOUCH, 1);
65 input_sync(idev);
66}
67
68static inline void ucb1x00_ts_event_release(struct ucb1x00_ts *ts)
69{
70 struct input_dev *idev = ts->idev;
71
72 input_report_abs(idev, ABS_PRESSURE, 0);
73 input_report_key(idev, BTN_TOUCH, 0);
74 input_sync(idev);
75}
76
77
78
79
80static inline void ucb1x00_ts_mode_int(struct ucb1x00_ts *ts)
81{
82 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
83 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
84 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
85 UCB_TS_CR_MODE_INT);
86}
87
88
89
90
91
92static inline unsigned int ucb1x00_ts_read_pressure(struct ucb1x00_ts *ts)
93{
94 if (machine_is_collie()) {
95 ucb1x00_io_write(ts->ucb, COLLIE_TC35143_GPIO_TBL_CHK, 0);
96 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
97 UCB_TS_CR_TSPX_POW | UCB_TS_CR_TSMX_POW |
98 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
99
100 udelay(55);
101
102 return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_AD2, ts->adcsync);
103 } else {
104 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
105 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
106 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
107 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
108
109 return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
110 }
111}
112
113
114
115
116
117
118
119static inline unsigned int ucb1x00_ts_read_xpos(struct ucb1x00_ts *ts)
120{
121 if (machine_is_collie())
122 ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
123 else {
124 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
125 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
126 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
127 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
128 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
129 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
130 }
131 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
132 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
133 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
134
135 udelay(55);
136
137 return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
138}
139
140
141
142
143
144
145
146static inline unsigned int ucb1x00_ts_read_ypos(struct ucb1x00_ts *ts)
147{
148 if (machine_is_collie())
149 ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
150 else {
151 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
152 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
153 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
154 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
155 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
156 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
157 }
158
159 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
160 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
161 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
162
163 udelay(55);
164
165 return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPX, ts->adcsync);
166}
167
168
169
170
171
172static inline unsigned int ucb1x00_ts_read_xres(struct ucb1x00_ts *ts)
173{
174 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
175 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
176 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
177 return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync);
178}
179
180
181
182
183
184static inline unsigned int ucb1x00_ts_read_yres(struct ucb1x00_ts *ts)
185{
186 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
187 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
188 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
189 return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync);
190}
191
192static inline int ucb1x00_ts_pen_down(struct ucb1x00_ts *ts)
193{
194 unsigned int val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR);
195
196 if (machine_is_collie())
197 return (!(val & (UCB_TS_CR_TSPX_LOW)));
198 else
199 return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
200}
201
202
203
204
205
206
207static int ucb1x00_thread(void *_ts)
208{
209 struct ucb1x00_ts *ts = _ts;
210 DECLARE_WAITQUEUE(wait, current);
211 bool frozen, ignore = false;
212 int valid = 0;
213
214 set_freezable();
215 add_wait_queue(&ts->irq_wait, &wait);
216 while (!kthread_freezable_should_stop(&frozen)) {
217 unsigned int x, y, p;
218 signed long timeout;
219
220 if (frozen)
221 ignore = true;
222
223 ucb1x00_adc_enable(ts->ucb);
224
225 x = ucb1x00_ts_read_xpos(ts);
226 y = ucb1x00_ts_read_ypos(ts);
227 p = ucb1x00_ts_read_pressure(ts);
228
229
230
231
232 ucb1x00_ts_mode_int(ts);
233 ucb1x00_adc_disable(ts->ucb);
234
235 msleep(10);
236
237 ucb1x00_enable(ts->ucb);
238
239
240 if (ucb1x00_ts_pen_down(ts)) {
241 set_current_state(TASK_INTERRUPTIBLE);
242
243 spin_lock_irq(&ts->irq_lock);
244 if (ts->irq_disabled) {
245 ts->irq_disabled = 0;
246 enable_irq(ts->ucb->irq_base + UCB_IRQ_TSPX);
247 }
248 spin_unlock_irq(&ts->irq_lock);
249 ucb1x00_disable(ts->ucb);
250
251
252
253
254
255 if (valid) {
256 ucb1x00_ts_event_release(ts);
257 valid = 0;
258 }
259
260 timeout = MAX_SCHEDULE_TIMEOUT;
261 } else {
262 ucb1x00_disable(ts->ucb);
263
264
265
266
267
268
269 if (!ignore) {
270 ucb1x00_ts_evt_add(ts, p, x, y);
271 valid = 1;
272 }
273
274 set_current_state(TASK_INTERRUPTIBLE);
275 timeout = HZ / 100;
276 }
277
278 schedule_timeout(timeout);
279 }
280
281 remove_wait_queue(&ts->irq_wait, &wait);
282
283 ts->rtask = NULL;
284 return 0;
285}
286
287
288
289
290
291static irqreturn_t ucb1x00_ts_irq(int irq, void *id)
292{
293 struct ucb1x00_ts *ts = id;
294
295 spin_lock(&ts->irq_lock);
296 ts->irq_disabled = 1;
297 disable_irq_nosync(ts->ucb->irq_base + UCB_IRQ_TSPX);
298 spin_unlock(&ts->irq_lock);
299 wake_up(&ts->irq_wait);
300
301 return IRQ_HANDLED;
302}
303
304static int ucb1x00_ts_open(struct input_dev *idev)
305{
306 struct ucb1x00_ts *ts = input_get_drvdata(idev);
307 unsigned long flags = 0;
308 int ret = 0;
309
310 BUG_ON(ts->rtask);
311
312 if (machine_is_collie())
313 flags = IRQF_TRIGGER_RISING;
314 else
315 flags = IRQF_TRIGGER_FALLING;
316
317 ts->irq_disabled = 0;
318
319 init_waitqueue_head(&ts->irq_wait);
320 ret = request_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ucb1x00_ts_irq,
321 flags, "ucb1x00-ts", ts);
322 if (ret < 0)
323 goto out;
324
325
326
327
328
329 ucb1x00_adc_enable(ts->ucb);
330 ts->x_res = ucb1x00_ts_read_xres(ts);
331 ts->y_res = ucb1x00_ts_read_yres(ts);
332 ucb1x00_adc_disable(ts->ucb);
333
334 ts->rtask = kthread_run(ucb1x00_thread, ts, "ktsd");
335 if (!IS_ERR(ts->rtask)) {
336 ret = 0;
337 } else {
338 free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
339 ts->rtask = NULL;
340 ret = -EFAULT;
341 }
342
343 out:
344 return ret;
345}
346
347
348
349
350static void ucb1x00_ts_close(struct input_dev *idev)
351{
352 struct ucb1x00_ts *ts = input_get_drvdata(idev);
353
354 if (ts->rtask)
355 kthread_stop(ts->rtask);
356
357 ucb1x00_enable(ts->ucb);
358 free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
359 ucb1x00_reg_write(ts->ucb, UCB_TS_CR, 0);
360 ucb1x00_disable(ts->ucb);
361}
362
363
364
365
366
367static int ucb1x00_ts_add(struct ucb1x00_dev *dev)
368{
369 struct ucb1x00_ts *ts;
370 struct input_dev *idev;
371 int err;
372
373 ts = kzalloc(sizeof(struct ucb1x00_ts), GFP_KERNEL);
374 idev = input_allocate_device();
375 if (!ts || !idev) {
376 err = -ENOMEM;
377 goto fail;
378 }
379
380 ts->ucb = dev->ucb;
381 ts->idev = idev;
382 ts->adcsync = adcsync ? UCB_SYNC : UCB_NOSYNC;
383 spin_lock_init(&ts->irq_lock);
384
385 idev->name = "Touchscreen panel";
386 idev->id.product = ts->ucb->id;
387 idev->open = ucb1x00_ts_open;
388 idev->close = ucb1x00_ts_close;
389 idev->dev.parent = &ts->ucb->dev;
390
391 idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY);
392 idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
393
394 input_set_drvdata(idev, ts);
395
396 ucb1x00_adc_enable(ts->ucb);
397 ts->x_res = ucb1x00_ts_read_xres(ts);
398 ts->y_res = ucb1x00_ts_read_yres(ts);
399 ucb1x00_adc_disable(ts->ucb);
400
401 input_set_abs_params(idev, ABS_X, 0, ts->x_res, 0, 0);
402 input_set_abs_params(idev, ABS_Y, 0, ts->y_res, 0, 0);
403 input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
404
405 err = input_register_device(idev);
406 if (err)
407 goto fail;
408
409 dev->priv = ts;
410
411 return 0;
412
413 fail:
414 input_free_device(idev);
415 kfree(ts);
416 return err;
417}
418
419static void ucb1x00_ts_remove(struct ucb1x00_dev *dev)
420{
421 struct ucb1x00_ts *ts = dev->priv;
422
423 input_unregister_device(ts->idev);
424 kfree(ts);
425}
426
427static struct ucb1x00_driver ucb1x00_ts_driver = {
428 .add = ucb1x00_ts_add,
429 .remove = ucb1x00_ts_remove,
430};
431
432static int __init ucb1x00_ts_init(void)
433{
434 return ucb1x00_register_driver(&ucb1x00_ts_driver);
435}
436
437static void __exit ucb1x00_ts_exit(void)
438{
439 ucb1x00_unregister_driver(&ucb1x00_ts_driver);
440}
441
442module_param(adcsync, int, 0444);
443module_init(ucb1x00_ts_init);
444module_exit(ucb1x00_ts_exit);
445
446MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
447MODULE_DESCRIPTION("UCB1x00 touchscreen driver");
448MODULE_LICENSE("GPL");
449