linux/drivers/net/ethernet/huawei/hinic/hinic_hw_qp.h
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   1/*
   2 * Huawei HiNIC PCI Express Linux driver
   3 * Copyright(c) 2017 Huawei Technologies Co., Ltd
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms and conditions of the GNU General Public License,
   7 * version 2, as published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12 * for more details.
  13 *
  14 */
  15
  16#ifndef HINIC_HW_QP_H
  17#define HINIC_HW_QP_H
  18
  19#include <linux/kernel.h>
  20#include <linux/types.h>
  21#include <linux/sizes.h>
  22#include <linux/pci.h>
  23#include <linux/skbuff.h>
  24
  25#include "hinic_common.h"
  26#include "hinic_hw_if.h"
  27#include "hinic_hw_wqe.h"
  28#include "hinic_hw_wq.h"
  29#include "hinic_hw_qp_ctxt.h"
  30
  31#define HINIC_SQ_DB_INFO_PI_HI_SHIFT            0
  32#define HINIC_SQ_DB_INFO_QID_SHIFT              8
  33#define HINIC_SQ_DB_INFO_PATH_SHIFT             23
  34#define HINIC_SQ_DB_INFO_COS_SHIFT              24
  35#define HINIC_SQ_DB_INFO_TYPE_SHIFT             27
  36
  37#define HINIC_SQ_DB_INFO_PI_HI_MASK             0xFF
  38#define HINIC_SQ_DB_INFO_QID_MASK               0x3FF
  39#define HINIC_SQ_DB_INFO_PATH_MASK              0x1
  40#define HINIC_SQ_DB_INFO_COS_MASK               0x7
  41#define HINIC_SQ_DB_INFO_TYPE_MASK              0x1F
  42
  43#define HINIC_SQ_DB_INFO_SET(val, member)       \
  44                (((u32)(val) & HINIC_SQ_DB_INFO_##member##_MASK) \
  45                 << HINIC_SQ_DB_INFO_##member##_SHIFT)
  46
  47#define HINIC_SQ_WQEBB_SIZE                     64
  48#define HINIC_RQ_WQEBB_SIZE                     32
  49
  50#define HINIC_SQ_PAGE_SIZE                      SZ_4K
  51#define HINIC_RQ_PAGE_SIZE                      SZ_4K
  52
  53#define HINIC_SQ_DEPTH                          SZ_4K
  54#define HINIC_RQ_DEPTH                          SZ_4K
  55
  56/* In any change to HINIC_RX_BUF_SZ, HINIC_RX_BUF_SZ_IDX must be changed */
  57#define HINIC_RX_BUF_SZ                         2048
  58#define HINIC_RX_BUF_SZ_IDX                     HINIC_RX_BUF_SZ_2048_IDX
  59
  60#define HINIC_MIN_TX_WQE_SIZE(wq)               \
  61                ALIGN(HINIC_SQ_WQE_SIZE(1), (wq)->wqebb_size)
  62
  63#define HINIC_MIN_TX_NUM_WQEBBS(sq)             \
  64                (HINIC_MIN_TX_WQE_SIZE((sq)->wq) / (sq)->wq->wqebb_size)
  65
  66enum hinic_rx_buf_sz_idx {
  67        HINIC_RX_BUF_SZ_32_IDX,
  68        HINIC_RX_BUF_SZ_64_IDX,
  69        HINIC_RX_BUF_SZ_96_IDX,
  70        HINIC_RX_BUF_SZ_128_IDX,
  71        HINIC_RX_BUF_SZ_192_IDX,
  72        HINIC_RX_BUF_SZ_256_IDX,
  73        HINIC_RX_BUF_SZ_384_IDX,
  74        HINIC_RX_BUF_SZ_512_IDX,
  75        HINIC_RX_BUF_SZ_768_IDX,
  76        HINIC_RX_BUF_SZ_1024_IDX,
  77        HINIC_RX_BUF_SZ_1536_IDX,
  78        HINIC_RX_BUF_SZ_2048_IDX,
  79        HINIC_RX_BUF_SZ_3072_IDX,
  80        HINIC_RX_BUF_SZ_4096_IDX,
  81        HINIC_RX_BUF_SZ_8192_IDX,
  82        HINIC_RX_BUF_SZ_16384_IDX,
  83};
  84
  85struct hinic_sq {
  86        struct hinic_hwif       *hwif;
  87
  88        struct hinic_wq         *wq;
  89
  90        u32                     irq;
  91        u16                     msix_entry;
  92
  93        void                    *hw_ci_addr;
  94        dma_addr_t              hw_ci_dma_addr;
  95
  96        void __iomem            *db_base;
  97
  98        struct sk_buff          **saved_skb;
  99};
 100
 101struct hinic_rq {
 102        struct hinic_hwif       *hwif;
 103
 104        struct hinic_wq         *wq;
 105
 106        u32                     irq;
 107        u16                     msix_entry;
 108
 109        size_t                  buf_sz;
 110
 111        struct sk_buff          **saved_skb;
 112
 113        struct hinic_rq_cqe     **cqe;
 114        dma_addr_t              *cqe_dma;
 115
 116        u16                     *pi_virt_addr;
 117        dma_addr_t              pi_dma_addr;
 118};
 119
 120struct hinic_qp {
 121        struct hinic_sq         sq;
 122        struct hinic_rq         rq;
 123
 124        u16     q_id;
 125};
 126
 127void hinic_qp_prepare_header(struct hinic_qp_ctxt_header *qp_ctxt_hdr,
 128                             enum hinic_qp_ctxt_type ctxt_type,
 129                             u16 num_queues, u16 max_queues);
 130
 131void hinic_sq_prepare_ctxt(struct hinic_sq_ctxt *sq_ctxt,
 132                           struct hinic_sq *sq, u16 global_qid);
 133
 134void hinic_rq_prepare_ctxt(struct hinic_rq_ctxt *rq_ctxt,
 135                           struct hinic_rq *rq, u16 global_qid);
 136
 137int hinic_init_sq(struct hinic_sq *sq, struct hinic_hwif *hwif,
 138                  struct hinic_wq *wq, struct msix_entry *entry, void *ci_addr,
 139                  dma_addr_t ci_dma_addr, void __iomem *db_base);
 140
 141void hinic_clean_sq(struct hinic_sq *sq);
 142
 143int hinic_init_rq(struct hinic_rq *rq, struct hinic_hwif *hwif,
 144                  struct hinic_wq *wq, struct msix_entry *entry);
 145
 146void hinic_clean_rq(struct hinic_rq *rq);
 147
 148int hinic_get_sq_free_wqebbs(struct hinic_sq *sq);
 149
 150int hinic_get_rq_free_wqebbs(struct hinic_rq *rq);
 151
 152void hinic_sq_prepare_wqe(struct hinic_sq *sq, u16 prod_idx,
 153                          struct hinic_sq_wqe *wqe, struct hinic_sge *sges,
 154                          int nr_sges);
 155
 156void hinic_sq_write_db(struct hinic_sq *sq, u16 prod_idx, unsigned int wqe_size,
 157                       unsigned int cos);
 158
 159struct hinic_sq_wqe *hinic_sq_get_wqe(struct hinic_sq *sq,
 160                                      unsigned int wqe_size, u16 *prod_idx);
 161
 162void hinic_sq_write_wqe(struct hinic_sq *sq, u16 prod_idx,
 163                        struct hinic_sq_wqe *wqe, struct sk_buff *skb,
 164                        unsigned int wqe_size);
 165
 166struct hinic_sq_wqe *hinic_sq_read_wqe(struct hinic_sq *sq,
 167                                       struct sk_buff **skb,
 168                                       unsigned int *wqe_size, u16 *cons_idx);
 169
 170void hinic_sq_put_wqe(struct hinic_sq *sq, unsigned int wqe_size);
 171
 172void hinic_sq_get_sges(struct hinic_sq_wqe *wqe, struct hinic_sge *sges,
 173                       int nr_sges);
 174
 175struct hinic_rq_wqe *hinic_rq_get_wqe(struct hinic_rq *rq,
 176                                      unsigned int wqe_size, u16 *prod_idx);
 177
 178void hinic_rq_write_wqe(struct hinic_rq *rq, u16 prod_idx,
 179                        struct hinic_rq_wqe *wqe, struct sk_buff *skb);
 180
 181struct hinic_rq_wqe *hinic_rq_read_wqe(struct hinic_rq *rq,
 182                                       unsigned int wqe_size,
 183                                       struct sk_buff **skb, u16 *cons_idx);
 184
 185struct hinic_rq_wqe *hinic_rq_read_next_wqe(struct hinic_rq *rq,
 186                                            unsigned int wqe_size,
 187                                            struct sk_buff **skb,
 188                                            u16 *cons_idx);
 189
 190void hinic_rq_put_wqe(struct hinic_rq *rq, u16 cons_idx,
 191                      unsigned int wqe_size);
 192
 193void hinic_rq_get_sge(struct hinic_rq *rq, struct hinic_rq_wqe *wqe,
 194                      u16 cons_idx, struct hinic_sge *sge);
 195
 196void hinic_rq_prepare_wqe(struct hinic_rq *rq, u16 prod_idx,
 197                          struct hinic_rq_wqe *wqe, struct hinic_sge *sge);
 198
 199void hinic_rq_update(struct hinic_rq *rq, u16 prod_idx);
 200
 201#endif
 202