1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41#include <linux/gcd.h>
42#include <linux/kernel.h>
43#include <linux/module.h>
44#include <linux/spinlock.h>
45#include <linux/interrupt.h>
46#include <linux/dma-mapping.h>
47#include <linux/io.h>
48#include <linux/slab.h>
49#include <linux/usb.h>
50
51#include <linux/usb/hcd.h>
52#include <linux/usb/ch11.h>
53
54#include "core.h"
55#include "hcd.h"
56
57
58#define DWC2_UNRESERVE_DELAY (msecs_to_jiffies(5))
59
60
61
62
63
64
65
66
67
68static int dwc2_periodic_channel_available(struct dwc2_hsotg *hsotg)
69{
70
71
72
73
74
75 int status;
76 int num_channels;
77
78 num_channels = hsotg->params.host_channels;
79 if ((hsotg->periodic_channels + hsotg->non_periodic_channels <
80 num_channels) && (hsotg->periodic_channels < num_channels - 1)) {
81 status = 0;
82 } else {
83 dev_dbg(hsotg->dev,
84 "%s: Total channels: %d, Periodic: %d, Non-periodic: %d\n",
85 __func__, num_channels,
86 hsotg->periodic_channels, hsotg->non_periodic_channels);
87 status = -ENOSPC;
88 }
89
90 return status;
91}
92
93
94
95
96
97
98
99
100
101
102
103
104
105static int dwc2_check_periodic_bandwidth(struct dwc2_hsotg *hsotg,
106 struct dwc2_qh *qh)
107{
108 int status;
109 s16 max_claimed_usecs;
110
111 status = 0;
112
113 if (qh->dev_speed == USB_SPEED_HIGH || qh->do_split) {
114
115
116
117
118 max_claimed_usecs = 100 - qh->host_us;
119 } else {
120
121
122
123
124 max_claimed_usecs = 900 - qh->host_us;
125 }
126
127 if (hsotg->periodic_usecs > max_claimed_usecs) {
128 dev_err(hsotg->dev,
129 "%s: already claimed usecs %d, required usecs %d\n",
130 __func__, hsotg->periodic_usecs, qh->host_us);
131 status = -ENOSPC;
132 }
133
134 return status;
135}
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228static int pmap_schedule(unsigned long *map, int bits_per_period,
229 int periods_in_map, int num_bits,
230 int interval, int start, bool only_one_period)
231{
232 int interval_bits;
233 int to_reserve;
234 int first_end;
235 int i;
236
237 if (num_bits > bits_per_period)
238 return -ENOSPC;
239
240
241 interval = gcd(interval, periods_in_map);
242
243 interval_bits = bits_per_period * interval;
244 to_reserve = periods_in_map / interval;
245
246
247 if (start >= interval_bits)
248 return -ENOSPC;
249
250 if (only_one_period)
251
252 first_end = (start / bits_per_period + 1) * bits_per_period;
253 else
254
255 first_end = interval_bits;
256
257
258
259
260
261
262
263 while (start + num_bits <= first_end) {
264 int end;
265
266
267 end = (start / bits_per_period + 1) * bits_per_period;
268
269
270 start = bitmap_find_next_zero_area(map, end, start, num_bits,
271 0);
272
273
274
275
276
277
278 if (start >= end) {
279 start = end;
280 continue;
281 }
282
283
284 for (i = 1; i < to_reserve; i++) {
285 int ith_start = start + interval_bits * i;
286 int ith_end = end + interval_bits * i;
287 int ret;
288
289
290 ret = bitmap_find_next_zero_area(
291 map, ith_start + num_bits, ith_start, num_bits,
292 0);
293
294
295 if (ret == ith_start)
296 continue;
297
298
299 ith_start = bitmap_find_next_zero_area(
300 map, ith_end, ith_start, num_bits, 0);
301 if (ith_start >= ith_end)
302
303 start = end;
304 else
305 start = ith_start - interval_bits * i;
306 break;
307 }
308
309
310 if (i == to_reserve)
311 break;
312 }
313
314 if (start + num_bits > first_end)
315 return -ENOSPC;
316
317 for (i = 0; i < to_reserve; i++) {
318 int ith_start = start + interval_bits * i;
319
320 bitmap_set(map, ith_start, num_bits);
321 }
322
323 return start;
324}
325
326
327
328
329
330
331
332
333
334
335
336static void pmap_unschedule(unsigned long *map, int bits_per_period,
337 int periods_in_map, int num_bits,
338 int interval, int start)
339{
340 int interval_bits;
341 int to_release;
342 int i;
343
344
345 interval = gcd(interval, periods_in_map);
346
347 interval_bits = bits_per_period * interval;
348 to_release = periods_in_map / interval;
349
350 for (i = 0; i < to_release; i++) {
351 int ith_start = start + interval_bits * i;
352
353 bitmap_clear(map, ith_start, num_bits);
354 }
355}
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370static unsigned long *dwc2_get_ls_map(struct dwc2_hsotg *hsotg,
371 struct dwc2_qh *qh)
372{
373 unsigned long *map;
374
375
376 if (WARN_ON(!qh->dwc_tt))
377 return NULL;
378
379
380 map = qh->dwc_tt->periodic_bitmaps;
381 if (qh->dwc_tt->usb_tt->multi)
382 map += DWC2_ELEMENTS_PER_LS_BITMAP * qh->ttport;
383
384 return map;
385}
386
387#ifdef DWC2_PRINT_SCHEDULE
388
389
390
391
392
393
394
395
396
397
398
399
400static __printf(3, 4)
401void cat_printf(char **buf, size_t *size, const char *fmt, ...)
402{
403 va_list args;
404 int i;
405
406 if (*size == 0)
407 return;
408
409 va_start(args, fmt);
410 i = vsnprintf(*buf, *size, fmt, args);
411 va_end(args);
412
413 if (i >= *size) {
414 (*buf)[*size - 1] = '\0';
415 *buf += *size;
416 *size = 0;
417 } else {
418 *buf += i;
419 *size -= i;
420 }
421}
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436static void pmap_print(unsigned long *map, int bits_per_period,
437 int periods_in_map, const char *period_name,
438 const char *units,
439 void (*print_fn)(const char *str, void *data),
440 void *print_data)
441{
442 int period;
443
444 for (period = 0; period < periods_in_map; period++) {
445 char tmp[64];
446 char *buf = tmp;
447 size_t buf_size = sizeof(tmp);
448 int period_start = period * bits_per_period;
449 int period_end = period_start + bits_per_period;
450 int start = 0;
451 int count = 0;
452 bool printed = false;
453 int i;
454
455 for (i = period_start; i < period_end + 1; i++) {
456
457 if (i < period_end &&
458 bitmap_find_next_zero_area(map, i + 1,
459 i, 1, 0) != i) {
460 if (count == 0)
461 start = i - period_start;
462 count++;
463 continue;
464 }
465
466
467 if (count == 0)
468 continue;
469
470 if (!printed)
471 cat_printf(&buf, &buf_size, "%s %d: ",
472 period_name, period);
473 else
474 cat_printf(&buf, &buf_size, ", ");
475 printed = true;
476
477 cat_printf(&buf, &buf_size, "%d %s -%3d %s", start,
478 units, start + count - 1, units);
479 count = 0;
480 }
481
482 if (printed)
483 print_fn(tmp, print_data);
484 }
485}
486
487struct dwc2_qh_print_data {
488 struct dwc2_hsotg *hsotg;
489 struct dwc2_qh *qh;
490};
491
492
493
494
495
496
497
498static void dwc2_qh_print(const char *str, void *data)
499{
500 struct dwc2_qh_print_data *print_data = data;
501
502 dwc2_sch_dbg(print_data->hsotg, "QH=%p ...%s\n", print_data->qh, str);
503}
504
505
506
507
508
509
510
511static void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
512 struct dwc2_qh *qh)
513{
514 struct dwc2_qh_print_data print_data = { hsotg, qh };
515 int i;
516
517
518
519
520
521
522
523 if (qh->schedule_low_speed) {
524 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
525
526 dwc2_sch_dbg(hsotg, "QH=%p LS/FS trans: %d=>%d us @ %d us",
527 qh, qh->device_us,
528 DWC2_ROUND_US_TO_SLICE(qh->device_us),
529 DWC2_US_PER_SLICE * qh->ls_start_schedule_slice);
530
531 if (map) {
532 dwc2_sch_dbg(hsotg,
533 "QH=%p Whole low/full speed map %p now:\n",
534 qh, map);
535 pmap_print(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,
536 DWC2_LS_SCHEDULE_FRAMES, "Frame ", "slices",
537 dwc2_qh_print, &print_data);
538 }
539 }
540
541 for (i = 0; i < qh->num_hs_transfers; i++) {
542 struct dwc2_hs_transfer_time *trans_time = qh->hs_transfers + i;
543 int uframe = trans_time->start_schedule_us /
544 DWC2_HS_PERIODIC_US_PER_UFRAME;
545 int rel_us = trans_time->start_schedule_us %
546 DWC2_HS_PERIODIC_US_PER_UFRAME;
547
548 dwc2_sch_dbg(hsotg,
549 "QH=%p HS trans #%d: %d us @ uFrame %d + %d us\n",
550 qh, i, trans_time->duration_us, uframe, rel_us);
551 }
552 if (qh->num_hs_transfers) {
553 dwc2_sch_dbg(hsotg, "QH=%p Whole high speed map now:\n", qh);
554 pmap_print(hsotg->hs_periodic_bitmap,
555 DWC2_HS_PERIODIC_US_PER_UFRAME,
556 DWC2_HS_SCHEDULE_UFRAMES, "uFrame", "us",
557 dwc2_qh_print, &print_data);
558 }
559}
560#else
561static inline void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
562 struct dwc2_qh *qh) {};
563#endif
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580static int dwc2_ls_pmap_schedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
581 int search_slice)
582{
583 int slices = DIV_ROUND_UP(qh->device_us, DWC2_US_PER_SLICE);
584 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
585 int slice;
586
587 if (!map)
588 return -EINVAL;
589
590
591
592
593
594
595
596
597
598
599
600
601
602 slice = pmap_schedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,
603 DWC2_LS_SCHEDULE_FRAMES, slices,
604 qh->device_interval, search_slice, false);
605
606 if (slice < 0)
607 return slice;
608
609 qh->ls_start_schedule_slice = slice;
610 return 0;
611}
612
613
614
615
616
617
618
619static void dwc2_ls_pmap_unschedule(struct dwc2_hsotg *hsotg,
620 struct dwc2_qh *qh)
621{
622 int slices = DIV_ROUND_UP(qh->device_us, DWC2_US_PER_SLICE);
623 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
624
625
626 if (!map)
627 return;
628
629 pmap_unschedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,
630 DWC2_LS_SCHEDULE_FRAMES, slices, qh->device_interval,
631 qh->ls_start_schedule_slice);
632}
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654static int dwc2_hs_pmap_schedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
655 bool only_one_period, int index)
656{
657 struct dwc2_hs_transfer_time *trans_time = qh->hs_transfers + index;
658 int us;
659
660 us = pmap_schedule(hsotg->hs_periodic_bitmap,
661 DWC2_HS_PERIODIC_US_PER_UFRAME,
662 DWC2_HS_SCHEDULE_UFRAMES, trans_time->duration_us,
663 qh->host_interval, trans_time->start_schedule_us,
664 only_one_period);
665
666 if (us < 0)
667 return us;
668
669 trans_time->start_schedule_us = us;
670 return 0;
671}
672
673
674
675
676
677
678
679static void dwc2_hs_pmap_unschedule(struct dwc2_hsotg *hsotg,
680 struct dwc2_qh *qh, int index)
681{
682 struct dwc2_hs_transfer_time *trans_time = qh->hs_transfers + index;
683
684 pmap_unschedule(hsotg->hs_periodic_bitmap,
685 DWC2_HS_PERIODIC_US_PER_UFRAME,
686 DWC2_HS_SCHEDULE_UFRAMES, trans_time->duration_us,
687 qh->host_interval, trans_time->start_schedule_us);
688}
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703static int dwc2_uframe_schedule_split(struct dwc2_hsotg *hsotg,
704 struct dwc2_qh *qh)
705{
706 int bytecount = dwc2_hb_mult(qh->maxp) * dwc2_max_packet(qh->maxp);
707 int ls_search_slice;
708 int err = 0;
709 int host_interval_in_sched;
710
711
712
713
714
715 host_interval_in_sched = gcd(qh->host_interval,
716 DWC2_HS_SCHEDULE_UFRAMES);
717
718
719
720
721
722
723
724
725
726
727
728
729 ls_search_slice = 0;
730
731 while (ls_search_slice < DWC2_LS_SCHEDULE_SLICES) {
732 int start_s_uframe;
733 int ssplit_s_uframe;
734 int second_s_uframe;
735 int rel_uframe;
736 int first_count;
737 int middle_count;
738 int end_count;
739 int first_data_bytes;
740 int other_data_bytes;
741 int i;
742
743 if (qh->schedule_low_speed) {
744 err = dwc2_ls_pmap_schedule(hsotg, qh, ls_search_slice);
745
746
747
748
749
750
751
752 if (err)
753 return err;
754 } else {
755
756 WARN_ON_ONCE(1);
757 }
758
759
760
761
762
763 start_s_uframe = qh->ls_start_schedule_slice /
764 DWC2_SLICES_PER_UFRAME;
765
766
767 rel_uframe = (start_s_uframe % 8);
768
769
770
771
772
773
774
775
776
777 if (rel_uframe == 7) {
778 if (qh->schedule_low_speed)
779 dwc2_ls_pmap_unschedule(hsotg, qh);
780 ls_search_slice =
781 (qh->ls_start_schedule_slice /
782 DWC2_LS_PERIODIC_SLICES_PER_FRAME + 1) *
783 DWC2_LS_PERIODIC_SLICES_PER_FRAME;
784 continue;
785 }
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818 ssplit_s_uframe = (start_s_uframe +
819 host_interval_in_sched - 1) %
820 host_interval_in_sched;
821 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC && !qh->ep_is_in)
822 second_s_uframe = start_s_uframe;
823 else
824 second_s_uframe = start_s_uframe + 1;
825
826
827 first_data_bytes = 188 -
828 DIV_ROUND_UP(188 * (qh->ls_start_schedule_slice %
829 DWC2_SLICES_PER_UFRAME),
830 DWC2_SLICES_PER_UFRAME);
831 if (first_data_bytes > bytecount)
832 first_data_bytes = bytecount;
833 other_data_bytes = bytecount - first_data_bytes;
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850 if (!qh->ep_is_in &&
851 (first_data_bytes != min_t(int, 188, bytecount))) {
852 dwc2_sch_dbg(hsotg,
853 "QH=%p avoiding broken 1st xfer (%d, %d)\n",
854 qh, first_data_bytes, bytecount);
855 if (qh->schedule_low_speed)
856 dwc2_ls_pmap_unschedule(hsotg, qh);
857 ls_search_slice = (start_s_uframe + 1) *
858 DWC2_SLICES_PER_UFRAME;
859 continue;
860 }
861
862
863 qh->num_hs_transfers = 1 + DIV_ROUND_UP(other_data_bytes, 188);
864
865
866
867
868
869
870 if (qh->ep_type == USB_ENDPOINT_XFER_INT) {
871 if (rel_uframe == 6)
872 qh->num_hs_transfers += 2;
873 else
874 qh->num_hs_transfers += 3;
875
876 if (qh->ep_is_in) {
877
878
879
880
881 first_count = 4;
882 middle_count = bytecount;
883 end_count = bytecount;
884 } else {
885
886
887
888
889
890 first_count = first_data_bytes;
891 middle_count = max_t(int, 4, other_data_bytes);
892 end_count = 4;
893 }
894 } else {
895 if (qh->ep_is_in) {
896 int last;
897
898
899 qh->num_hs_transfers++;
900
901
902 last = rel_uframe + qh->num_hs_transfers + 1;
903
904
905 if (last <= 6)
906 qh->num_hs_transfers += 2;
907 else
908 qh->num_hs_transfers += 1;
909
910
911 if (last >= 6 && rel_uframe == 0)
912 qh->num_hs_transfers--;
913
914
915 first_count = 4;
916 middle_count = min_t(int, 188, bytecount);
917 end_count = middle_count;
918 } else {
919
920 first_count = first_data_bytes;
921 middle_count = min_t(int, 188,
922 other_data_bytes);
923 end_count = other_data_bytes % 188;
924 }
925 }
926
927
928 qh->hs_transfers[0].duration_us = HS_USECS_ISO(first_count);
929 for (i = 1; i < qh->num_hs_transfers - 1; i++)
930 qh->hs_transfers[i].duration_us =
931 HS_USECS_ISO(middle_count);
932 if (qh->num_hs_transfers > 1)
933 qh->hs_transfers[qh->num_hs_transfers - 1].duration_us =
934 HS_USECS_ISO(end_count);
935
936
937
938
939
940
941 qh->hs_transfers[0].start_schedule_us =
942 ssplit_s_uframe * DWC2_HS_PERIODIC_US_PER_UFRAME;
943 for (i = 1; i < qh->num_hs_transfers; i++)
944 qh->hs_transfers[i].start_schedule_us =
945 ((second_s_uframe + i - 1) %
946 DWC2_HS_SCHEDULE_UFRAMES) *
947 DWC2_HS_PERIODIC_US_PER_UFRAME;
948
949
950 for (i = 0; i < qh->num_hs_transfers; i++) {
951 err = dwc2_hs_pmap_schedule(hsotg, qh, true, i);
952 if (err)
953 break;
954 }
955
956
957 if (i == qh->num_hs_transfers)
958 break;
959
960 for (; i >= 0; i--)
961 dwc2_hs_pmap_unschedule(hsotg, qh, i);
962
963 if (qh->schedule_low_speed)
964 dwc2_ls_pmap_unschedule(hsotg, qh);
965
966
967 ls_search_slice = (start_s_uframe + 1) * DWC2_SLICES_PER_UFRAME;
968 }
969
970 if (ls_search_slice >= DWC2_LS_SCHEDULE_SLICES)
971 return -ENOSPC;
972
973 return 0;
974}
975
976
977
978
979
980
981
982
983
984
985static int dwc2_uframe_schedule_hs(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
986{
987
988 WARN_ON(qh->host_us != qh->device_us);
989 WARN_ON(qh->host_interval != qh->device_interval);
990 WARN_ON(qh->num_hs_transfers != 1);
991
992
993 qh->hs_transfers[0].start_schedule_us = 0;
994 qh->hs_transfers[0].duration_us = qh->host_us;
995
996 return dwc2_hs_pmap_schedule(hsotg, qh, false, 0);
997}
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008static int dwc2_uframe_schedule_ls(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1009{
1010
1011 WARN_ON(qh->host_us != qh->device_us);
1012 WARN_ON(qh->host_interval != qh->device_interval);
1013 WARN_ON(!qh->schedule_low_speed);
1014
1015
1016 return dwc2_ls_pmap_schedule(hsotg, qh, 0);
1017}
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028static int dwc2_uframe_schedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1029{
1030 int ret;
1031
1032 if (qh->dev_speed == USB_SPEED_HIGH)
1033 ret = dwc2_uframe_schedule_hs(hsotg, qh);
1034 else if (!qh->do_split)
1035 ret = dwc2_uframe_schedule_ls(hsotg, qh);
1036 else
1037 ret = dwc2_uframe_schedule_split(hsotg, qh);
1038
1039 if (ret)
1040 dwc2_sch_dbg(hsotg, "QH=%p Failed to schedule %d\n", qh, ret);
1041 else
1042 dwc2_qh_schedule_print(hsotg, qh);
1043
1044 return ret;
1045}
1046
1047
1048
1049
1050
1051
1052
1053static void dwc2_uframe_unschedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1054{
1055 int i;
1056
1057 for (i = 0; i < qh->num_hs_transfers; i++)
1058 dwc2_hs_pmap_unschedule(hsotg, qh, i);
1059
1060 if (qh->schedule_low_speed)
1061 dwc2_ls_pmap_unschedule(hsotg, qh);
1062
1063 dwc2_sch_dbg(hsotg, "QH=%p Unscheduled\n", qh);
1064}
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081static void dwc2_pick_first_frame(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1082{
1083 u16 frame_number;
1084 u16 earliest_frame;
1085 u16 next_active_frame;
1086 u16 relative_frame;
1087 u16 interval;
1088
1089
1090
1091
1092
1093 frame_number = dwc2_hcd_get_frame_number(hsotg);
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103 earliest_frame = dwc2_frame_num_inc(frame_number, 1);
1104 next_active_frame = earliest_frame;
1105
1106
1107 if (!hsotg->params.uframe_sched) {
1108 if (qh->do_split)
1109
1110 next_active_frame |= 0x7;
1111 goto exit;
1112 }
1113
1114 if (qh->dev_speed == USB_SPEED_HIGH || qh->do_split) {
1115
1116
1117
1118
1119
1120
1121 WARN_ON(qh->num_hs_transfers < 1);
1122
1123 relative_frame = qh->hs_transfers[0].start_schedule_us /
1124 DWC2_HS_PERIODIC_US_PER_UFRAME;
1125
1126
1127 interval = gcd(qh->host_interval, DWC2_HS_SCHEDULE_UFRAMES);
1128
1129 } else {
1130
1131
1132
1133
1134
1135
1136
1137 relative_frame = qh->ls_start_schedule_slice /
1138 DWC2_LS_PERIODIC_SLICES_PER_FRAME;
1139 interval = gcd(qh->host_interval, DWC2_LS_SCHEDULE_FRAMES);
1140 }
1141
1142
1143 WARN_ON(relative_frame >= interval);
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153 next_active_frame = (next_active_frame / interval) * interval;
1154
1155
1156
1157
1158
1159 next_active_frame = dwc2_frame_num_inc(next_active_frame,
1160 relative_frame);
1161
1162
1163
1164
1165
1166
1167 next_active_frame = dwc2_frame_num_dec(next_active_frame, 1);
1168
1169
1170
1171
1172
1173 while (dwc2_frame_num_gt(earliest_frame, next_active_frame))
1174 next_active_frame = dwc2_frame_num_inc(next_active_frame,
1175 interval);
1176
1177exit:
1178 qh->next_active_frame = next_active_frame;
1179 qh->start_active_frame = next_active_frame;
1180
1181 dwc2_sch_vdbg(hsotg, "QH=%p First fn=%04x nxt=%04x\n",
1182 qh, frame_number, qh->next_active_frame);
1183}
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1197{
1198 int status;
1199
1200 if (hsotg->params.uframe_sched) {
1201 status = dwc2_uframe_schedule(hsotg, qh);
1202 } else {
1203 status = dwc2_periodic_channel_available(hsotg);
1204 if (status) {
1205 dev_info(hsotg->dev,
1206 "%s: No host channel available for periodic transfer\n",
1207 __func__);
1208 return status;
1209 }
1210
1211 status = dwc2_check_periodic_bandwidth(hsotg, qh);
1212 }
1213
1214 if (status) {
1215 dev_dbg(hsotg->dev,
1216 "%s: Insufficient periodic bandwidth for periodic transfer\n",
1217 __func__);
1218 return status;
1219 }
1220
1221 if (!hsotg->params.uframe_sched)
1222
1223 hsotg->periodic_channels++;
1224
1225
1226 hsotg->periodic_usecs += qh->host_us;
1227
1228 dwc2_pick_first_frame(hsotg, qh);
1229
1230 return 0;
1231}
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242static void dwc2_do_unreserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1243{
1244 assert_spin_locked(&hsotg->lock);
1245
1246 WARN_ON(!qh->unreserve_pending);
1247
1248
1249 qh->unreserve_pending = false;
1250
1251 if (WARN_ON(!list_empty(&qh->qh_list_entry)))
1252 list_del_init(&qh->qh_list_entry);
1253
1254
1255 hsotg->periodic_usecs -= qh->host_us;
1256
1257 if (hsotg->params.uframe_sched) {
1258 dwc2_uframe_unschedule(hsotg, qh);
1259 } else {
1260
1261 hsotg->periodic_channels--;
1262 }
1263}
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277static void dwc2_unreserve_timer_fn(unsigned long data)
1278{
1279 struct dwc2_qh *qh = (struct dwc2_qh *)data;
1280 struct dwc2_hsotg *hsotg = qh->hsotg;
1281 unsigned long flags;
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292 while (!spin_trylock_irqsave(&hsotg->lock, flags)) {
1293 if (timer_pending(&qh->unreserve_timer))
1294 return;
1295 }
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307 if (qh->unreserve_pending)
1308 dwc2_do_unreserve(hsotg, qh);
1309
1310 spin_unlock_irqrestore(&hsotg->lock, flags);
1311}
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323static int dwc2_check_max_xfer_size(struct dwc2_hsotg *hsotg,
1324 struct dwc2_qh *qh)
1325{
1326 u32 max_xfer_size;
1327 u32 max_channel_xfer_size;
1328 int status = 0;
1329
1330 max_xfer_size = dwc2_max_packet(qh->maxp) * dwc2_hb_mult(qh->maxp);
1331 max_channel_xfer_size = hsotg->params.max_transfer_size;
1332
1333 if (max_xfer_size > max_channel_xfer_size) {
1334 dev_err(hsotg->dev,
1335 "%s: Periodic xfer length %d > max xfer length for channel %d\n",
1336 __func__, max_xfer_size, max_channel_xfer_size);
1337 status = -ENOSPC;
1338 }
1339
1340 return status;
1341}
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1354{
1355 int status;
1356
1357 status = dwc2_check_max_xfer_size(hsotg, qh);
1358 if (status) {
1359 dev_dbg(hsotg->dev,
1360 "%s: Channel max transfer size too small for periodic transfer\n",
1361 __func__);
1362 return status;
1363 }
1364
1365
1366 if (del_timer(&qh->unreserve_timer))
1367 WARN_ON(!qh->unreserve_pending);
1368
1369
1370
1371
1372
1373
1374
1375
1376 if (!qh->unreserve_pending) {
1377 status = dwc2_do_reserve(hsotg, qh);
1378 if (status)
1379 return status;
1380 } else {
1381
1382
1383
1384
1385
1386
1387 if (dwc2_frame_num_le(qh->next_active_frame,
1388 hsotg->frame_number))
1389 dwc2_pick_first_frame(hsotg, qh);
1390 }
1391
1392 qh->unreserve_pending = 0;
1393
1394 if (hsotg->params.dma_desc_enable)
1395
1396 list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready);
1397 else
1398
1399 list_add_tail(&qh->qh_list_entry,
1400 &hsotg->periodic_sched_inactive);
1401
1402 return 0;
1403}
1404
1405
1406
1407
1408
1409
1410
1411
1412static void dwc2_deschedule_periodic(struct dwc2_hsotg *hsotg,
1413 struct dwc2_qh *qh)
1414{
1415 bool did_modify;
1416
1417 assert_spin_locked(&hsotg->lock);
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434 did_modify = mod_timer(&qh->unreserve_timer,
1435 jiffies + DWC2_UNRESERVE_DELAY + 1);
1436 WARN_ON(did_modify);
1437 qh->unreserve_pending = 1;
1438
1439 list_del_init(&qh->qh_list_entry);
1440}
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1452 struct dwc2_hcd_urb *urb, gfp_t mem_flags)
1453{
1454 int dev_speed = dwc2_host_get_speed(hsotg, urb->priv);
1455 u8 ep_type = dwc2_hcd_get_pipe_type(&urb->pipe_info);
1456 bool ep_is_in = !!dwc2_hcd_is_pipe_in(&urb->pipe_info);
1457 bool ep_is_isoc = (ep_type == USB_ENDPOINT_XFER_ISOC);
1458 bool ep_is_int = (ep_type == USB_ENDPOINT_XFER_INT);
1459 u32 hprt = dwc2_readl(hsotg->regs + HPRT0);
1460 u32 prtspd = (hprt & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT;
1461 bool do_split = (prtspd == HPRT0_SPD_HIGH_SPEED &&
1462 dev_speed != USB_SPEED_HIGH);
1463 int maxp = dwc2_hcd_get_mps(&urb->pipe_info);
1464 int bytecount = dwc2_hb_mult(maxp) * dwc2_max_packet(maxp);
1465 char *speed, *type;
1466
1467
1468 qh->hsotg = hsotg;
1469 setup_timer(&qh->unreserve_timer, dwc2_unreserve_timer_fn,
1470 (unsigned long)qh);
1471 qh->ep_type = ep_type;
1472 qh->ep_is_in = ep_is_in;
1473
1474 qh->data_toggle = DWC2_HC_PID_DATA0;
1475 qh->maxp = maxp;
1476 INIT_LIST_HEAD(&qh->qtd_list);
1477 INIT_LIST_HEAD(&qh->qh_list_entry);
1478
1479 qh->do_split = do_split;
1480 qh->dev_speed = dev_speed;
1481
1482 if (ep_is_int || ep_is_isoc) {
1483
1484 int host_speed = do_split ? USB_SPEED_HIGH : dev_speed;
1485 struct dwc2_tt *dwc_tt = dwc2_host_get_tt_info(hsotg, urb->priv,
1486 mem_flags,
1487 &qh->ttport);
1488 int device_ns;
1489
1490 qh->dwc_tt = dwc_tt;
1491
1492 qh->host_us = NS_TO_US(usb_calc_bus_time(host_speed, ep_is_in,
1493 ep_is_isoc, bytecount));
1494 device_ns = usb_calc_bus_time(dev_speed, ep_is_in,
1495 ep_is_isoc, bytecount);
1496
1497 if (do_split && dwc_tt)
1498 device_ns += dwc_tt->usb_tt->think_time;
1499 qh->device_us = NS_TO_US(device_ns);
1500
1501 qh->device_interval = urb->interval;
1502 qh->host_interval = urb->interval * (do_split ? 8 : 1);
1503
1504
1505
1506
1507
1508
1509 qh->schedule_low_speed = prtspd != HPRT0_SPD_HIGH_SPEED ||
1510 dwc_tt;
1511
1512 if (do_split) {
1513
1514 qh->num_hs_transfers = -1;
1515 } else if (dev_speed == USB_SPEED_HIGH) {
1516 qh->num_hs_transfers = 1;
1517 } else {
1518 qh->num_hs_transfers = 0;
1519 }
1520
1521
1522 }
1523
1524 switch (dev_speed) {
1525 case USB_SPEED_LOW:
1526 speed = "low";
1527 break;
1528 case USB_SPEED_FULL:
1529 speed = "full";
1530 break;
1531 case USB_SPEED_HIGH:
1532 speed = "high";
1533 break;
1534 default:
1535 speed = "?";
1536 break;
1537 }
1538
1539 switch (qh->ep_type) {
1540 case USB_ENDPOINT_XFER_ISOC:
1541 type = "isochronous";
1542 break;
1543 case USB_ENDPOINT_XFER_INT:
1544 type = "interrupt";
1545 break;
1546 case USB_ENDPOINT_XFER_CONTROL:
1547 type = "control";
1548 break;
1549 case USB_ENDPOINT_XFER_BULK:
1550 type = "bulk";
1551 break;
1552 default:
1553 type = "?";
1554 break;
1555 }
1556
1557 dwc2_sch_dbg(hsotg, "QH=%p Init %s, %s speed, %d bytes:\n", qh, type,
1558 speed, bytecount);
1559 dwc2_sch_dbg(hsotg, "QH=%p ...addr=%d, ep=%d, %s\n", qh,
1560 dwc2_hcd_get_dev_addr(&urb->pipe_info),
1561 dwc2_hcd_get_ep_num(&urb->pipe_info),
1562 ep_is_in ? "IN" : "OUT");
1563 if (ep_is_int || ep_is_isoc) {
1564 dwc2_sch_dbg(hsotg,
1565 "QH=%p ...duration: host=%d us, device=%d us\n",
1566 qh, qh->host_us, qh->device_us);
1567 dwc2_sch_dbg(hsotg, "QH=%p ...interval: host=%d, device=%d\n",
1568 qh, qh->host_interval, qh->device_interval);
1569 if (qh->schedule_low_speed)
1570 dwc2_sch_dbg(hsotg, "QH=%p ...low speed schedule=%p\n",
1571 qh, dwc2_get_ls_map(hsotg, qh));
1572 }
1573}
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
1586 struct dwc2_hcd_urb *urb,
1587 gfp_t mem_flags)
1588{
1589 struct dwc2_qh *qh;
1590
1591 if (!urb->priv)
1592 return NULL;
1593
1594
1595 qh = kzalloc(sizeof(*qh), mem_flags);
1596 if (!qh)
1597 return NULL;
1598
1599 dwc2_qh_init(hsotg, qh, urb, mem_flags);
1600
1601 if (hsotg->params.dma_desc_enable &&
1602 dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) {
1603 dwc2_hcd_qh_free(hsotg, qh);
1604 return NULL;
1605 }
1606
1607 return qh;
1608}
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1622{
1623
1624 if (del_timer_sync(&qh->unreserve_timer)) {
1625 unsigned long flags;
1626
1627 spin_lock_irqsave(&hsotg->lock, flags);
1628 dwc2_do_unreserve(hsotg, qh);
1629 spin_unlock_irqrestore(&hsotg->lock, flags);
1630 }
1631 dwc2_host_put_tt_info(hsotg, qh->dwc_tt);
1632
1633 if (qh->desc_list)
1634 dwc2_hcd_qh_free_ddma(hsotg, qh);
1635 kfree(qh);
1636}
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648int dwc2_hcd_qh_add(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1649{
1650 int status;
1651 u32 intr_mask;
1652
1653 if (dbg_qh(qh))
1654 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1655
1656 if (!list_empty(&qh->qh_list_entry))
1657
1658 return 0;
1659
1660
1661 if (dwc2_qh_is_non_per(qh)) {
1662
1663 qh->start_active_frame = hsotg->frame_number;
1664 qh->next_active_frame = qh->start_active_frame;
1665
1666
1667 list_add_tail(&qh->qh_list_entry,
1668 &hsotg->non_periodic_sched_inactive);
1669 return 0;
1670 }
1671
1672 status = dwc2_schedule_periodic(hsotg, qh);
1673 if (status)
1674 return status;
1675 if (!hsotg->periodic_qh_count) {
1676 intr_mask = dwc2_readl(hsotg->regs + GINTMSK);
1677 intr_mask |= GINTSTS_SOF;
1678 dwc2_writel(intr_mask, hsotg->regs + GINTMSK);
1679 }
1680 hsotg->periodic_qh_count++;
1681
1682 return 0;
1683}
1684
1685
1686
1687
1688
1689
1690
1691
1692void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1693{
1694 u32 intr_mask;
1695
1696 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1697
1698 if (list_empty(&qh->qh_list_entry))
1699
1700 return;
1701
1702 if (dwc2_qh_is_non_per(qh)) {
1703 if (hsotg->non_periodic_qh_ptr == &qh->qh_list_entry)
1704 hsotg->non_periodic_qh_ptr =
1705 hsotg->non_periodic_qh_ptr->next;
1706 list_del_init(&qh->qh_list_entry);
1707 return;
1708 }
1709
1710 dwc2_deschedule_periodic(hsotg, qh);
1711 hsotg->periodic_qh_count--;
1712 if (!hsotg->periodic_qh_count &&
1713 !hsotg->params.dma_desc_enable) {
1714 intr_mask = dwc2_readl(hsotg->regs + GINTMSK);
1715 intr_mask &= ~GINTSTS_SOF;
1716 dwc2_writel(intr_mask, hsotg->regs + GINTMSK);
1717 }
1718}
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739static int dwc2_next_for_periodic_split(struct dwc2_hsotg *hsotg,
1740 struct dwc2_qh *qh, u16 frame_number)
1741{
1742 u16 old_frame = qh->next_active_frame;
1743 u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1);
1744 int missed = 0;
1745 u16 incr;
1746
1747
1748
1749
1750
1751
1752
1753 if (old_frame == qh->start_active_frame &&
1754 !(qh->ep_type == USB_ENDPOINT_XFER_ISOC && !qh->ep_is_in))
1755 incr = 2;
1756 else
1757 incr = 1;
1758
1759 qh->next_active_frame = dwc2_frame_num_inc(old_frame, incr);
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769 if (dwc2_frame_num_gt(prev_frame_number, qh->next_active_frame)) {
1770
1771
1772
1773
1774 missed = dwc2_frame_num_dec(prev_frame_number,
1775 qh->next_active_frame);
1776 qh->next_active_frame = frame_number;
1777 }
1778
1779 return missed;
1780}
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802static int dwc2_next_periodic_start(struct dwc2_hsotg *hsotg,
1803 struct dwc2_qh *qh, u16 frame_number)
1804{
1805 int missed = 0;
1806 u16 interval = qh->host_interval;
1807 u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1);
1808
1809 qh->start_active_frame = dwc2_frame_num_inc(qh->start_active_frame,
1810 interval);
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820 if (interval >= 0x1000)
1821 goto exit;
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849 if (qh->start_active_frame == qh->next_active_frame ||
1850 dwc2_frame_num_gt(prev_frame_number, qh->start_active_frame)) {
1851 u16 ideal_start = qh->start_active_frame;
1852 int periods_in_map;
1853
1854
1855
1856
1857
1858 if (qh->do_split || qh->dev_speed == USB_SPEED_HIGH)
1859 periods_in_map = DWC2_HS_SCHEDULE_UFRAMES;
1860 else
1861 periods_in_map = DWC2_LS_SCHEDULE_FRAMES;
1862 interval = gcd(interval, periods_in_map);
1863
1864 do {
1865 qh->start_active_frame = dwc2_frame_num_inc(
1866 qh->start_active_frame, interval);
1867 } while (dwc2_frame_num_gt(prev_frame_number,
1868 qh->start_active_frame));
1869
1870 missed = dwc2_frame_num_dec(qh->start_active_frame,
1871 ideal_start);
1872 }
1873
1874exit:
1875 qh->next_active_frame = qh->start_active_frame;
1876
1877 return missed;
1878}
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1894 int sched_next_periodic_split)
1895{
1896 u16 old_frame = qh->next_active_frame;
1897 u16 frame_number;
1898 int missed;
1899
1900 if (dbg_qh(qh))
1901 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1902
1903 if (dwc2_qh_is_non_per(qh)) {
1904 dwc2_hcd_qh_unlink(hsotg, qh);
1905 if (!list_empty(&qh->qtd_list))
1906
1907 dwc2_hcd_qh_add(hsotg, qh);
1908 return;
1909 }
1910
1911
1912
1913
1914
1915
1916
1917 frame_number = dwc2_hcd_get_frame_number(hsotg);
1918
1919 if (sched_next_periodic_split)
1920 missed = dwc2_next_for_periodic_split(hsotg, qh, frame_number);
1921 else
1922 missed = dwc2_next_periodic_start(hsotg, qh, frame_number);
1923
1924 dwc2_sch_vdbg(hsotg,
1925 "QH=%p next(%d) fn=%04x, sch=%04x=>%04x (%+d) miss=%d %s\n",
1926 qh, sched_next_periodic_split, frame_number, old_frame,
1927 qh->next_active_frame,
1928 dwc2_frame_num_dec(qh->next_active_frame, old_frame),
1929 missed, missed ? "MISS" : "");
1930
1931 if (list_empty(&qh->qtd_list)) {
1932 dwc2_hcd_qh_unlink(hsotg, qh);
1933 return;
1934 }
1935
1936
1937
1938
1939
1940
1941
1942
1943 if (dwc2_frame_num_le(qh->next_active_frame, hsotg->frame_number))
1944 list_move_tail(&qh->qh_list_entry,
1945 &hsotg->periodic_sched_ready);
1946 else
1947 list_move_tail(&qh->qh_list_entry,
1948 &hsotg->periodic_sched_inactive);
1949}
1950
1951
1952
1953
1954
1955
1956
1957void dwc2_hcd_qtd_init(struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb)
1958{
1959 qtd->urb = urb;
1960 if (dwc2_hcd_get_pipe_type(&urb->pipe_info) ==
1961 USB_ENDPOINT_XFER_CONTROL) {
1962
1963
1964
1965
1966
1967 qtd->data_toggle = DWC2_HC_PID_DATA1;
1968 qtd->control_phase = DWC2_CONTROL_SETUP;
1969 }
1970
1971
1972 qtd->complete_split = 0;
1973 qtd->isoc_split_pos = DWC2_HCSPLT_XACTPOS_ALL;
1974 qtd->isoc_split_offset = 0;
1975 qtd->in_process = 0;
1976
1977
1978 urb->qtd = qtd;
1979}
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994int dwc2_hcd_qtd_add(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
1995 struct dwc2_qh *qh)
1996{
1997 int retval;
1998
1999 if (unlikely(!qh)) {
2000 dev_err(hsotg->dev, "%s: Invalid QH\n", __func__);
2001 retval = -EINVAL;
2002 goto fail;
2003 }
2004
2005 retval = dwc2_hcd_qh_add(hsotg, qh);
2006 if (retval)
2007 goto fail;
2008
2009 qtd->qh = qh;
2010 list_add_tail(&qtd->qtd_list_entry, &qh->qtd_list);
2011
2012 return 0;
2013fail:
2014 return retval;
2015}
2016