linux/arch/arm/mach-omap2/cm3xxx.h
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   1/*
   2 * OMAP2/3 Clock Management (CM) register definitions
   3 *
   4 * Copyright (C) 2007-2009 Texas Instruments, Inc.
   5 * Copyright (C) 2007-2010 Nokia Corporation
   6 * Paul Walmsley
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 *
  12 * The CM hardware modules on the OMAP2/3 are quite similar to each
  13 * other.  The CM modules/instances on OMAP4 are quite different, so
  14 * they are handled in a separate file.
  15 */
  16#ifndef __ARCH_ASM_MACH_OMAP2_CM3XXX_H
  17#define __ARCH_ASM_MACH_OMAP2_CM3XXX_H
  18
  19#include "prcm-common.h"
  20#include "cm2xxx_3xxx.h"
  21
  22#define OMAP34XX_CM_REGADDR(module, reg)                                \
  23                        OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
  24
  25
  26/*
  27 * OMAP3-specific global CM registers
  28 * Use cm_{read,write}_reg() with these registers.
  29 * These registers appear once per CM module.
  30 */
  31
  32#define OMAP3430_CM_SYSCONFIG           0x0010
  33#define OMAP3430_CM_POLCTRL             0x009c
  34
  35#define OMAP3_CM_CLKOUT_CTRL_OFFSET     0x0070
  36#define OMAP3430_CM_CLKOUT_CTRL         OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
  37
  38/*
  39 * Module specific CM register offsets from CM_BASE + domain offset
  40 * Use cm_{read,write}_mod_reg() with these registers.
  41 * These register offsets generally appear in more than one PRCM submodule.
  42 */
  43
  44/* OMAP3-specific register offsets */
  45
  46#define OMAP3430_CM_CLKEN_PLL                           0x0004
  47#define OMAP3430ES2_CM_CLKEN2                           0x0004
  48#define OMAP3430ES2_CM_FCLKEN3                          0x0008
  49#define OMAP3430_CM_IDLEST_PLL                          CM_IDLEST2
  50#define OMAP3430_CM_AUTOIDLE_PLL                        CM_AUTOIDLE2
  51#define OMAP3430ES2_CM_AUTOIDLE2_PLL                    CM_AUTOIDLE2
  52#define OMAP3430_CM_CLKSEL1                             CM_CLKSEL
  53#define OMAP3430_CM_CLKSEL1_PLL                         CM_CLKSEL
  54#define OMAP3430_CM_CLKSEL2_PLL                         CM_CLKSEL2
  55#define OMAP3430_CM_SLEEPDEP                            CM_CLKSEL2
  56#define OMAP3430_CM_CLKSEL3                             OMAP2_CM_CLKSTCTRL
  57#define OMAP3430_CM_CLKSTST                             0x004c
  58#define OMAP3430ES2_CM_CLKSEL4                          0x004c
  59#define OMAP3430ES2_CM_CLKSEL5                          0x0050
  60#define OMAP3430_CM_CLKSEL2_EMU                         0x0050
  61#define OMAP3430_CM_CLKSEL3_EMU                         0x0054
  62
  63
  64/* CM_IDLEST bit field values to indicate deasserted IdleReq */
  65
  66#define OMAP34XX_CM_IDLEST_VAL                          1
  67
  68
  69#ifndef __ASSEMBLER__
  70
  71extern void omap3_cm_save_context(void);
  72extern void omap3_cm_restore_context(void);
  73extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
  74
  75int __init omap3xxx_cm_init(const struct omap_prcm_init_data *data);
  76
  77#endif
  78
  79#endif
  80