linux/arch/mips/include/asm/mach-ath25/ath25_platform.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2#ifndef __ASM_MACH_ATH25_PLATFORM_H
   3#define __ASM_MACH_ATH25_PLATFORM_H
   4
   5#include <linux/etherdevice.h>
   6
   7/*
   8 * This is board-specific data that is stored in a "fixed" location in flash.
   9 * It is shared across operating systems, so it should not be changed lightly.
  10 * The main reason we need it is in order to extract the ethernet MAC
  11 * address(es).
  12 */
  13struct ath25_boarddata {
  14        u32 magic;                   /* board data is valid */
  15#define ATH25_BD_MAGIC 0x35333131    /* "5311", for all 531x/231x platforms */
  16        u16 cksum;                   /* checksum (starting with BD_REV 2) */
  17        u16 rev;                     /* revision of this struct */
  18#define BD_REV 4
  19        char board_name[64];         /* Name of board */
  20        u16 major;                   /* Board major number */
  21        u16 minor;                   /* Board minor number */
  22        u32 flags;                   /* Board configuration */
  23#define BD_ENET0        0x00000001   /* ENET0 is stuffed */
  24#define BD_ENET1        0x00000002   /* ENET1 is stuffed */
  25#define BD_UART1        0x00000004   /* UART1 is stuffed */
  26#define BD_UART0        0x00000008   /* UART0 is stuffed (dma) */
  27#define BD_RSTFACTORY   0x00000010   /* Reset factory defaults stuffed */
  28#define BD_SYSLED       0x00000020   /* System LED stuffed */
  29#define BD_EXTUARTCLK   0x00000040   /* External UART clock */
  30#define BD_CPUFREQ      0x00000080   /* cpu freq is valid in nvram */
  31#define BD_SYSFREQ      0x00000100   /* sys freq is set in nvram */
  32#define BD_WLAN0        0x00000200   /* Enable WLAN0 */
  33#define BD_MEMCAP       0x00000400   /* CAP SDRAM @ mem_cap for testing */
  34#define BD_DISWATCHDOG  0x00000800   /* disable system watchdog */
  35#define BD_WLAN1        0x00001000   /* Enable WLAN1 (ar5212) */
  36#define BD_ISCASPER     0x00002000   /* FLAG for AR2312 */
  37#define BD_WLAN0_2G_EN  0x00004000   /* FLAG for radio0_2G */
  38#define BD_WLAN0_5G_EN  0x00008000   /* FLAG for radio0_2G */
  39#define BD_WLAN1_2G_EN  0x00020000   /* FLAG for radio0_2G */
  40#define BD_WLAN1_5G_EN  0x00040000   /* FLAG for radio0_2G */
  41        u16 reset_config_gpio;       /* Reset factory GPIO pin */
  42        u16 sys_led_gpio;            /* System LED GPIO pin */
  43
  44        u32 cpu_freq;                /* CPU core frequency in Hz */
  45        u32 sys_freq;                /* System frequency in Hz */
  46        u32 cnt_freq;                /* Calculated C0_COUNT frequency */
  47
  48        u8  wlan0_mac[ETH_ALEN];
  49        u8  enet0_mac[ETH_ALEN];
  50        u8  enet1_mac[ETH_ALEN];
  51
  52        u16 pci_id;                  /* Pseudo PCIID for common code */
  53        u16 mem_cap;                 /* cap bank1 in MB */
  54
  55        /* version 3 */
  56        u8  wlan1_mac[ETH_ALEN];     /* (ar5212) */
  57};
  58
  59#define BOARD_CONFIG_BUFSZ              0x1000
  60
  61/*
  62 * Platform device information for the Wireless MAC
  63 */
  64struct ar231x_board_config {
  65        u16 devid;
  66
  67        /* board config data */
  68        struct ath25_boarddata *config;
  69
  70        /* radio calibration data */
  71        const char *radio;
  72};
  73
  74#endif /* __ASM_MACH_ATH25_PLATFORM_H */
  75