1
2#ifndef _UAPI_PARISC_PDC_H
3#define _UAPI_PARISC_PDC_H
4
5
6
7
8
9
10#define PDC_WARN 3
11#define PDC_REQ_ERR_1 2
12#define PDC_REQ_ERR_0 1
13#define PDC_OK 0
14#define PDC_BAD_PROC -1
15#define PDC_BAD_OPTION -2
16#define PDC_ERROR -3
17#define PDC_NE_MOD -5
18#define PDC_NE_CELL_MOD -7
19#define PDC_NE_BOOTDEV -9
20#define PDC_INVALID_ARG -10
21#define PDC_BUS_POW_WARN -12
22#define PDC_NOT_NARROW -17
23
24
25
26
27
28#define PDC_POW_FAIL 1
29#define PDC_POW_FAIL_PREPARE 0
30
31#define PDC_CHASSIS 2
32#define PDC_CHASSIS_DISP 0
33#define PDC_CHASSIS_WARN 1
34#define PDC_CHASSIS_DISPWARN 2
35#define PDC_RETURN_CHASSIS_INFO 128
36
37#define PDC_PIM 3
38#define PDC_PIM_HPMC 0
39#define PDC_PIM_RETURN_SIZE 1
40#define PDC_PIM_LPMC 2
41#define PDC_PIM_SOFT_BOOT 3
42#define PDC_PIM_TOC 4
43
44#define PDC_MODEL 4
45#define PDC_MODEL_INFO 0
46#define PDC_MODEL_BOOTID 1
47#define PDC_MODEL_VERSIONS 2
48#define PDC_MODEL_SYSMODEL 3
49#define PDC_MODEL_ENSPEC 4
50#define PDC_MODEL_DISPEC 5
51#define PDC_MODEL_CPU_ID 6
52#define PDC_MODEL_CAPABILITIES 7
53
54#define PDC_MODEL_OS64 (1 << 0)
55#define PDC_MODEL_OS32 (1 << 1)
56#define PDC_MODEL_IOPDIR_FDC (1 << 2)
57#define PDC_MODEL_NVA_MASK (3 << 4)
58#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
59#define PDC_MODEL_NVA_SLOW (1 << 4)
60#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
61#define PDC_MODEL_GET_BOOT__OP 8
62#define PDC_MODEL_SET_BOOT__OP 9
63
64#define PA89_INSTRUCTION_SET 0x4
65#define PA90_INSTRUCTION_SET 0x8
66
67#define PDC_CACHE 5
68#define PDC_CACHE_INFO 0
69#define PDC_CACHE_SET_COH 1
70#define PDC_CACHE_RET_SPID 2
71
72#define PDC_HPA 6
73#define PDC_HPA_PROCESSOR 0
74#define PDC_HPA_MODULES 1
75
76#define PDC_COPROC 7
77#define PDC_COPROC_CFG 0
78
79#define PDC_IODC 8
80#define PDC_IODC_READ 0
81
82#define PDC_IODC_RI_DATA_BYTES 0
83
84#define PDC_IODC_RI_INIT 3
85#define PDC_IODC_RI_IO 4
86#define PDC_IODC_RI_SPA 5
87#define PDC_IODC_RI_CONFIG 6
88
89#define PDC_IODC_RI_TEST 8
90#define PDC_IODC_RI_TLB 9
91#define PDC_IODC_NINIT 2
92#define PDC_IODC_DINIT 3
93#define PDC_IODC_MEMERR 4
94#define PDC_IODC_INDEX_DATA 0
95#define PDC_IODC_BUS_ERROR -4
96#define PDC_IODC_INVALID_INDEX -5
97#define PDC_IODC_COUNT -6
98
99#define PDC_TOD 9
100#define PDC_TOD_READ 0
101#define PDC_TOD_WRITE 1
102
103
104#define PDC_STABLE 10
105#define PDC_STABLE_READ 0
106#define PDC_STABLE_WRITE 1
107#define PDC_STABLE_RETURN_SIZE 2
108#define PDC_STABLE_VERIFY_CONTENTS 3
109#define PDC_STABLE_INITIALIZE 4
110
111#define PDC_NVOLATILE 11
112
113#define PDC_ADD_VALID 12
114#define PDC_ADD_VALID_VERIFY 0
115
116#define PDC_INSTR 15
117
118#define PDC_PROC 16
119
120#define PDC_CONFIG 16
121#define PDC_CONFIG_DECONFIG 0
122#define PDC_CONFIG_DRECONFIG 1
123#define PDC_CONFIG_DRETURN_CONFIG 2
124
125#define PDC_BLOCK_TLB 18
126#define PDC_BTLB_INFO 0
127#define PDC_BTLB_INSERT 1
128#define PDC_BTLB_PURGE 2
129#define PDC_BTLB_PURGE_ALL 3
130
131#define PDC_TLB 19
132#define PDC_TLB_INFO 0
133#define PDC_TLB_SETUP 1
134
135#define PDC_MEM 20
136#define PDC_MEM_MEMINFO 0
137#define PDC_MEM_ADD_PAGE 1
138#define PDC_MEM_CLEAR_PDT 2
139#define PDC_MEM_READ_PDT 3
140#define PDC_MEM_RESET_CLEAR 4
141#define PDC_MEM_GOODMEM 5
142#define PDC_MEM_TABLE 128
143#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
144#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
145#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
146#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
147
148#define PDC_MEM_RET_SBE_REPLACED 5
149#define PDC_MEM_RET_DUPLICATE_ENTRY 4
150#define PDC_MEM_RET_BUF_SIZE_SMALL 1
151#define PDC_MEM_RET_PDT_FULL -11
152#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
153
154#define PDC_PSW 21
155#define PDC_PSW_MASK 0
156#define PDC_PSW_GET_DEFAULTS 1
157#define PDC_PSW_SET_DEFAULTS 2
158#define PDC_PSW_ENDIAN_BIT 1
159#define PDC_PSW_WIDE_BIT 2
160
161#define PDC_SYSTEM_MAP 22
162#define PDC_FIND_MODULE 0
163#define PDC_FIND_ADDRESS 1
164#define PDC_TRANSLATE_PATH 2
165
166#define PDC_SOFT_POWER 23
167#define PDC_SOFT_POWER_INFO 0
168#define PDC_SOFT_POWER_ENABLE 1
169
170
171
172
173
174#define PDC_MEM_MAP 128
175#define PDC_MEM_MAP_HPA 0
176
177#define PDC_EEPROM 129
178#define PDC_EEPROM_READ_WORD 0
179#define PDC_EEPROM_WRITE_WORD 1
180#define PDC_EEPROM_READ_BYTE 2
181#define PDC_EEPROM_WRITE_BYTE 3
182#define PDC_EEPROM_EEPROM_PASSWORD -1000
183
184#define PDC_NVM 130
185#define PDC_NVM_READ_WORD 0
186#define PDC_NVM_WRITE_WORD 1
187#define PDC_NVM_READ_BYTE 2
188#define PDC_NVM_WRITE_BYTE 3
189
190#define PDC_SEED_ERROR 132
191
192#define PDC_IO 135
193#define PDC_IO_READ_AND_CLEAR_ERRORS 0
194#define PDC_IO_RESET 1
195#define PDC_IO_RESET_DEVICES 2
196
197#define PDC_IO_USB_SUSPEND 0xC000000000000000
198#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5
199#define PDC_IO_NO_SUSPEND -6
200
201#define PDC_BROADCAST_RESET 136
202#define PDC_DO_RESET 0
203#define PDC_DO_FIRM_TEST_RESET 1
204#define PDC_BR_RECONFIGURATION 2
205#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL
206
207#define PDC_LAN_STATION_ID 138
208#define PDC_LAN_STATION_ID_READ 0
209
210#define PDC_LAN_STATION_ID_SIZE 6
211
212#define PDC_CHECK_RANGES 139
213
214#define PDC_NV_SECTIONS 141
215
216#define PDC_PERFORMANCE 142
217
218#define PDC_SYSTEM_INFO 143
219#define PDC_SYSINFO_RETURN_INFO_SIZE 0
220#define PDC_SYSINFO_RRETURN_SYS_INFO 1
221#define PDC_SYSINFO_RRETURN_ERRORS 2
222#define PDC_SYSINFO_RRETURN_WARNINGS 3
223#define PDC_SYSINFO_RETURN_REVISIONS 4
224#define PDC_SYSINFO_RRETURN_DIAGNOSE 5
225#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
226
227#define PDC_RDR 144
228#define PDC_RDR_READ_BUFFER 0
229#define PDC_RDR_READ_SINGLE 1
230#define PDC_RDR_WRITE_SINGLE 2
231
232#define PDC_INTRIGUE 145
233#define PDC_INTRIGUE_WRITE_BUFFER 0
234#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
235#define PDC_INTRIGUE_START_CPU_COUNTERS 2
236#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
237
238#define PDC_STI 146
239
240
241
242#define PDC_PCI_INDEX 147
243#define PDC_PCI_INTERFACE_INFO 0
244#define PDC_PCI_SLOT_INFO 1
245#define PDC_PCI_INFLIGHT_BYTES 2
246#define PDC_PCI_READ_CONFIG 3
247#define PDC_PCI_WRITE_CONFIG 4
248#define PDC_PCI_READ_PCI_IO 5
249#define PDC_PCI_WRITE_PCI_IO 6
250#define PDC_PCI_READ_CONFIG_DELAY 7
251#define PDC_PCI_UPDATE_CONFIG_DELAY 8
252#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
253#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
254#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
255#define PDC_PCI_PCI_RESERVED 12
256#define PDC_PCI_PCI_INT_ROUTE_SIZE 13
257#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
258#define PDC_PCI_PCI_INT_ROUTE 14
259#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
260#define PDC_PCI_READ_MON_TYPE 15
261#define PDC_PCI_WRITE_MON_TYPE 16
262
263
264
265#define PDC_INITIATOR 163
266#define PDC_GET_INITIATOR 0
267#define PDC_SET_INITIATOR 1
268#define PDC_DELETE_INITIATOR 2
269#define PDC_RETURN_TABLE_SIZE 3
270#define PDC_RETURN_TABLE 4
271
272#define PDC_LINK 165
273#define PDC_LINK_PCI_ENTRY_POINTS 0
274#define PDC_LINK_USB_ENTRY_POINTS 1
275
276
277
278
279
280#define CL_NULL 0
281#define CL_RANDOM 1
282#define CL_SEQU 2
283#define CL_DUPLEX 7
284#define CL_KEYBD 8
285#define CL_DISPL 9
286#define CL_FC 10
287
288
289#define ENTRY_INIT_SRCH_FRST 2
290#define ENTRY_INIT_SRCH_NEXT 3
291#define ENTRY_INIT_MOD_DEV 4
292#define ENTRY_INIT_DEV 5
293#define ENTRY_INIT_MOD 6
294#define ENTRY_INIT_MSG 9
295
296
297#define ENTRY_IO_BOOTIN 0
298#define ENTRY_IO_BOOTOUT 1
299#define ENTRY_IO_CIN 2
300#define ENTRY_IO_COUT 3
301#define ENTRY_IO_CLOSE 4
302#define ENTRY_IO_GETMSG 9
303#define ENTRY_IO_BBLOCK_IN 16
304#define ENTRY_IO_BBLOCK_OUT 17
305
306
307
308
309
310
311
312
313
314
315#define OS_ID_NONE 0
316#define OS_ID_HPUX 1
317#define OS_ID_MPEXL 2
318#define OS_ID_OSF 3
319#define OS_ID_HPRT 4
320#define OS_ID_NOVEL 5
321#define OS_ID_LINUX 6
322
323
324
325#define OSTAT_OFF 0
326#define OSTAT_FLT 1
327#define OSTAT_TEST 2
328#define OSTAT_INIT 3
329#define OSTAT_SHUT 4
330#define OSTAT_WARN 5
331#define OSTAT_RUN 6
332#define OSTAT_ON 7
333
334
335#define BOOT_CONSOLE_HPA_OFFSET 0x3c0
336#define BOOT_CONSOLE_SPA_OFFSET 0x3c4
337#define BOOT_CONSOLE_PATH_OFFSET 0x3a8
338
339
340#define NUM_PDC_RESULT 32
341
342#if !defined(__ASSEMBLY__)
343
344
345#define PF_AUTOBOOT 0x80
346#define PF_AUTOSEARCH 0x40
347#define PF_TIMER 0x0F
348
349struct device_path {
350 unsigned char flags;
351 unsigned char bc[6];
352 unsigned char mod;
353 unsigned int layers[6];
354} __attribute__((aligned(8))) ;
355
356struct pz_device {
357 struct device_path dp;
358
359 unsigned int hpa;
360
361 unsigned int spa;
362
363 unsigned int iodc_io;
364 short pad;
365 unsigned short cl_class;
366} __attribute__((aligned(8))) ;
367
368struct zeropage {
369
370 unsigned int vec_special;
371
372 unsigned int vec_pow_fail;
373
374 unsigned int vec_toc;
375 unsigned int vec_toclen;
376
377 unsigned int vec_rendz;
378 int vec_pow_fail_flen;
379 int vec_pad[10];
380
381
382 int pad0[112];
383
384
385 int pad1[84];
386
387
388 int memc_cont;
389 int memc_phsize;
390 int memc_adsize;
391 unsigned int mem_pdc_hi;
392
393
394
395 unsigned int mem_booterr[8];
396 unsigned int mem_free;
397
398 unsigned int mem_hpa;
399
400 unsigned int mem_pdc;
401 unsigned int mem_10msec;
402
403
404
405 unsigned int imm_hpa;
406 int imm_soft_boot;
407 unsigned int imm_spa_size;
408 unsigned int imm_max_mem;
409
410
411 struct pz_device mem_cons;
412 struct pz_device mem_boot;
413 struct pz_device mem_kbd;
414
415
416 int pad430[116];
417
418
419 unsigned int pad600[1];
420 unsigned int proc_sti;
421 unsigned int pad608[126];
422};
423
424struct pdc_chassis_info {
425 unsigned long actcnt;
426 unsigned long maxcnt;
427};
428
429struct pdc_coproc_cfg {
430 unsigned long ccr_functional;
431 unsigned long ccr_present;
432 unsigned long revision;
433 unsigned long model;
434};
435
436struct pdc_model {
437 unsigned long hversion;
438 unsigned long sversion;
439 unsigned long hw_id;
440 unsigned long boot_id;
441 unsigned long sw_id;
442 unsigned long sw_cap;
443 unsigned long arch_rev;
444 unsigned long pot_key;
445 unsigned long curr_key;
446};
447
448struct pdc_cache_cf {
449 unsigned long
450#ifdef __LP64__
451 cc_padW:32,
452#endif
453 cc_alias: 4,
454 cc_block: 4,
455 cc_line : 3,
456 cc_shift: 2,
457 cc_wt : 1,
458 cc_sh : 2,
459 cc_cst : 3,
460 cc_pad1 : 10,
461 cc_hv : 3;
462};
463
464struct pdc_tlb_cf {
465 unsigned long tc_pad0:12,
466#ifdef __LP64__
467 tc_padW:32,
468#endif
469 tc_sh : 2,
470 tc_hv : 1,
471 tc_page : 1,
472 tc_cst : 3,
473 tc_aid : 5,
474 tc_sr : 8;
475};
476
477struct pdc_cache_info {
478
479 unsigned long ic_size;
480 struct pdc_cache_cf ic_conf;
481 unsigned long ic_base;
482 unsigned long ic_stride;
483 unsigned long ic_count;
484 unsigned long ic_loop;
485
486 unsigned long dc_size;
487 struct pdc_cache_cf dc_conf;
488 unsigned long dc_base;
489 unsigned long dc_stride;
490 unsigned long dc_count;
491 unsigned long dc_loop;
492
493 unsigned long it_size;
494 struct pdc_tlb_cf it_conf;
495 unsigned long it_sp_base;
496 unsigned long it_sp_stride;
497 unsigned long it_sp_count;
498 unsigned long it_off_base;
499 unsigned long it_off_stride;
500 unsigned long it_off_count;
501 unsigned long it_loop;
502
503 unsigned long dt_size;
504 struct pdc_tlb_cf dt_conf;
505 unsigned long dt_sp_base;
506 unsigned long dt_sp_stride;
507 unsigned long dt_sp_count;
508 unsigned long dt_off_base;
509 unsigned long dt_off_stride;
510 unsigned long dt_off_count;
511 unsigned long dt_loop;
512};
513
514
515struct pdc_iodc {
516 unsigned char hversion_model;
517 unsigned char hversion;
518 unsigned char spa;
519 unsigned char type;
520 unsigned int sversion_rev:4;
521 unsigned int sversion_model:19;
522 unsigned int sversion_opt:8;
523 unsigned char rev;
524 unsigned char dep;
525 unsigned char features;
526 unsigned char pad1;
527 unsigned int checksum:16;
528 unsigned int length:16;
529 unsigned int pad[15];
530} __attribute__((aligned(8))) ;
531
532
533struct pdc_btlb_info_range {
534 unsigned char res00;
535 unsigned char num_i;
536 unsigned char num_d;
537 unsigned char num_comb;
538};
539
540struct pdc_btlb_info {
541 unsigned int min_size;
542 unsigned int max_size;
543 struct pdc_btlb_info_range fixed_range_info;
544 struct pdc_btlb_info_range variable_range_info;
545};
546
547struct pdc_mem_retinfo {
548 unsigned long pdt_size;
549 unsigned long pdt_entries;
550 unsigned long pdt_status;
551 unsigned long first_dbe_loc;
552 unsigned long good_mem;
553};
554
555struct pdc_mem_read_pdt {
556 unsigned long pdt_entries;
557};
558
559#ifdef __LP64__
560struct pdc_memory_table_raddr {
561 unsigned long entries_returned;
562 unsigned long entries_total;
563};
564
565struct pdc_memory_table {
566 unsigned long paddr;
567 unsigned int pages;
568 unsigned int reserved;
569};
570#endif
571
572struct pdc_system_map_mod_info {
573 unsigned long mod_addr;
574 unsigned long mod_pgs;
575 unsigned long add_addrs;
576};
577
578struct pdc_system_map_addr_info {
579 unsigned long mod_addr;
580 unsigned long mod_pgs;
581};
582
583struct pdc_initiator {
584 int host_id;
585 int factor;
586 int width;
587 int mode;
588};
589
590struct hardware_path {
591 char flags;
592 char bc[6];
593
594 char mod;
595};
596
597
598
599
600struct pdc_module_path {
601 struct hardware_path path;
602 unsigned int layers[6];
603};
604
605
606struct pdc_memory_map {
607 unsigned long hpa;
608 unsigned long more_pgs;
609};
610
611struct pdc_tod {
612 unsigned long tod_sec;
613 unsigned long tod_usec;
614};
615
616
617
618struct pdc_hpmc_pim_11 {
619 unsigned int gr[32];
620 unsigned int cr[32];
621 unsigned int sr[8];
622 unsigned int iasq_back;
623 unsigned int iaoq_back;
624 unsigned int check_type;
625 unsigned int cpu_state;
626 unsigned int rsvd1;
627 unsigned int cache_check;
628 unsigned int tlb_check;
629 unsigned int bus_check;
630 unsigned int assists_check;
631 unsigned int rsvd2;
632 unsigned int assist_state;
633 unsigned int responder_addr;
634 unsigned int requestor_addr;
635 unsigned int path_info;
636 unsigned long long fr[32];
637};
638
639
640
641
642
643
644
645
646
647
648
649
650
651struct pdc_hpmc_pim_20 {
652 unsigned long long gr[32];
653 unsigned long long cr[32];
654 unsigned long long sr[8];
655 unsigned long long iasq_back;
656 unsigned long long iaoq_back;
657 unsigned int check_type;
658 unsigned int cpu_state;
659 unsigned int cache_check;
660 unsigned int tlb_check;
661 unsigned int bus_check;
662 unsigned int assists_check;
663 unsigned int assist_state;
664 unsigned int path_info;
665 unsigned long long responder_addr;
666 unsigned long long requestor_addr;
667 unsigned long long fr[32];
668};
669
670#endif
671
672#endif
673