1#ifndef _ASM_POWERPC_PCI_BRIDGE_H
2#define _ASM_POWERPC_PCI_BRIDGE_H
3#ifdef __KERNEL__
4
5
6
7
8
9
10#include <linux/pci.h>
11#include <linux/list.h>
12#include <linux/ioport.h>
13
14struct device_node;
15
16
17
18
19struct pci_controller_ops {
20 void (*dma_dev_setup)(struct pci_dev *pdev);
21 void (*dma_bus_setup)(struct pci_bus *bus);
22
23 int (*probe_mode)(struct pci_bus *bus);
24
25
26
27 bool (*enable_device_hook)(struct pci_dev *pdev);
28
29 void (*disable_device)(struct pci_dev *pdev);
30
31 void (*release_device)(struct pci_dev *pdev);
32
33
34 resource_size_t (*window_alignment)(struct pci_bus *bus,
35 unsigned long type);
36 void (*setup_bridge)(struct pci_bus *bus,
37 unsigned long type);
38 void (*reset_secondary_bus)(struct pci_dev *pdev);
39
40#ifdef CONFIG_PCI_MSI
41 int (*setup_msi_irqs)(struct pci_dev *pdev,
42 int nvec, int type);
43 void (*teardown_msi_irqs)(struct pci_dev *pdev);
44#endif
45
46 int (*dma_set_mask)(struct pci_dev *pdev, u64 dma_mask);
47 u64 (*dma_get_required_mask)(struct pci_dev *pdev);
48
49 void (*shutdown)(struct pci_controller *hose);
50};
51
52
53
54
55struct pci_controller {
56 struct pci_bus *bus;
57 char is_dynamic;
58#ifdef CONFIG_PPC64
59 int node;
60#endif
61 struct device_node *dn;
62 struct list_head list_node;
63 struct device *parent;
64
65 int first_busno;
66 int last_busno;
67 int self_busno;
68 struct resource busn;
69
70 void __iomem *io_base_virt;
71#ifdef CONFIG_PPC64
72 void *io_base_alloc;
73#endif
74 resource_size_t io_base_phys;
75 resource_size_t pci_io_size;
76
77
78
79
80
81 resource_size_t isa_mem_phys;
82 resource_size_t isa_mem_size;
83
84 struct pci_controller_ops controller_ops;
85 struct pci_ops *ops;
86 unsigned int __iomem *cfg_addr;
87 void __iomem *cfg_data;
88
89
90
91
92
93
94
95
96
97
98
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100
101
102
103
104
105
106
107#define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x00000001
108#define PPC_INDIRECT_TYPE_EXT_REG 0x00000002
109#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x00000004
110#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x00000008
111#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010
112#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020
113#define PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK 0x00000040
114 u32 indirect_type;
115
116
117
118 struct resource io_resource;
119 struct resource mem_resources[3];
120 resource_size_t mem_offset[3];
121 int global_number;
122
123 resource_size_t dma_window_base_cur;
124 resource_size_t dma_window_size;
125
126#ifdef CONFIG_PPC64
127 unsigned long buid;
128 struct pci_dn *pci_data;
129#endif
130
131 void *private_data;
132};
133
134
135
136extern int early_read_config_byte(struct pci_controller *hose, int bus,
137 int dev_fn, int where, u8 *val);
138extern int early_read_config_word(struct pci_controller *hose, int bus,
139 int dev_fn, int where, u16 *val);
140extern int early_read_config_dword(struct pci_controller *hose, int bus,
141 int dev_fn, int where, u32 *val);
142extern int early_write_config_byte(struct pci_controller *hose, int bus,
143 int dev_fn, int where, u8 val);
144extern int early_write_config_word(struct pci_controller *hose, int bus,
145 int dev_fn, int where, u16 val);
146extern int early_write_config_dword(struct pci_controller *hose, int bus,
147 int dev_fn, int where, u32 val);
148
149extern int early_find_capability(struct pci_controller *hose, int bus,
150 int dev_fn, int cap);
151
152extern void setup_indirect_pci(struct pci_controller* hose,
153 resource_size_t cfg_addr,
154 resource_size_t cfg_data, u32 flags);
155
156extern int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
157 int offset, int len, u32 *val);
158
159extern int __indirect_read_config(struct pci_controller *hose,
160 unsigned char bus_number, unsigned int devfn,
161 int offset, int len, u32 *val);
162
163extern int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
164 int offset, int len, u32 val);
165
166static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
167{
168 return bus->sysdata;
169}
170
171#ifndef CONFIG_PPC64
172
173extern int pci_device_from_OF_node(struct device_node *node,
174 u8 *bus, u8 *devfn);
175extern void pci_create_OF_bus_map(void);
176
177#else
178
179
180
181
182
183struct iommu_table;
184
185struct pci_dn {
186 int flags;
187#define PCI_DN_FLAG_IOV_VF 0x01
188
189 int busno;
190 int devfn;
191 int vendor_id;
192 int device_id;
193 int class_code;
194
195 struct pci_dn *parent;
196 struct pci_controller *phb;
197 struct iommu_table_group *table_group;
198
199 int pci_ext_config_space;
200#ifdef CONFIG_EEH
201 struct eeh_dev *edev;
202#endif
203#define IODA_INVALID_PE 0xFFFFFFFF
204 unsigned int pe_number;
205#ifdef CONFIG_PCI_IOV
206 int vf_index;
207 u16 vfs_expanded;
208 u16 num_vfs;
209 unsigned int *pe_num_map;
210 bool m64_single_mode;
211#define IODA_INVALID_M64 (-1)
212 int (*m64_map)[PCI_SRIOV_NUM_BARS];
213 int last_allow_rc;
214#endif
215 int mps;
216 struct list_head child_list;
217 struct list_head list;
218 struct resource holes[PCI_SRIOV_NUM_BARS];
219};
220
221
222#define PCI_DN(dn) ((struct pci_dn *) (dn)->data)
223
224extern struct pci_dn *pci_get_pdn_by_devfn(struct pci_bus *bus,
225 int devfn);
226extern struct pci_dn *pci_get_pdn(struct pci_dev *pdev);
227extern struct pci_dn *add_dev_pci_data(struct pci_dev *pdev);
228extern void remove_dev_pci_data(struct pci_dev *pdev);
229extern struct pci_dn *pci_add_device_node_info(struct pci_controller *hose,
230 struct device_node *dn);
231extern void pci_remove_device_node_info(struct device_node *dn);
232
233static inline int pci_device_from_OF_node(struct device_node *np,
234 u8 *bus, u8 *devfn)
235{
236 if (!PCI_DN(np))
237 return -ENODEV;
238 *bus = PCI_DN(np)->busno;
239 *devfn = PCI_DN(np)->devfn;
240 return 0;
241}
242
243#if defined(CONFIG_EEH)
244static inline struct eeh_dev *pdn_to_eeh_dev(struct pci_dn *pdn)
245{
246 return pdn ? pdn->edev : NULL;
247}
248#else
249#define pdn_to_eeh_dev(x) (NULL)
250#endif
251
252
253extern struct pci_bus *pci_find_bus_by_node(struct device_node *dn);
254
255
256extern void pci_hp_remove_devices(struct pci_bus *bus);
257
258
259extern void pci_hp_add_devices(struct pci_bus *bus);
260
261extern int pcibios_unmap_io_space(struct pci_bus *bus);
262extern int pcibios_map_io_space(struct pci_bus *bus);
263
264#ifdef CONFIG_NUMA
265#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE))
266#else
267#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = -1)
268#endif
269
270#endif
271
272
273extern struct pci_controller *pci_find_hose_for_OF_device(
274 struct device_node* node);
275
276
277extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
278 struct device_node *dev, int primary);
279
280
281extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
282extern void pcibios_free_controller(struct pci_controller *phb);
283extern void pcibios_free_controller_deferred(struct pci_host_bridge *bridge);
284
285#ifdef CONFIG_PCI
286extern int pcibios_vaddr_is_ioport(void __iomem *address);
287#else
288static inline int pcibios_vaddr_is_ioport(void __iomem *address)
289{
290 return 0;
291}
292#endif
293
294#endif
295#endif
296